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connect rl02 to bus

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This commit is contained in:
folkert van heusden 2022-06-09 22:19:46 +02:00
parent 21a6553f47
commit 160ffe5c26
9 changed files with 42 additions and 115 deletions
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1
CMakeLists.txt
View file

@ -20,7 +20,6 @@ add_executable(
memory.cpp
rk05.cpp
rl02.cpp
rx02.cpp
terminal.cpp
tests.cpp
tm-11.cpp

10
bus.cpp
View file

@ -1,4 +1,4 @@
// (C) 2018 by Folkert van Heusden
// (C) 2018-2022 by Folkert van Heusden
// Released under Apache License v2.0
#include <assert.h>
#include <stdio.h>
@ -19,6 +19,7 @@ constexpr int n_pages = 12;
constexpr int n_pages = 16;
#endif
bus::bus()
{
m = new memory(n_pages * 8192);
@ -33,7 +34,7 @@ bus::~bus()
delete c;
delete tm11;
delete rk05_;
delete rx02_;
delete rl02_;
delete tty_;
delete m;
}
@ -546,6 +547,11 @@ uint16_t bus::write(const uint16_t a, const bool word_mode, uint16_t value, cons
return value;
}
if (rl02_ && a >= RL02_BASE && a < RL02_END) {
word_mode ? rl02_ -> writeByte(a, value) : rl02_ -> writeWord(a, value);
return value;
}
if (tty_ && a >= PDP11TTY_BASE && a < PDP11TTY_END) {
word_mode ? tty_ -> writeByte(a, value) : tty_ -> writeWord(a, value);
return value;

6
bus.h
View file

@ -7,7 +7,7 @@
#include "tm-11.h"
#include "rk05.h"
#include "rx02.h"
#include "rl02.h"
class cpu;
class memory;
@ -24,7 +24,7 @@ private:
cpu *c { nullptr };
tm_11 *tm11 { nullptr };
rk05 *rk05_ { nullptr };
rx02 *rx02_ { nullptr };
rl02 *rl02_ { nullptr };
tty *tty_ { nullptr };
memory *m { nullptr };
@ -51,7 +51,7 @@ public:
void add_cpu(cpu *const c) { this -> c = c; }
void add_tm11(tm_11 *tm11) { this -> tm11 = tm11; }
void add_rk05(rk05 *rk05_) { this -> rk05_ = rk05_; }
void add_rx02(rx02 *rx02_) { this -> rx02_ = rx02_; }
void add_rl02(rl02 *rl02_) { this -> rl02_ = rl02_; }
void add_tty(tty *tty_) { this -> tty_ = tty_; }
cpu *getCpu() { return this->c; }

14
main.cpp
View file

@ -170,12 +170,15 @@ int main(int argc, char *argv[])
c -> setEmulateMFPT(true);
std::vector<std::string> rk05_files;
std::vector<std::string> rl02_files;
bool testCases = false;
bool run_debugger = false;
bool tracing = false;
bool bootloader = false;
int opt = -1;
while((opt = getopt(argc, argv, "hm:T:R:p:ndtL:b")) != -1)
while((opt = getopt(argc, argv, "hm:T:r:R:p:ndtL:b")) != -1)
{
switch(opt) {
case 'h':
@ -216,6 +219,10 @@ int main(int argc, char *argv[])
rk05_files.push_back(optarg);
break;
case 'r':
rl02_files.push_back(optarg);
break;
case 'p':
c->setRegister(7, atoi(optarg));
break;
@ -247,6 +254,9 @@ int main(int argc, char *argv[])
if (rk05_files.empty() == false)
b->add_rk05(new rk05(rk05_files, b, cnsl->get_disk_read_activity_flag(), cnsl->get_disk_write_activity_flag()));
if (rl02_files.empty() == false)
b->add_rl02(new rl02(rl02_files, b, cnsl->get_disk_read_activity_flag(), cnsl->get_disk_write_activity_flag()));
if (bootloader)
setBootLoader(b);
@ -306,5 +316,7 @@ int main(int argc, char *argv[])
delete b;
delete lf;
return 0;
}

2
rk05.cpp
View file

@ -11,7 +11,7 @@
#include "utils.h"
const char * const regnames[] = {
static const char * const regnames[] = {
"RK05_DS drivestatus",
"RK05_ERROR ",
"RK05_CS ctrlstatus",

13
rl02.cpp
View file

@ -11,6 +11,13 @@
#include "utils.h"
static const char * const regnames[] = {
"control status",
"bus address ",
"disk address ",
"multipurpose "
};
rl02::rl02(const std::vector<std::string> & files, bus *const b, std::atomic_bool *const disk_read_acitivity, std::atomic_bool *const disk_write_acitivity) :
b(b),
disk_read_acitivity(disk_read_acitivity),
@ -63,11 +70,13 @@ uint16_t rl02::readWord(const uint16_t addr)
{
const int reg = (addr - RK05_BASE) / 2;
uint16_t value = 0;
// TODO
D(fprintf(stderr, "RK05 read %s/%o: %06o\n", reg[regnames], addr, vtemp);)
D(fprintf(stderr, "RK05 read %s/%o: %06o\n", reg[regnames], addr, value);)
return vtemp;
return value;
}
void rl02::writeByte(const uint16_t addr, const uint8_t v)

6
rl02.h
View file

@ -12,6 +12,12 @@
#include "esp32.h"
#endif
#define RL02_CSR 0174400 // control status register
#define RL02_BAR 0174402 // bus address register
#define RL02_DAR 0174404 // disk address register
#define RL02_MPR 0174406 // multi purpose register
#define RL02_BASE RL02_CSR
#define RL02_END (RL02_MPR + 2)
class bus;

72
rx02.cpp
View file

@ -1,72 +0,0 @@
// (C) 2018 by Folkert van Heusden
// Released under Apache License v2.0
#include <errno.h>
#include <string.h>
#include "rx02.h"
#include "gen.h"
#include "memory.h"
#include "utils.h"
rx02::rx02(const std::string & file, memory *const m) : m(m)
{
offset = 0;
memset(registers, 0x00, sizeof registers);
fh = fopen(file.c_str(), "rb");
}
rx02::~rx02()
{
fclose(fh);
}
uint8_t rx02::readByte(const uint16_t addr)
{
uint16_t v = readWord(addr & ~1);
if (addr & 1)
return v >> 8;
return v;
}
uint16_t rx02::readWord(const uint16_t addr)
{
const int reg = (addr - RX02_BASE) / 2;
uint16_t vtemp = registers[reg];
D(printf("RX02 read addr %o: ", addr);)
// FIXME
D(printf("%o\n", vtemp);)
return vtemp;
}
void rx02::writeByte(const uint16_t addr, const uint8_t v)
{
uint16_t vtemp = registers[(addr - RX02_BASE) / 2];
if (addr & 1) {
vtemp &= ~0xff00;
vtemp |= v << 8;
}
else {
vtemp &= ~0x00ff;
vtemp |= v;
}
writeWord(addr, vtemp);
}
void rx02::writeWord(const uint16_t addr, uint16_t v)
{
D(printf("RX02 write %o: %o\n", addr, v);)
// FIXME
D(printf("set register %o to %o\n", addr, v);)
registers[(addr - RX02_BASE) / 2] = v;
}

33
rx02.h
View file

@ -1,33 +0,0 @@
// (C) 2018 by Folkert van Heusden
// Released under Apache License v2.0
#pragma once
#include <stdint.h>
#include <stdio.h>
#include <string>
// FIXME namen van defines
#define RX02_BASE 0
#define RX02_END (1 + 2)
class memory;
class rx02
{
private:
memory *const m;
uint16_t registers[7];
uint8_t xfer_buffer[512];
int offset;
FILE *fh;
public:
rx02(const std::string & file, memory *const m);
virtual ~rx02();
uint8_t readByte(const uint16_t addr);
uint16_t readWord(const uint16_t addr);
void writeByte(const uint16_t addr, const uint8_t v);
void writeWord(const uint16_t addr, uint16_t v);
};