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disassembler: do not trigger trap

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This commit is contained in:
folkert van heusden 2022-04-11 14:39:03 +02:00
parent ddb74b8f38
commit 17ab6d8e67
3 changed files with 22 additions and 16 deletions
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11
bus.cpp
View file

@ -49,7 +49,7 @@ void bus::init()
MMR3 = 0;
}
uint16_t bus::read(const uint16_t a, const bool word_mode, const bool use_prev)
uint16_t bus::read(const uint16_t a, const bool word_mode, const bool use_prev, const bool peek_only)
{
uint16_t temp = 0;
@ -304,7 +304,7 @@ uint16_t bus::read(const uint16_t a, const bool word_mode, const bool use_prev)
int run_mode = (c->getPSW() >> (use_prev ? 12 : 14)) & 3;
uint32_t m_offset = calculate_physical_address(run_mode, a, true);
uint32_t m_offset = calculate_physical_address(run_mode, a, !peek_only);
if (word_mode)
temp = m -> readByte(m_offset);
@ -653,7 +653,12 @@ uint16_t bus::write(const uint16_t a, const bool word_mode, uint16_t value, cons
uint16_t bus::readWord(const uint16_t a)
{
return read(a, false, false);
return read(a, false, false, false);
}
uint16_t bus::peekWord(const uint16_t a)
{
return read(a, false, false, true);
}
uint16_t bus::writeWord(const uint16_t a, const uint16_t value)

3
bus.h
View file

@ -54,9 +54,10 @@ public:
void init(); // invoked by 'RESET' command
uint16_t read(const uint16_t a, const bool word_mode, const bool use_prev);
uint16_t read(const uint16_t a, const bool word_mode, const bool use_prev, const bool peek_only=false);
uint16_t readByte(const uint16_t a) { return read(a, true, false); }
uint16_t readWord(const uint16_t a);
uint16_t peekWord(const uint16_t a);
uint16_t readUnibusByte(const uint16_t a);

24
cpu.cpp
View file

@ -1437,7 +1437,7 @@ cpu::operand_parameters cpu::addressing_to_string(const uint8_t mode_register, c
{
assert(mode_register < 64);
uint16_t next_word = b->readWord(pc & 65535);
uint16_t next_word = b->peekWord(pc & 65535);
int reg = mode_register & 7;
@ -1456,37 +1456,37 @@ cpu::operand_parameters cpu::addressing_to_string(const uint8_t mode_register, c
return { reg_name, 2, -1, uint16_t(getRegister(reg) & mask) };
case 1:
return { format("(%s)", reg_name.c_str()), 2, -1, uint16_t(b->readWord(getRegister(reg)) & mask) };
return { format("(%s)", reg_name.c_str()), 2, -1, uint16_t(b->peekWord(getRegister(reg)) & mask) };
case 2:
if (reg == 7)
return { format("#%06o", next_word), 4, int(next_word), uint16_t(next_word & mask) };
return { format("(%s)+", reg_name.c_str()), 2, -1, uint16_t(b->readWord(getRegister(reg)) & mask) };
return { format("(%s)+", reg_name.c_str()), 2, -1, uint16_t(b->peekWord(getRegister(reg)) & mask) };
case 3:
if (reg == 7)
return { format("@#%06o", next_word), 4, int(next_word), uint16_t(b->readWord(next_word) & mask) };
return { format("@#%06o", next_word), 4, int(next_word), uint16_t(b->peekWord(next_word) & mask) };
return { format("@(%s)+", reg_name.c_str()), 2, -1, uint16_t(b->readWord(b->readWord(getRegister(reg))) & mask) };
return { format("@(%s)+", reg_name.c_str()), 2, -1, uint16_t(b->peekWord(b->peekWord(getRegister(reg))) & mask) };
case 4:
return { format("-(%s)", reg_name.c_str()), 2, -1, uint16_t(b->readWord(getRegister(reg) - (word_mode == false || reg >= 6 ? 2 : 1)) & mask) };
return { format("-(%s)", reg_name.c_str()), 2, -1, uint16_t(b->peekWord(getRegister(reg) - (word_mode == false || reg >= 6 ? 2 : 1)) & mask) };
case 5:
return { format("@-(%s)", reg_name.c_str()), 2, -1, uint16_t(b->readWord(b->readWord(getRegister(reg) - 2)) & mask) };
return { format("@-(%s)", reg_name.c_str()), 2, -1, uint16_t(b->peekWord(b->peekWord(getRegister(reg) - 2)) & mask) };
case 6:
if (reg == 7)
return { format("%06o", (pc + next_word + 2) & 65535), 4, int(next_word), uint16_t(b->readWord(getRegister(reg) + next_word) & mask) };
return { format("%06o", (pc + next_word + 2) & 65535), 4, int(next_word), uint16_t(b->peekWord(getRegister(reg) + next_word) & mask) };
return { format("%o(%s)", next_word, reg_name.c_str()), 4, int(next_word), uint16_t(b->readWord(getRegister(reg) + next_word) & mask) };
return { format("%o(%s)", next_word, reg_name.c_str()), 4, int(next_word), uint16_t(b->peekWord(getRegister(reg) + next_word) & mask) };
case 7:
if (reg == 7)
return { format("@%06o", next_word), 4, int(next_word), uint16_t(b->readWord(b->readWord(getRegister(reg) + next_word)) & mask) };
return { format("@%06o", next_word), 4, int(next_word), uint16_t(b->peekWord(b->peekWord(getRegister(reg) + next_word)) & mask) };
return { format("@%o(%s)", next_word, reg_name.c_str()), 4, int(next_word), uint16_t(b->readWord(b->readWord(getRegister(reg) + next_word)) & mask) };
return { format("@%o(%s)", next_word, reg_name.c_str()), 4, int(next_word), uint16_t(b->peekWord(b->peekWord(getRegister(reg) + next_word)) & mask) };
}
return { "??", 0, -1, 0123456 };
@ -1498,7 +1498,7 @@ std::map<std::string, std::vector<std::string> > cpu::disassemble(const uint16_t
debug_output = false;
uint16_t pc = getPC();
uint16_t instruction = b->readWord(pc);
uint16_t instruction = b->peekWord(pc);
bool word_mode = !!(instruction & 0x8000);
std::string word_mode_str = word_mode ? "B" : "";