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byte mode instructions: fixes for mode == 0

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This commit is contained in:
folkert van heusden 2022-03-31 09:49:52 +02:00
parent 40d22393db
commit 1b155473d2
1 changed files with 285 additions and 104 deletions
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241
cpu.cpp
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@ -683,6 +683,22 @@ bool cpu::single_operand_instructions(const uint16_t instr)
} }
case 0b000101001: { // COM/COMB case 0b000101001: { // COM/COMB
if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg, false);
if (word_mode)
v ^= 0xff;
else
v ^= 0xffff;
setPSW_n(SIGN(v, word_mode));
setPSW_z(v == 0);
setPSW_v(false);
setPSW_c(true);
setRegister(dst_reg, false, v);
}
else {
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false); uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
uint16_t v = b -> read(a, word_mode); uint16_t v = b -> read(a, word_mode);
@ -697,42 +713,84 @@ bool cpu::single_operand_instructions(const uint16_t instr)
setPSW_c(true); setPSW_c(true);
put_result(a, dst_mode, dst_reg, word_mode, v); put_result(a, dst_mode, dst_reg, word_mode, v);
}
break; break;
} }
case 0b000101010: { // INC/INCB case 0b000101010: { // INC/INCB
if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg, false);
uint16_t add = word_mode ? v & 0xff00 : 0;
v = (v + 1) & (word_mode ? 0xff : 0xffff);
setPSW_n(word_mode ? v > 127 : v > 32767);
setPSW_z(v == 0);
setPSW_v(word_mode ? v == 0x80 : v == 0x8000);
setRegister(dst_reg, false, v | add);
}
else {
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false); uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
uint16_t v = b -> read(a, word_mode); uint16_t v = b -> read(a, word_mode);
int32_t vl = (v + 1) & (word_mode ? 0xff : 0xffff); int32_t vl = (v + 1) & (word_mode ? 0xff : 0xffff);
setPSW_n(word_mode ? vl > 127 : vl > 32767); setPSW_n(word_mode ? vl > 127 : vl > 32767);
setPSW_z(vl == 0); setPSW_z(vl == 0);
setPSW_v(word_mode ? v == 0x7f : v == 0x7fff); setPSW_v(word_mode ? vl == 0x80 : v == 0x8000);
put_result(a, dst_mode, dst_reg, word_mode, vl); put_result(a, dst_mode, dst_reg, word_mode, vl);
}
break; break;
} }
case 0b000101011: { // DEC/DECB case 0b000101011: { // DEC/DECB
if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg, false);
uint16_t add = word_mode ? v & 0xff00 : 0;
v = (v - 1) & (word_mode ? 0xff : 0xffff);
setPSW_n(word_mode ? v > 127 : v > 32767);
setPSW_z(v == 0);
setPSW_v(word_mode ? v == 0x7f : v == 0x7fff);
setRegister(dst_reg, false, v | add);
}
else {
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false); uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
uint16_t v = b -> read(a, word_mode); uint16_t v = b -> read(a, word_mode);
int32_t vl = (v - 1) & (word_mode ? 0xff : 0xffff); int32_t vl = (v - 1) & (word_mode ? 0xff : 0xffff);
setPSW_n(word_mode ? vl > 127 : vl > 32767); setPSW_n(word_mode ? vl > 127 : vl > 32767);
setPSW_z(vl == 0); setPSW_z(vl == 0);
setPSW_v(word_mode ? v == 0x80 : v == 0x8000); setPSW_v(word_mode ? v == 0x7f : v == 0x7fff);
put_result(a, dst_mode, dst_reg, word_mode, vl); put_result(a, dst_mode, dst_reg, word_mode, vl);
}
break; break;
} }
case 0b000101100: { // NEG/NEGB case 0b000101100: { // NEG/NEGB
if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg, false);
uint16_t add = word_mode ? v & 0xff00 : 0;
v = (-v) & (word_mode ? 0xff : 0xffff);
setPSW_n(word_mode ? v > 127 : v > 32767);
setPSW_z(v == 0);
setPSW_v(word_mode ? v == 0x80 : v == 0x8000);
setRegister(dst_reg, false, v | add);
}
else {
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false); uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
uint16_t v = b -> read(a, word_mode); uint16_t v = b -> read(a, word_mode);
int32_t vl = word_mode ? uint8_t(-int8_t(v)) : -int16_t(v); int32_t vl = word_mode ? uint8_t(-v) : -v;
put_result(a, dst_mode, dst_reg, word_mode, vl); put_result(a, dst_mode, dst_reg, word_mode, vl);
@ -740,13 +798,30 @@ bool cpu::single_operand_instructions(const uint16_t instr)
setPSW_z(vl == 0); setPSW_z(vl == 0);
setPSW_v(word_mode ? vl == 0x80 : vl == 0x8000); setPSW_v(word_mode ? vl == 0x80 : vl == 0x8000);
setPSW_c(vl); setPSW_c(vl);
}
break; break;
} }
case 0b000101101: { // ADC/ADCB case 0b000101101: { // ADC/ADCB
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false); if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg, false);
uint16_t add = word_mode ? v & 0xff00 : 0;
bool org_c = getPSW_c();
v = (v + org_c) & (word_mode ? 0xff : 0xffff);
setPSW_n(SIGN(v, word_mode));
setPSW_z(v == 0);
setPSW_v((word_mode ? v == 0x80 : v == 0x8000) && org_c);
setPSW_c((word_mode ? v == 0x00 : v == 0x0000) && org_c);
setRegister(dst_reg, false, v | add);
}
else {
uint16_t a = getGAMAddress(dst_mode, dst_reg, false, false);
uint16_t org = b -> read(a, word_mode); uint16_t org = b -> read(a, word_mode);
uint16_t new_ = org + getPSW_c(); uint16_t new_ = (org + getPSW_c()) & (word_mode ? 0x00ff : 0xffff);
put_result(a, dst_mode, dst_reg, word_mode, new_); put_result(a, dst_mode, dst_reg, word_mode, new_);
@ -754,15 +829,33 @@ bool cpu::single_operand_instructions(const uint16_t instr)
setPSW_z(new_ == 0); setPSW_z(new_ == 0);
setPSW_v((word_mode ? org == 0x7f : org == 0x7fff) && getPSW_c()); setPSW_v((word_mode ? org == 0x7f : org == 0x7fff) && getPSW_c());
setPSW_c((word_mode ? org == 0xff : org == 0xffff) && getPSW_c()); setPSW_c((word_mode ? org == 0xff : org == 0xffff) && getPSW_c());
}
break; break;
} }
case 0b000101110: { // SBC/SBCB case 0b000101110: { // SBC/SBCB
if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg, false);
uint16_t add = word_mode ? v & 0xff00 : 0;
bool org_c = getPSW_c();
v = (v - org_c) & (word_mode ? 0xff : 0xffff);
setPSW_n(SIGN(v, word_mode));
setPSW_z(v == 0);
setPSW_v((word_mode ? v == 0x7f : v == 0x7fff) && org_c);
setPSW_c((word_mode ? v == 0xff : v == 0xffff) && org_c);
setRegister(dst_reg, false, v | add);
}
else {
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false); uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
uint16_t v = b -> read(a, word_mode); uint16_t v = b -> read(a, word_mode);
int32_t vl = (v - getPSW_c()) & (word_mode ? 0xff : 0xffff); int32_t vl = (v - getPSW_c()) & (word_mode ? 0xff : 0xffff);
uint16_t add = word_mode ? v & 0xff00 : 0;
put_result(a, dst_mode, dst_reg, word_mode, vl); put_result(a, dst_mode, dst_reg, word_mode, vl | add);
setPSW_n(SIGN(vl, word_mode)); setPSW_n(SIGN(vl, word_mode));
setPSW_z(vl == 0); setPSW_z(vl == 0);
@ -772,6 +865,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
setPSW_c(true); setPSW_c(true);
else else
setPSW_c(false); setPSW_c(false);
}
break; break;
} }
@ -787,7 +881,29 @@ bool cpu::single_operand_instructions(const uint16_t instr)
} }
case 0b000110000: { // ROR/RORB case 0b000110000: { // ROR/RORB
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false); if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg, false);
bool new_carry = v & 1;
uint16_t temp = 0;
if (word_mode) {
uint16_t add = v & 0xff00;
temp = (v >> 1) | (getPSW_c() << 7) | add;
}
else {
temp = (v >> 1) | (getPSW_c() << 15);
}
setRegister(dst_reg, false, temp);
setPSW_c(new_carry);
setPSW_n(SIGN(temp, word_mode));
setPSW_z(temp == 0);
setPSW_v(getPSW_c() ^ getPSW_n());
}
else {
uint16_t a = getGAMAddress(dst_mode, dst_reg, false, false);
uint16_t t = b -> read(a, word_mode); uint16_t t = b -> read(a, word_mode);
bool new_carry = t & 1; bool new_carry = t & 1;
@ -795,23 +911,45 @@ bool cpu::single_operand_instructions(const uint16_t instr)
if (word_mode) { if (word_mode) {
temp = (t >> 1) | (getPSW_c() << 7); temp = (t >> 1) | (getPSW_c() << 7);
put_result(a, dst_mode, dst_reg, word_mode, temp); put_result(a, dst_mode, dst_reg, false, temp | (t & 0xff00));
} }
else { else {
temp = (t >> 1) | (getPSW_c() << 15); temp = (t >> 1) | (getPSW_c() << 15);
put_result(a, dst_mode, dst_reg, word_mode, temp); put_result(a, dst_mode, dst_reg, false, temp);
} }
setPSW_c(new_carry); setPSW_c(new_carry);
setPSW_n(SIGN(temp, word_mode)); setPSW_n(SIGN(temp, word_mode));
setPSW_z(temp == 0); setPSW_z(temp == 0);
setPSW_v(getPSW_c() ^ getPSW_n()); setPSW_v(getPSW_c() ^ getPSW_n());
}
break; break;
} }
case 0b000110001: { // ROL/ROLB case 0b000110001: { // ROL/ROLB
if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg, false);
bool new_carry = false;
uint16_t temp = 0;
if (word_mode) {
new_carry = v & 0x80;
temp = (((v << 1) | getPSW_c()) & 0xff) | (v & 0xff00);
}
else {
new_carry = v & 0x8000;
temp = (v << 1) | getPSW_c();
}
setRegister(dst_reg, false, temp);
setPSW_c(new_carry);
setPSW_n(SIGN(temp, word_mode));
setPSW_z(temp == 0);
setPSW_v(getPSW_c() ^ getPSW_n());
}
else {
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false); uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
uint16_t t = b -> read(a, word_mode); uint16_t t = b -> read(a, word_mode);
bool new_carry = false; bool new_carry = false;
@ -820,59 +958,102 @@ bool cpu::single_operand_instructions(const uint16_t instr)
if (word_mode) { if (word_mode) {
new_carry = t & 0x80; new_carry = t & 0x80;
temp = ((t << 1) | getPSW_c()) & 0xff; temp = ((t << 1) | getPSW_c()) & 0xff;
put_result(a, dst_mode, dst_reg, word_mode, temp);
} }
else { else {
new_carry = t & 0x8000; new_carry = t & 0x8000;
temp = (t << 1) | getPSW_c(); temp = (t << 1) | getPSW_c();
}
put_result(a, dst_mode, dst_reg, word_mode, temp); put_result(a, dst_mode, dst_reg, word_mode, temp);
}
setPSW_c(new_carry); setPSW_c(new_carry);
setPSW_n(SIGN(temp, word_mode)); setPSW_n(SIGN(temp, word_mode));
setPSW_z(temp == 0); setPSW_z(temp == 0);
setPSW_v(getPSW_c() ^ getPSW_n()); setPSW_v(getPSW_c() ^ getPSW_n());
}
break; break;
} }
case 0b000110010: { // ASR/ASRB case 0b000110010: { // ASR/ASRB
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false); if (dst_mode == 0) {
int32_t vl = b -> read(a, word_mode); uint16_t v = getRegister(dst_reg, false);
bool hb = word_mode ? vl & 128 : vl & 32768; bool hb = word_mode ? v & 128 : v & 32768;
setPSW_c(vl & 1); setPSW_c(v & 1);
vl >>= 1;
if (word_mode) if (word_mode) {
vl |= hb << 7; uint16_t add = word_mode ? v & 0xff00 : 0;
else
vl |= hb << 15;
put_result(a, dst_mode, dst_reg, word_mode, vl); v = (v & 255) >> 1;
v |= hb << 7;
v |= add;
}
else {
v >>= 1;
v |= hb << 15;
}
setPSW_n(SIGN(vl, word_mode)); setRegister(dst_reg, false, v);
setPSW_z(vl == 0);
setPSW_n(SIGN(v, word_mode));
setPSW_z(v == 0);
setPSW_v(getPSW_n() ^ getPSW_c()); setPSW_v(getPSW_n() ^ getPSW_c());
}
else {
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
uint16_t v = b -> read(a, word_mode);
uint16_t add = word_mode ? v & 0xff00 : 0;
bool hb = word_mode ? v & 128 : v & 32768;
setPSW_c(v & 1);
if (word_mode) {
v = (v & 255) >> 1;
v |= hb << 7;
v |= add;
}
else {
v >>= 1;
v |= hb << 15;
}
put_result(a, dst_mode, dst_reg, word_mode, v);
setPSW_n(SIGN(v, word_mode));
setPSW_z(v == 0);
setPSW_v(getPSW_n() ^ getPSW_c());
}
break; break;
} }
case 0b00110011: { // ASL/ASLB case 0b00110011: { // ASL/ASLB
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false); if (dst_mode == 0) {
int32_t vl = b -> read(a, word_mode); int32_t vl = getRegister(dst_reg, false);
uint16_t v = (vl << 1) & (word_mode ? 0xff : 0xffff); uint16_t v = (vl << 1) & (word_mode ? 0xff : 0xffff);
uint16_t add = word_mode ? v & 0xff00 : 0;
setPSW_n(word_mode ? v & 0x80 : v & 0x8000); setPSW_n(word_mode ? v & 0x80 : v & 0x8000);
setPSW_z(v == 0); setPSW_z(v == 0);
setPSW_c(word_mode ? vl & 0x80 : vl & 0x8000); setPSW_c(word_mode ? vl & 0x80 : vl & 0x8000);
setPSW_v(getPSW_n() ^ getPSW_c()); setPSW_v(getPSW_n() ^ getPSW_c());
put_result(a, dst_mode, dst_reg, word_mode, v); setRegister(dst_reg, false, v | add);
}
else {
uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
int32_t vl = b -> read(a, word_mode);
uint16_t v = (vl << 1) & (word_mode ? 0xff : 0xffff);
uint16_t add = word_mode ? v & 0xff00 : 0;
setPSW_n(word_mode ? v & 0x80 : v & 0x8000);
setPSW_z(v == 0);
setPSW_c(word_mode ? vl & 0x80 : vl & 0x8000);
setPSW_v(getPSW_n() ^ getPSW_c());
put_result(a, dst_mode, dst_reg, word_mode, v | add);
}
break; break;
} }