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MMR2 tracking

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This commit is contained in:
folkert van heusden 2023-03-21 14:26:58 +01:00
parent 48abb8509f
commit 2afa705209
Signed by untrusted user who does not match committer: folkert
GPG key ID: 6B6455EDFEED3BD1
2 changed files with 11 additions and 17 deletions
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26
cpu.cpp
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@ -1301,7 +1301,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
psw &= 0xff00; // only alter lower 8 bits psw &= 0xff00; // only alter lower 8 bits
psw |= getGAM(dst_mode, dst_reg, word_mode, false).value.value() & 0xef; // can't change bit 4 psw |= getGAM(dst_mode, dst_reg, word_mode, false).value.value() & 0xef; // can't change bit 4
#else #else
trap(010); schedule_trap(010);
#endif #endif
} }
else { else {
@ -1332,7 +1332,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
setPSW_n(extend_b7); setPSW_n(extend_b7);
} }
#else #else
trap(010); schedule_trap(010);
#endif #endif
} }
else { // SXT else { // SXT
@ -1446,7 +1446,7 @@ bool cpu::condition_code_operations(const uint16_t instr)
setPSW_spl(level); setPSW_spl(level);
// // trap via vector 010 only(?) on an 11/60 and not(?) on an 11/70 // // trap via vector 010 only(?) on an 11/60 and not(?) on an 11/70
// trap(010); // schedule_trap(010);
return true; return true;
} }
@ -1474,7 +1474,7 @@ void cpu::pushStack(const uint16_t v)
if (getRegister(6) == stackLimitRegister) { if (getRegister(6) == stackLimitRegister) {
DOLOG(debug, true, "stackLimitRegister reached %06o while pushing %06o", stackLimitRegister, v); DOLOG(debug, true, "stackLimitRegister reached %06o while pushing %06o", stackLimitRegister, v);
trap(123, 7); // TODO schedule_trap(123);
} }
else { else {
uint16_t a = addRegister(6, false, -2); uint16_t a = addRegister(6, false, -2);
@ -1509,11 +1509,11 @@ bool cpu::misc_operations(const uint16_t instr)
return true; return true;
case 0b0000000000000011: // BPT case 0b0000000000000011: // BPT
trap(014); schedule_trap(014);
return true; return true;
case 0b0000000000000100: // IOT case 0b0000000000000100: // IOT
trap(020); schedule_trap(020);
return true; return true;
case 0b0000000000000110: // RTT case 0b0000000000000110: // RTT
@ -1523,7 +1523,7 @@ bool cpu::misc_operations(const uint16_t instr)
case 0b0000000000000111: // MFPT case 0b0000000000000111: // MFPT
//setRegister(0, 0); //setRegister(0, 0);
trap(010); // does not exist on PDP-11/70 schedule_trap(010); // does not exist on PDP-11/70
return true; return true;
case 0b0000000000000101: // RESET case 0b0000000000000101: // RESET
@ -1533,12 +1533,12 @@ bool cpu::misc_operations(const uint16_t instr)
} }
if ((instr >> 8) == 0b10001000) { // EMT if ((instr >> 8) == 0b10001000) { // EMT
trap(030); schedule_trap(030);
return true; return true;
} }
if ((instr >> 8) == 0b10001001) { // TRAP if ((instr >> 8) == 0b10001001) { // TRAP
trap(034); schedule_trap(034);
return true; return true;
} }
@ -2177,15 +2177,9 @@ void cpu::step_b()
uint16_t temp_pc = getPC(); uint16_t temp_pc = getPC();
if ((b->getMMR0() & 0160000) == 0)
b->setMMR2(temp_pc);
try { try {
uint16_t instr = b->readWord(temp_pc); uint16_t instr = b->readWord(temp_pc);
if (temp_pc == 025250)
DOLOG(debug, true, "GREP %06o %06o", temp_pc, instr);
addRegister(7, false, 2); addRegister(7, false, 2);
if (double_operand_instructions(instr)) if (double_operand_instructions(instr))
@ -2202,7 +2196,7 @@ void cpu::step_b()
DOLOG(warning, true, "UNHANDLED instruction %06o @ %06o", instr, temp_pc); DOLOG(warning, true, "UNHANDLED instruction %06o @ %06o", instr, temp_pc);
trap(010); schedule_trap(010);
} }
catch(const int exception) { catch(const int exception) {
DOLOG(debug, true, "bus-trap during execution of command (%d)", exception); DOLOG(debug, true, "bus-trap during execution of command (%d)", exception);

2
cpu.h
View file

@ -132,7 +132,7 @@ public:
void setStackLimitRegister(const uint16_t v) { stackLimitRegister = v; } void setStackLimitRegister(const uint16_t v) { stackLimitRegister = v; }
uint16_t getStackPointer(const int which) const { assert(which >= 0 && which < 4); return sp[which]; } uint16_t getStackPointer(const int which) const { assert(which >= 0 && which < 4); return sp[which]; }
uint16_t getPC() const { return pc; } uint16_t getPC() const { b->setMMR2(pc); return pc; }
void setRegister(const int nr, const bool reg_set, const bool prev_mode, const uint16_t value); void setRegister(const int nr, const bool reg_set, const bool prev_mode, const uint16_t value);
void setRegister(const int nr, const bool prev_mode, const uint16_t v) { setRegister(nr, (getPSW() >> 11) & 1, prev_mode, v); } void setRegister(const int nr, const bool prev_mode, const uint16_t v) { setRegister(nr, (getPSW() >> 11) & 1, prev_mode, v); }