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5c3ddfcf3a
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3a5379997e
1 changed files with 13 additions and 25 deletions
38
cpu.cpp
38
cpu.cpp
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@ -458,8 +458,8 @@ void cpu::queue_interrupt(const uint8_t level, const uint8_t vector)
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void cpu::addToMMR1(const gam_rc_t & g)
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{
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if (b->getMMU()->isMMR1Locked() == false && g.mmr1_update.has_value() == true) {
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TRACE("MMR1: add %d to register R%d", g.mmr1_update.value().delta, g.mmr1_update.value().reg);
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assert(g.mmr1_update.value().delta);
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b->getMMU()->addToMMR1(g.mmr1_update.value().delta, g.mmr1_update.value().reg);
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}
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}
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@ -488,16 +488,16 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t wo
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break;
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case 2: // (Rn)+ / #n
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g.addr = get_register(reg);
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if (read_value)
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g.value = b->read(g.addr.value(), word_mode, rm_cur, isR7_space);
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add_register(reg, word_mode == wm_word || reg == 7 || reg == 6 ? 2 : 1);
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g.mmr1_update = { word_mode == wm_word || reg == 7 || reg == 6 ? 2 : 1, reg };
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if (read_value)
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g.value = b->read(g.addr.value(), word_mode, rm_cur, isR7_space);
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break;
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case 3: // @(Rn)+ / @#a
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g.addr = b->read(get_register(reg), wm_word, rm_cur, isR7_space);
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g.mmr1_update = { 2, reg };
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g.space = d_space;
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// might be wrong: the adds should happen when the read is really performed, because of traps
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// might be wrong: the adds should happen when the read is really performed(?), because of traps
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add_register(reg, 2);
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if (read_value)
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g.value = b->read(g.addr.value(), word_mode, rm_cur, g.space);
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@ -587,17 +587,18 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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gam_rc_t g_src = getGAM(src_mode, src_reg, word_mode);
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bool set_flags = true;
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if (word_mode == wm_byte && dst_mode == 0)
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if (word_mode == wm_byte && dst_mode == 0) {
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set_register(dst_reg, int8_t(g_src.value.value())); // int8_t: sign extension
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addToMMR1(g_src);
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}
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else {
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auto g_dst = getGAMAddress(dst_mode, dst_reg, word_mode);
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addToMMR1(g_dst);
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addToMMR1(g_src);
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set_flags = putGAM(g_dst, g_src.value.value());
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}
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addToMMR1(g_src);
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if (set_flags)
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setPSW_flags_nzv(g_src.value.value(), word_mode);
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@ -1799,13 +1800,8 @@ void cpu::trap(uint16_t vector, const int new_ipl, const bool is_interrupt)
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set_register(6, 04);
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}
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else {
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b->getMMU()->clearMMR1();
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before_psw = getPSW();
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before_pc = getPC();
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// TODO set MMR2?
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}
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if (debug_mode)
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@ -2449,9 +2445,6 @@ bool cpu::step()
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{
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it_is_a_trap = false;
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if (!b->getMMU()->isMMR1Locked())
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b->getMMU()->clearMMR1();
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instruction_count++;
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try {
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@ -2463,17 +2456,12 @@ bool cpu::step()
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uint16_t instr = b->read_word(instruction_start);
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add_register(7, 2);
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if (double_operand_instructions(instr))
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return true;
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if (double_operand_instructions(instr) || conditional_branch_instructions(instr) || condition_code_operations(instr) || misc_operations(instr)) {
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if (!b->getMMU()->isMMR1Locked())
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b->getMMU()->clearMMR1();
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if (conditional_branch_instructions(instr))
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return true;
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if (condition_code_operations(instr))
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return true;
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if (misc_operations(instr))
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return true;
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}
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DOLOG(warning, false, "UNHANDLED instruction %06o @ %06o", instr, instruction_start);
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@ -2482,7 +2470,7 @@ bool cpu::step()
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return false;
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}
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catch(const int exception_nr) {
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TRACE("bus-trap during execution of command (%d)", exception_nr);
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TRACE("trap during execution of command (%d)", exception_nr);
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}
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return true;
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