diff --git a/bus.cpp b/bus.cpp
index 573c143..cf37972 100644
--- a/bus.cpp
+++ b/bus.cpp
@@ -273,11 +273,6 @@ uint16_t bus::read(const uint16_t a, const bool word_mode, const bool use_prev,
 				DOLOG(debug, true, "bus::readWord: odd address UNHANDLED %o", a);
 
 			DOLOG(debug, true, "UNHANDLED read %o(%c)", a, word_mode ? 'B' : ' ');
-
-			// DEBUG CODE TODO
-			extern FILE *lfh;
-			fflush(lfh);
-			assert(false);
 		}
 
 		return -1;
diff --git a/cpu.cpp b/cpu.cpp
index 481debf..4f242fb 100644
--- a/cpu.cpp
+++ b/cpu.cpp
@@ -776,12 +776,10 @@ bool cpu::single_operand_instructions(const uint16_t instr)
 
 						  // CLRB only clears the least significant byte
 						  if (word_mode) {
-							if (dst_mode)
-								r = b->read(g_dst.addr.value(), false, false) & 0xff00;
-							else
+							if (dst_mode == 0)
 								r = getRegister(dst_reg, false, false) & 0xff00;
 
-							// both in byte and word mode the full register must be updated
+							// both in byte and word mode the full word must be updated
 							g_dst.word_mode = false;
 						  }
 
@@ -1498,7 +1496,7 @@ bool cpu::misc_operations(const uint16_t instr)
 			return true;
 
 		case 0b0000000000000100: // IOT
-			trap(020);
+			//trap(020);  disabled for debugging
 			return true;
 
 		case 0b0000000000000110: // RTT