DIV fix
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parent
aeab0b1845
commit
449817aa52
1 changed files with 18 additions and 14 deletions
32
cpu.cpp
32
cpu.cpp
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@ -488,29 +488,33 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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}
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}
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case 1: { // DIV
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case 1: { // DIV
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int32_t R0R1 = (getRegister(reg) << 16) | getRegister(reg + 1);
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int16_t divider = getGAM(dst_mode, dst_reg, false, false);
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int32_t divider = getGAM(dst_mode, dst_reg, true, false);
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if (divider == 0) {
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if (divider == 0) { // divide by zero
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setPSW_n(false);
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setPSW_n(false);
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setPSW_z(true);
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setPSW_z(true);
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setPSW_v(true);
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setPSW_v(true);
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setPSW_c(true);
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setPSW_c(true);
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break;
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}
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}
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else {
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int32_t quot = R0R1 / divider;
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uint16_t rem = R0R1 % divider;
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// TODO: handle results out of range
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int32_t R0R1 = (getRegister(reg) << 16) | getRegister(reg + 1);
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setRegister(reg, quot);
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int32_t quot = R0R1 / divider;
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setRegister(reg + 1, rem);
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uint16_t rem = R0R1 % divider;
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fprintf(stderr, "value: %d, divider: %d, gives: %d / %d\n", R0R1, divider, quot, rem);
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fprintf(stderr, "value: %o, divider: %o, gives: %o / %o\n", R0R1, divider, quot, rem);
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setPSW_n(quot < 0);
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// TODO: handle results out of range
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setPSW_z(quot == 0);
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setPSW_v(quot > 0xffff || quot < -0xffff);
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setRegister(reg, quot);
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setPSW_c(false);
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setRegister(reg + 1, rem);
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}
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setPSW_n(quot < 0);
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setPSW_z(quot == 0);
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setPSW_v(quot > 32767 || quot < -32768);
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setPSW_c(false);
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return true;
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return true;
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}
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}
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