changes to make it compile on ESP32 (does currently not support "std::optional")
This commit is contained in:
folkert van heusden
parent
f5bea4b5dc
commit
517f2afb9b
3 changed files with 61 additions and 59 deletions
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@ -2,13 +2,9 @@
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default_envs = serial32
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src_dir = .
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[env]
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framework = arduino
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lib_ldf_mode = deep+
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lib_deps =
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src_filter = +<*> -<.git/> -<.svn/> -<example/> -<examples/> -<test/> -<tests/> -<build> -<player.cpp>
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[env:serial32]
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lib_ldf_mode = deep+
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src_filter = +<*> -<.git/> -<.svn/> -<example/> -<examples/> -<test/> -<tests/> -<build> -<player.cpp>
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platform = espressif32
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board = wemos_d1_mini32
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framework = arduino
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@ -16,5 +12,5 @@ monitor_speed = 115200
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upload_speed = 1000000
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lib_deps = greiman/SdFat@^2.1.2
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adafruit/Adafruit NeoPixel@^1.10.4
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build_flags = -std=c++17 -Ofast -DESP32=1
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build_flags = -std=gnu++17 -Ofast -DESP32=1
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build_unflags = -std=gnu++11 -Os
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100
cpu.cpp
100
cpu.cpp
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@ -1433,7 +1433,7 @@ void cpu::trap(const uint16_t vector, const int new_ipl)
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D(fprintf(stderr, "TRAP %o: PC is now %06o, PSW is now %06o\n", vector, getPC(), new_psw);)
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}
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std::tuple<std::string, int, std::optional<uint16_t>, uint16_t> cpu::addressing_to_string(const uint8_t mode_register, const uint16_t pc, const bool word_mode) const
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cpu::operand_parameters cpu::addressing_to_string(const uint8_t mode_register, const uint16_t pc, const bool word_mode) const
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{
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assert(mode_register < 64);
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@ -1453,43 +1453,43 @@ std::tuple<std::string, int, std::optional<uint16_t>, uint16_t> cpu::addressing_
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switch(mode_register >> 3) {
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case 0:
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return { reg_name, 2, { }, uint16_t(getRegister(reg) & mask) };
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return { reg_name, 2, -1, uint16_t(getRegister(reg) & mask) };
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case 1:
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return { format("(%s)", reg_name.c_str()), 2, { }, uint16_t(b->readWord(getRegister(reg)) & mask) };
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return { format("(%s)", reg_name.c_str()), 2, -1, uint16_t(b->readWord(getRegister(reg)) & mask) };
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case 2:
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if (reg == 7)
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return { format("#%06o", next_word), 4, next_word, uint16_t(next_word & mask) };
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return { format("#%06o", next_word), 4, int(next_word), uint16_t(next_word & mask) };
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return { format("(%s)+", reg_name.c_str()), 2, { }, uint16_t(b->readWord(getRegister(reg)) & mask) };
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return { format("(%s)+", reg_name.c_str()), 2, -1, uint16_t(b->readWord(getRegister(reg)) & mask) };
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case 3:
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if (reg == 7)
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return { format("@#%06o", next_word), 4, next_word, uint16_t(b->readWord(next_word) & mask) };
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return { format("@#%06o", next_word), 4, int(next_word), uint16_t(b->readWord(next_word) & mask) };
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return { format("@(%s)+", reg_name.c_str()), 2, { }, uint16_t(b->readWord(b->readWord(getRegister(reg))) & mask) };
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return { format("@(%s)+", reg_name.c_str()), 2, -1, uint16_t(b->readWord(b->readWord(getRegister(reg))) & mask) };
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case 4:
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return { format("-(%s)", reg_name.c_str()), 2, { }, uint16_t(b->readWord(getRegister(reg) - (word_mode == false || reg >= 6 ? 2 : 1)) & mask) };
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return { format("-(%s)", reg_name.c_str()), 2, -1, uint16_t(b->readWord(getRegister(reg) - (word_mode == false || reg >= 6 ? 2 : 1)) & mask) };
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case 5:
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return { format("@-(%s)", reg_name.c_str()), 2, { }, uint16_t(b->readWord(b->readWord(getRegister(reg) - 2)) & mask) };
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return { format("@-(%s)", reg_name.c_str()), 2, -1, uint16_t(b->readWord(b->readWord(getRegister(reg) - 2)) & mask) };
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case 6:
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if (reg == 7)
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return { format("%06o", (pc + next_word + 2) & 65535), 4, next_word, uint16_t(b->readWord(getRegister(reg) + next_word) & mask) };
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return { format("%06o", (pc + next_word + 2) & 65535), 4, int(next_word), uint16_t(b->readWord(getRegister(reg) + next_word) & mask) };
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return { format("%o(%s)", next_word, reg_name.c_str()), 4, next_word, uint16_t(b->readWord(getRegister(reg) + next_word) & mask) };
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return { format("%o(%s)", next_word, reg_name.c_str()), 4, int(next_word), uint16_t(b->readWord(getRegister(reg) + next_word) & mask) };
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case 7:
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if (reg == 7)
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return { format("@%06o", next_word), 4, next_word, uint16_t(b->readWord(b->readWord(getRegister(reg) + next_word)) & mask) };
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return { format("@%06o", next_word), 4, int(next_word), uint16_t(b->readWord(b->readWord(getRegister(reg) + next_word)) & mask) };
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return { format("@%o(%s)", next_word, reg_name.c_str()), 4, next_word, uint16_t(b->readWord(b->readWord(getRegister(reg) + next_word)) & mask) };
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return { format("@%o(%s)", next_word, reg_name.c_str()), 4, int(next_word), uint16_t(b->readWord(b->readWord(getRegister(reg) + next_word)) & mask) };
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}
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return { "??", 0, { }, 0123456 };
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return { "??", 0, -1, 0123456 };
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}
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std::map<std::string, std::vector<std::string> > cpu::disassemble(const uint16_t addr) const
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@ -1521,18 +1521,18 @@ std::map<std::string, std::vector<std::string> > cpu::disassemble(const uint16_t
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// TODO: 100000011
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if (do_opcode == 0b000) {
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auto dst_text = addressing_to_string(dst_register, (pc + 2) & 65535, word_mode);
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auto dst_text { addressing_to_string(dst_register, (pc + 2) & 65535, word_mode) };
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auto next_word = std::get<2>(dst_text);
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if (next_word.has_value())
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instruction_words.push_back(next_word.value());
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auto next_word = dst_text.instruction_part;
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if (next_word != -1)
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instruction_words.push_back(next_word);
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work_values.push_back(std::get<3>(dst_text));
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work_values.push_back(dst_text.work_value);
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// single_operand_instructions
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switch(so_opcode) {
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case 0b00000011:
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text = "SWAB " + std::get<0>(dst_text);
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text = "SWAB " + dst_text.operand;
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break;
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case 0b000101000:
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@ -1605,17 +1605,17 @@ std::map<std::string, std::vector<std::string> > cpu::disassemble(const uint16_t
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}
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if (text.empty() && name.empty() == false)
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text = name + word_mode_str + space + std::get<0>(dst_text);
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text = name + word_mode_str + space + dst_text.operand;
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}
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else if (do_opcode == 0b111) {
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std::string src_text = format("R%d", (instruction >> 6) & 7);
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auto dst_text = addressing_to_string(dst_register, (pc + 2) & 65535, word_mode);
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auto dst_text { addressing_to_string(dst_register, (pc + 2) & 65535, word_mode) };
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auto next_word = std::get<2>(dst_text);
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if (next_word.has_value())
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instruction_words.push_back(next_word.value());
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auto next_word = dst_text.instruction_part;
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if (next_word != -1)
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instruction_words.push_back(next_word);
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work_values.push_back(std::get<3>(dst_text));
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work_values.push_back(dst_text.work_value);
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switch(ado_opcode) { // additional double operand
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case 0:
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@ -1644,7 +1644,7 @@ std::map<std::string, std::vector<std::string> > cpu::disassemble(const uint16_t
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}
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if (text.empty() && name.empty() == false)
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text = name + space + src_text + comma + std::get<0>(dst_text);
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text = name + space + src_text + comma + dst_text.operand;
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}
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else {
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switch(do_opcode) {
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@ -1677,24 +1677,24 @@ std::map<std::string, std::vector<std::string> > cpu::disassemble(const uint16_t
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}
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// source
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auto src_text = addressing_to_string(src_register, (pc + 2) & 65535, word_mode);
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auto src_text { addressing_to_string(src_register, (pc + 2) & 65535, word_mode) };
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auto next_word_src = std::get<2>(src_text);
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if (next_word_src.has_value())
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instruction_words.push_back(next_word_src.value());
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auto next_word_src = src_text.instruction_part;
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if (next_word_src != -1)
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instruction_words.push_back(next_word_src);
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work_values.push_back(std::get<3>(src_text));
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work_values.push_back(src_text.work_value);
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// destination
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auto dst_text = addressing_to_string(dst_register, (pc + std::get<1>(src_text)) & 65535, word_mode);
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auto dst_text { addressing_to_string(dst_register, (pc + src_text.length) & 65535, word_mode) };
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auto next_word_dst = std::get<2>(dst_text);
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if (next_word_dst.has_value())
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instruction_words.push_back(next_word_dst.value());
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auto next_word_dst = dst_text.instruction_part;
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if (next_word_dst != -1)
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instruction_words.push_back(next_word_dst);
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work_values.push_back(std::get<3>(dst_text));
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work_values.push_back(dst_text.work_value);
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text = name + word_mode_str + space + std::get<0>(src_text) + comma + std::get<0>(dst_text);
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text = name + word_mode_str + space + src_text.operand + comma + dst_text.operand;
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}
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if (text.empty()) { // conditional branch instructions
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@ -1837,27 +1837,27 @@ std::map<std::string, std::vector<std::string> > cpu::disassemble(const uint16_t
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text = format("TRAP %o", instruction & 255);
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if ((instruction & ~0b111111) == 0b0000000001000000) {
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auto dst_text = addressing_to_string(dst_register, (pc + 2) & 65535, word_mode);
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auto dst_text { addressing_to_string(dst_register, (pc + 2) & 65535, word_mode) };
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auto next_word = std::get<2>(dst_text);
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if (next_word.has_value())
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instruction_words.push_back(next_word.value());
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auto next_word = dst_text.instruction_part;
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if (next_word != -1)
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instruction_words.push_back(next_word);
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work_values.push_back(std::get<3>(dst_text));
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work_values.push_back(dst_text.work_value);
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text = std::string("JMP ") + std::get<0>(dst_text);
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text = std::string("JMP ") + dst_text.operand;
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}
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if ((instruction & 0b1111111000000000) == 0b0000100000000000) {
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auto dst_text = addressing_to_string(dst_register, (pc + 2) & 65535, word_mode);
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auto dst_text { addressing_to_string(dst_register, (pc + 2) & 65535, word_mode) };
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auto next_word = std::get<2>(dst_text);
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if (next_word.has_value())
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instruction_words.push_back(next_word.value());
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auto next_word = dst_text.instruction_part;
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if (next_word != -1)
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instruction_words.push_back(next_word);
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work_values.push_back(std::get<3>(dst_text));
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work_values.push_back(dst_text.work_value);
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text = format("JSR R%d,", src_register & 7) + std::get<0>(dst_text);
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text = format("JSR R%d,", src_register & 7) + dst_text.operand;
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}
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if ((instruction & 0b1111111111111000) == 0b0000000010000000)
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10
cpu.h
10
cpu.h
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@ -4,7 +4,6 @@
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#include <assert.h>
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#include <map>
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#include <optional>
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#include <set>
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#include <stdint.h>
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#include <vector>
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@ -51,7 +50,14 @@ private:
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bool condition_code_operations(const uint16_t instr);
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bool misc_operations(const uint16_t instr);
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std::tuple<std::string, int, std::optional<uint16_t>, uint16_t> addressing_to_string(const uint8_t mode_register, const uint16_t pc, const bool word_mode) const;
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struct operand_parameters {
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std::string operand;
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int length;
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int instruction_part;
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uint16_t work_value;
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};
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operand_parameters addressing_to_string(const uint8_t mode_register, const uint16_t pc, const bool word_mode) const;
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std::map<std::string, std::vector<std::string> > disassemble(const uint16_t addr) const;
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void disassemble(void) const;
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