ASHC fix (see ASH)

This commit is contained in:
folkert van heusden 2022-03-19 22:09:19 +01:00
parent d71f441877
commit 52bdfbdaa1

View file

@ -495,7 +495,8 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
case 3: { // ASHC case 3: { // ASHC
uint32_t R0R1 = (getRegister(reg) << 16) | getRegister(reg + 1); uint32_t R0R1 = (getRegister(reg) << 16) | getRegister(reg + 1);
int16_t shift = getGAM(dst_mode, dst_reg, true, false); uint16_t a = getGAMAddress(dst_mode, dst_reg, false, false);
int16_t shift = b->read(a, false);
if (shift > 0) { if (shift > 0) {
R0R1 <<= (shift & 0b111111) - 1; R0R1 <<= (shift & 0b111111) - 1;
@ -503,7 +504,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
R0R1 <<= 1; R0R1 <<= 1;
} }
else if (shift < 0) { else if (shift < 0) {
R0R1 >>= -(shift & 0b111111) - 1; R0R1 >>= -((shift & 0b111111) - 1);
setPSW_c(R0R1 & 1); setPSW_c(R0R1 & 1);
R0R1 >>= 1; R0R1 >>= 1;
} }