From 5898943eca100a5a30fac581ffb6d488041b42a3 Mon Sep 17 00:00:00 2001 From: folkert van heusden Date: Sat, 4 May 2024 19:23:40 +0200 Subject: [PATCH] TRACE() --- bus.cpp | 154 +++++++++++++++++++++--------------------- console.cpp | 6 +- cpu.cpp | 24 +++---- debugger.cpp | 17 +++-- debugger.h | 4 +- disk_backend_file.cpp | 4 +- disk_backend_nbd.cpp | 4 +- kw11-l.cpp | 10 +-- loaders.cpp | 2 +- log.cpp | 31 ++++++--- log.h | 13 ++++ main.cpp | 7 +- mmu.cpp | 27 ++++---- rk05.cpp | 16 ++--- rl02.cpp | 18 ++--- tm-11.cpp | 12 ++-- tty.cpp | 8 +-- 17 files changed, 190 insertions(+), 167 deletions(-) diff --git a/bus.cpp b/bus.cpp index b9b2dee..e5e29be 100644 --- a/bus.cpp +++ b/bus.cpp @@ -137,7 +137,7 @@ void bus::set_memory_size(const int n_pages) mmu_->begin(m); - DOLOG(info, false, "Memory is now %u kB in size", n_bytes / 1024); + TRACE("Memory is now %u kB in size", n_bytes / 1024); } void bus::reset() @@ -231,39 +231,39 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm //// REGISTERS //// if (a >= ADDR_KERNEL_R && a <= ADDR_KERNEL_R + 5) { // kernel R0-R5 uint16_t temp = c->getRegister(a - ADDR_KERNEL_R) & (word_mode == wm_byte ? 0xff : 0xffff); - if (!peek_only) DOLOG(debug, false, "READ-I/O kernel R%d: %06o", a - ADDR_KERNEL_R, temp); + if (!peek_only) TRACE("READ-I/O kernel R%d: %06o", a - ADDR_KERNEL_R, temp); return temp; } if (a >= ADDR_USER_R && a <= ADDR_USER_R + 5) { // user R0-R5 uint16_t temp = c->getRegister(a - ADDR_USER_R) & (word_mode == wm_byte ? 0xff : 0xffff); - if (!peek_only) DOLOG(debug, false, "READ-I/O user R%d: %06o", a - ADDR_USER_R, temp); + if (!peek_only) TRACE("READ-I/O user R%d: %06o", a - ADDR_USER_R, temp); return temp; } if (a == ADDR_KERNEL_SP) { // kernel SP uint16_t temp = c->getStackPointer(0) & (word_mode == wm_byte ? 0xff : 0xffff); - if (!peek_only) DOLOG(debug, false, "READ-I/O kernel SP: %06o", temp); + if (!peek_only) TRACE("READ-I/O kernel SP: %06o", temp); return temp; } if (a == ADDR_PC) { // PC uint16_t temp = c->getPC() & (word_mode == wm_byte ? 0xff : 0xffff); - if (!peek_only) DOLOG(debug, false, "READ-I/O PC: %06o", temp); + if (!peek_only) TRACE("READ-I/O PC: %06o", temp); return temp; } if (a == ADDR_SV_SP) { // supervisor SP uint16_t temp = c->getStackPointer(1) & (word_mode == wm_byte ? 0xff : 0xffff); - if (!peek_only) DOLOG(debug, false, "READ-I/O supervisor SP: %06o", temp); + if (!peek_only) TRACE("READ-I/O supervisor SP: %06o", temp); return temp; } if (a == ADDR_USER_SP) { // user SP uint16_t temp = c->getStackPointer(3) & (word_mode == wm_byte ? 0xff : 0xffff); - if (!peek_only) DOLOG(debug, false, "READ-I/O user SP: %06o", temp); + if (!peek_only) TRACE("READ-I/O user SP: %06o", temp); return temp; } ///^ registers ^/// if (!peek_only) { if ((a & 1) && word_mode == wm_word) [[unlikely]] { - DOLOG(debug, false, "READ-I/O odd address %06o UNHANDLED", a); + TRACE("READ-I/O odd address %06o UNHANDLED", a); mmu_->trap_if_odd(addr_in, run_mode, space, false); throw 0; return 0; @@ -272,25 +272,25 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm if (a == ADDR_CPU_ERR) { // cpu error register uint16_t temp = mmu_->getCPUERR() & 0xff; - if (!peek_only) DOLOG(debug, false, "READ-I/O CPU error: %03o", temp); + if (!peek_only) TRACE("READ-I/O CPU error: %03o", temp); return temp; } if (a == ADDR_MAINT) { // MAINT uint16_t temp = 1; // POWER OK - if (!peek_only) DOLOG(debug, false, "READ-I/O MAINT: %o", temp); + if (!peek_only) TRACE("READ-I/O MAINT: %o", temp); return temp; } if (a == ADDR_CONSW) { // console switch & display register uint16_t temp = console_switches; - if (!peek_only) DOLOG(debug, false, "READ-I/O console switch: %o", temp); + if (!peek_only) TRACE("READ-I/O console switch: %o", temp); return temp; } if (a == ADDR_KW11P) { // KW11P programmable clock uint16_t temp = 128; - if (!peek_only) DOLOG(debug, false, "READ-I/O programmable clock: %o", temp); + if (!peek_only) TRACE("READ-I/O programmable clock: %o", temp); return temp; } @@ -304,13 +304,13 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm else temp = a == ADDR_PIR ? PIR & 255 : PIR >> 8; - if (!peek_only) DOLOG(debug, false, "READ-I/O PIR: %o", temp); + if (!peek_only) TRACE("READ-I/O PIR: %o", temp); return temp; } if (a == ADDR_SYSTEM_ID) { uint16_t temp = 011064; - if (!peek_only) DOLOG(debug, false, "READ-I/O system id: %o", temp); + if (!peek_only) TRACE("READ-I/O system id: %o", temp); return temp; } @@ -319,7 +319,7 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm if (a == ADDR_LP11CSR) { // printer, CSR register, LP11 uint16_t temp = 0x80; - if (!peek_only) DOLOG(debug, false, "READ-I/O LP11 CSR: %o", temp); + if (!peek_only) TRACE("READ-I/O LP11 CSR: %o", temp); return temp; } @@ -338,137 +338,137 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm /////////// if (a >= 0177740 && a <= 0177753) { // cache control register and others - if (!peek_only) DOLOG(debug, false, "READ-I/O cache control register/others (%06o): %o", a, 0); + if (!peek_only) TRACE("READ-I/O cache control register/others (%06o): %o", a, 0); // TODO return 0; } if (a >= 0170200 && a <= 0170377) { // unibus map - if (!peek_only) DOLOG(debug, false, "READ-I/O unibus map (%06o): %o", a, 0); + if (!peek_only) TRACE("READ-I/O unibus map (%06o): %o", a, 0); // TODO return 0; } if (a >= 0172100 && a <= 0172137) { // MM11-LP parity - if (!peek_only) DOLOG(debug, false, "READ-I/O MM11-LP parity (%06o): %o", a, 1); + if (!peek_only) TRACE("READ-I/O MM11-LP parity (%06o): %o", a, 1); return 1; } if (word_mode == wm_byte) { if (a == ADDR_PSW) { // PSW uint8_t temp = c->getPSW(); - if (!peek_only) DOLOG(debug, false, "READ-I/O PSW LSB: %03o", temp); + if (!peek_only) TRACE("READ-I/O PSW LSB: %03o", temp); return temp; } if (a == ADDR_PSW + 1) { uint8_t temp = c->getPSW() >> 8; - if (!peek_only) DOLOG(debug, false, "READ-I/O PSW MSB: %03o", temp); + if (!peek_only) TRACE("READ-I/O PSW MSB: %03o", temp); return temp; } if (a == ADDR_STACKLIM) { // stack limit register uint8_t temp = c->getStackLimitRegister(); - if (!peek_only) DOLOG(debug, false, "READ-I/O stack limit register (low): %03o", temp); + if (!peek_only) TRACE("READ-I/O stack limit register (low): %03o", temp); return temp; } if (a == ADDR_STACKLIM + 1) { // stack limit register uint8_t temp = c->getStackLimitRegister() >> 8; - if (!peek_only) DOLOG(debug, false, "READ-I/O stack limit register (high): %03o", temp); + if (!peek_only) TRACE("READ-I/O stack limit register (high): %03o", temp); return temp; } if (a == ADDR_MICROPROG_BREAK_REG) { // microprogram break register uint8_t temp = microprogram_break_register; - if (!peek_only) DOLOG(debug, false, "READ-I/O microprogram break register (low): %03o", temp); + if (!peek_only) TRACE("READ-I/O microprogram break register (low): %03o", temp); return temp; } if (a == ADDR_MICROPROG_BREAK_REG + 1) { // microprogram break register uint8_t temp = microprogram_break_register >> 8; - if (!peek_only) DOLOG(debug, false, "READ-I/O microprogram break register (high): %03o", temp); + if (!peek_only) TRACE("READ-I/O microprogram break register (high): %03o", temp); return temp; } if (a == ADDR_MMR0) { uint8_t temp = mmu_->getMMR0(); - if (!peek_only) DOLOG(debug, false, "READ-I/O MMR0 LO: %03o", temp); + if (!peek_only) TRACE("READ-I/O MMR0 LO: %03o", temp); return temp; } if (a == ADDR_MMR0 + 1) { uint8_t temp = mmu_->getMMR0() >> 8; - if (!peek_only) DOLOG(debug, false, "READ-I/O MMR0 HI: %03o", temp); + if (!peek_only) TRACE("READ-I/O MMR0 HI: %03o", temp); return temp; } } else { if (a == ADDR_MMR0) { uint16_t temp = mmu_->getMMR0(); - if (!peek_only) DOLOG(debug, false, "READ-I/O MMR0: %06o", temp); + if (!peek_only) TRACE("READ-I/O MMR0: %06o", temp); return temp; } if (a == ADDR_MMR1) { // MMR1 uint16_t temp = mmu_->getMMR1(); - if (!peek_only) DOLOG(debug, false, "READ-I/O MMR1: %06o", temp); + if (!peek_only) TRACE("READ-I/O MMR1: %06o", temp); return temp; } if (a == ADDR_MMR2) { // MMR2 uint16_t temp = mmu_->getMMR2(); - if (!peek_only) DOLOG(debug, false, "READ-I/O MMR2: %06o", temp); + if (!peek_only) TRACE("READ-I/O MMR2: %06o", temp); return temp; } if (a == ADDR_MMR3) { // MMR3 uint16_t temp = mmu_->getMMR3(); - if (!peek_only) DOLOG(debug, false, "READ-I/O MMR3: %06o", temp); + if (!peek_only) TRACE("READ-I/O MMR3: %06o", temp); return temp; } if (a == ADDR_PSW) { // PSW uint16_t temp = c->getPSW(); - if (!peek_only) DOLOG(debug, false, "READ-I/O PSW: %06o", temp); + if (!peek_only) TRACE("READ-I/O PSW: %06o", temp); return temp; } if (a == ADDR_STACKLIM) { // stack limit register uint16_t temp = c->getStackLimitRegister(); - if (!peek_only) DOLOG(debug, false, "READ-I/O stack limit register: %06o", temp); + if (!peek_only) TRACE("READ-I/O stack limit register: %06o", temp); return temp; } if (a == ADDR_CPU_ERR) { // cpu error register uint16_t temp = mmu_->getCPUERR(); - if (!peek_only) DOLOG(debug, false, "READ-I/O CPUERR: %06o", temp); + if (!peek_only) TRACE("READ-I/O CPUERR: %06o", temp); return temp; } if (a == ADDR_MICROPROG_BREAK_REG) { // microprogram break register uint16_t temp = microprogram_break_register; - if (!peek_only) DOLOG(debug, false, "READ-I/O microprogram break register: %06o", temp); + if (!peek_only) TRACE("READ-I/O microprogram break register: %06o", temp); return temp; } } if (tm11 && a >= TM_11_BASE && a < TM_11_END && !peek_only) { - DOLOG(debug, false, "READ-I/O TM11 register %d", (a - TM_11_BASE) / 2); + TRACE("READ-I/O TM11 register %d", (a - TM_11_BASE) / 2); return word_mode == wm_byte ? tm11->read_byte(a) : tm11->read_word(a); } if (rk05_ && a >= RK05_BASE && a < RK05_END && !peek_only) { - DOLOG(debug, false, "READ-I/O RK05 register %d", (a - RK05_BASE) / 2); + TRACE("READ-I/O RK05 register %d", (a - RK05_BASE) / 2); return word_mode == wm_byte ? rk05_->read_byte(a) : rk05_->read_word(a); } if (rl02_ && a >= RL02_BASE && a < RL02_END && !peek_only) { - DOLOG(debug, false, "READ-I/O RL02 register %d", (a - RL02_BASE) / 2); + TRACE("READ-I/O RL02 register %d", (a - RL02_BASE) / 2); return word_mode == wm_byte ? rl02_->read_byte(a) : rl02_->read_word(a); } if (tty_ && a >= PDP11TTY_BASE && a < PDP11TTY_END && !peek_only) { - DOLOG(debug, false, "READ-I/O TTY register %d", (a - PDP11TTY_BASE) / 2); + TRACE("READ-I/O TTY register %d", (a - PDP11TTY_BASE) / 2); return word_mode == wm_byte ? tty_->read_byte(a) : tty_->read_word(a); } @@ -478,18 +478,18 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm if (a == ADDR_SYSSIZE + 2) { // system size HI uint16_t temp = system_size >> 16; - if (!peek_only) DOLOG(debug, false, "READ-I/O accessing system size HI: %06o", temp); + if (!peek_only) TRACE("READ-I/O accessing system size HI: %06o", temp); return temp; } if (a == ADDR_SYSSIZE) { // system size LO uint16_t temp = system_size; - if (!peek_only) DOLOG(debug, false, "READ-I/O accessing system size LO: %06o", temp); + if (!peek_only) TRACE("READ-I/O accessing system size LO: %06o", temp); return temp; } if (!peek_only) { - DOLOG(debug, false, "READ-I/O UNHANDLED read %08o (%c), (base: %o)", m_offset, word_mode == wm_byte ? 'B' : ' ', mmu_->get_io_base()); + TRACE("READ-I/O UNHANDLED read %08o (%c), (base: %o)", m_offset, word_mode == wm_byte ? 'B' : ' ', mmu_->get_io_base()); c->trap(004); // no such i/o throw 1; @@ -499,7 +499,7 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm } if (peek_only == false && word_mode == wm_word && (addr_in & 1)) { - DOLOG(debug, false, "READ from %06o - odd address!", addr_in); + TRACE("READ from %06o - odd address!", addr_in); mmu_->trap_if_odd(addr_in, run_mode, space, false); throw 2; return 0; @@ -507,7 +507,7 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm if (m_offset >= m->get_memory_size()) { if (peek_only) { - DOLOG(debug, false, "READ from %06o - out of range!", addr_in); + TRACE("READ from %06o - out of range!", addr_in); return 0; } @@ -521,7 +521,7 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm else temp = m->read_word(m_offset); - if (!peek_only) DOLOG(debug, false, "READ from %06o/%07o %c %c: %06o (%s)", addr_in, m_offset, space == d_space ? 'D' : 'I', word_mode == wm_byte ? 'B' : 'W', temp, mode_selection == rm_prev ? "prev" : "cur"); + if (!peek_only) TRACE("READ from %06o/%07o %c %c: %06o (%s)", addr_in, m_offset, space == d_space ? 'D' : 'I', word_mode == wm_byte ? 'B' : 'W', temp, mode_selection == rm_prev ? "prev" : "cur"); return temp; } @@ -561,7 +561,7 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1 if (word_mode == wm_byte) { if (a == ADDR_PSW || a == ADDR_PSW + 1) { // PSW - DOLOG(debug, false, "WRITE-I/O PSW %s: %03o", a & 1 ? "MSB" : "LSB", value); + TRACE("WRITE-I/O PSW %s: %03o", a & 1 ? "MSB" : "LSB", value); uint16_t vtemp = c->getPSW(); @@ -575,7 +575,7 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1 } if (a == ADDR_STACKLIM || a == ADDR_STACKLIM + 1) { // stack limit register - DOLOG(debug, false, "WRITE-I/O stack limit register %s: %03o", a & 1 ? "MSB" : "LSB", value); + TRACE("WRITE-I/O stack limit register %s: %03o", a & 1 ? "MSB" : "LSB", value); uint16_t v = c->getStackLimitRegister(); @@ -589,7 +589,7 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1 } if (a == ADDR_MICROPROG_BREAK_REG || a == ADDR_MICROPROG_BREAK_REG + 1) { // microprogram break register - DOLOG(debug, false, "WRITE-I/O micropram break register %s: %03o", a & 1 ? "MSB" : "LSB", value); + TRACE("WRITE-I/O micropram break register %s: %03o", a & 1 ? "MSB" : "LSB", value); update_word(µprogram_break_register, a & 1, value); @@ -597,7 +597,7 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1 } if (a == ADDR_MMR0 || a == ADDR_MMR0 + 1) { // MMR0 - DOLOG(debug, false, "WRITE-I/O MMR0 register %s: %03o", a & 1 ? "MSB" : "LSB", value); + TRACE("WRITE-I/O MMR0 register %s: %03o", a & 1 ? "MSB" : "LSB", value); uint16_t temp = mmu_->getMMR0(); update_word(&temp, a & 1, value); @@ -608,77 +608,77 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1 } else { if (a == ADDR_PSW) { // PSW - DOLOG(debug, false, "WRITE-I/O PSW: %06o", value); + TRACE("WRITE-I/O PSW: %06o", value); c->setPSW(value & ~16, false); return { true }; } if (a == ADDR_STACKLIM) { // stack limit register - DOLOG(debug, false, "WRITE-I/O stack limit register: %06o", value); + TRACE("WRITE-I/O stack limit register: %06o", value); c->setStackLimitRegister(value & 0xff00); return { false }; } if (a >= ADDR_KERNEL_R && a <= ADDR_KERNEL_R + 5) { // kernel R0-R5 int reg = a - ADDR_KERNEL_R; - DOLOG(debug, false, "WRITE-I/O kernel R%d: %06o", reg, value); + TRACE("WRITE-I/O kernel R%d: %06o", reg, value); c->setRegister(reg, value); return { false }; } if (a >= ADDR_USER_R && a <= ADDR_USER_R + 5) { // user R0-R5 int reg = a - ADDR_USER_R; - DOLOG(debug, false, "WRITE-I/O user R%d: %06o", reg, value); + TRACE("WRITE-I/O user R%d: %06o", reg, value); c->setRegister(reg, value); return { false }; } if (a == ADDR_KERNEL_SP) { // kernel SP - DOLOG(debug, false, "WRITE-I/O kernel SP: %06o", value); + TRACE("WRITE-I/O kernel SP: %06o", value); c->setStackPointer(0, value); return { false }; } if (a == ADDR_PC) { // PC - DOLOG(debug, false, "WRITE-I/O PC: %06o", value); + TRACE("WRITE-I/O PC: %06o", value); c->setPC(value); return { false }; } if (a == ADDR_SV_SP) { // supervisor SP - DOLOG(debug, false, "WRITE-I/O supervisor sp: %06o", value); + TRACE("WRITE-I/O supervisor sp: %06o", value); c->setStackPointer(1, value); return { false }; } if (a == ADDR_USER_SP) { // user SP - DOLOG(debug, false, "WRITE-I/O user sp: %06o", value); + TRACE("WRITE-I/O user sp: %06o", value); c->setStackPointer(3, value); return { false }; } if (a == ADDR_MICROPROG_BREAK_REG) { // microprogram break register - DOLOG(debug, false, "WRITE-I/O microprogram break register: %06o", value); + TRACE("WRITE-I/O microprogram break register: %06o", value); microprogram_break_register = value & 0xff; // only 8b on 11/70? return { false }; } } if (a == ADDR_CPU_ERR) { // cpu error register - DOLOG(debug, false, "WRITE-I/O CPUERR: %06o", value); + TRACE("WRITE-I/O CPUERR: %06o", value); mmu_->setCPUERR(0); return { false }; } if (a == ADDR_MMR3) { // MMR3 - DOLOG(debug, false, "WRITE-I/O set MMR3: %06o", value); + TRACE("WRITE-I/O set MMR3: %06o", value); mmu_->setMMR3(value); return { false }; } if (a == ADDR_MMR0) { // MMR0 - DOLOG(debug, false, "WRITE-I/O set MMR0: %06o", value); + TRACE("WRITE-I/O set MMR0: %06o", value); mmu_->setMMR0(value); return { false }; } if (a == ADDR_PIR) { // PIR - DOLOG(debug, false, "WRITE-I/O set PIR: %06o", value); + TRACE("WRITE-I/O set PIR: %06o", value); value &= 0177000; @@ -701,31 +701,31 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1 } if (tm11 && a >= TM_11_BASE && a < TM_11_END) { - DOLOG(debug, false, "WRITE-I/O TM11 register %d: %06o", (a - TM_11_BASE) / 2, value); + TRACE("WRITE-I/O TM11 register %d: %06o", (a - TM_11_BASE) / 2, value); word_mode == wm_byte ? tm11->write_byte(a, value) : tm11->write_word(a, value); return { false }; } if (rk05_ && a >= RK05_BASE && a < RK05_END) { - DOLOG(debug, false, "WRITE-I/O RK05 register %d: %06o", (a - RK05_BASE) / 2, value); + TRACE("WRITE-I/O RK05 register %d: %06o", (a - RK05_BASE) / 2, value); word_mode == wm_byte ? rk05_->write_byte(a, value) : rk05_->write_word(a, value); return { false }; } if (rl02_ && a >= RL02_BASE && a < RL02_END) { - DOLOG(debug, false, "WRITE-I/O RL02 register %d: %06o", (a - RL02_BASE) / 2, value); + TRACE("WRITE-I/O RL02 register %d: %06o", (a - RL02_BASE) / 2, value); word_mode == wm_byte ? rl02_->write_byte(a, value) : rl02_->write_word(a, value); return { false }; } if (tty_ && a >= PDP11TTY_BASE && a < PDP11TTY_END) { - DOLOG(debug, false, "WRITE-I/O TTY register %d: %06o", (a - PDP11TTY_BASE) / 2, value); + TRACE("WRITE-I/O TTY register %d: %06o", (a - PDP11TTY_BASE) / 2, value); word_mode == wm_byte ? tty_->write_byte(a, value) : tty_->write_word(a, value); return { false }; } if (a >= 0172100 && a <= 0172137) { // MM11-LP parity - DOLOG(debug, false, "WRITE-I/O MM11-LP parity (%06o): %o", a, value); + TRACE("WRITE-I/O MM11-LP parity (%06o): %o", a, value); return { false }; } @@ -751,7 +751,7 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1 } if (a >= 0170200 && a <= 0170377) { // unibus map - DOLOG(debug, false, "writing %06o to unibus map (%06o)", value, a); + TRACE("writing %06o to unibus map (%06o)", value, a); // TODO return { false }; } @@ -769,10 +769,10 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1 /////////// - DOLOG(debug, false, "WRITE-I/O UNHANDLED %08o(%c): %06o (base: %o)", m_offset, word_mode == wm_byte ? 'B' : 'W', value, mmu_->get_io_base()); + TRACE("WRITE-I/O UNHANDLED %08o(%c): %06o (base: %o)", m_offset, word_mode == wm_byte ? 'B' : 'W', value, mmu_->get_io_base()); if (word_mode == wm_word && (a & 1)) [[unlikely]] { - DOLOG(debug, false, "WRITE-I/O to %08o (value: %06o) - odd address!", m_offset, value); + TRACE("WRITE-I/O to %08o (value: %06o) - odd address!", m_offset, value); mmu_->trap_if_odd(a, run_mode, space, true); @@ -785,14 +785,14 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1 } if (word_mode == wm_word && (addr_in & 1)) [[unlikely]] { - DOLOG(debug, false, "WRITE to %06o (value: %06o) - odd address!", addr_in, value); + TRACE("WRITE to %06o (value: %06o) - odd address!", addr_in, value); mmu_->trap_if_odd(addr_in, run_mode, space, true); throw 10; } - DOLOG(debug, false, "WRITE to %06o/%07o %c %c: %06o", addr_in, m_offset, space == d_space ? 'D' : 'I', word_mode == wm_byte ? 'B' : 'W', value); + TRACE("WRITE to %06o/%07o %c %c: %06o", addr_in, m_offset, space == d_space ? 'D' : 'I', word_mode == wm_byte ? 'B' : 'W', value); if (m_offset >= m->get_memory_size()) { c->trap(004); // no such RAM @@ -809,10 +809,10 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1 void bus::writePhysical(const uint32_t a, const uint16_t value) { - DOLOG(debug, false, "physicalWRITE %06o to %o", value, a); + TRACE("physicalWRITE %06o to %o", value, a); if (a >= m->get_memory_size()) { - DOLOG(debug, false, "physicalWRITE to %o: trap 004", a); + TRACE("physicalWRITE to %o: trap 004", a); c->trap(004); throw 12; } @@ -824,14 +824,14 @@ void bus::writePhysical(const uint32_t a, const uint16_t value) uint16_t bus::readPhysical(const uint32_t a) { if (a >= m->get_memory_size()) { - DOLOG(debug, false, "physicalREAD from %o: trap 004", a); + TRACE("physicalREAD from %o: trap 004", a); c->trap(004); throw 13; } uint16_t value = m->read_word(a); - DOLOG(debug, false, "physicalREAD %06o from %o", value, a); + TRACE("physicalREAD %06o from %o", value, a); return value; } @@ -854,12 +854,12 @@ void bus::write_word(const uint16_t a, const uint16_t value, const d_i_space_t s uint8_t bus::readUnibusByte(const uint32_t a) { uint8_t v = m->read_byte(a); - DOLOG(debug, false, "readUnibusByte[%08o]=%03o", a, v); + TRACE("readUnibusByte[%08o]=%03o", a, v); return v; } void bus::writeUnibusByte(const uint32_t a, const uint8_t v) { - DOLOG(debug, false, "writeUnibusByte[%08o]=%03o", a, v); + TRACE("writeUnibusByte[%08o]=%03o", a, v); m->write_byte(a, v); } diff --git a/console.cpp b/console.cpp index 884b9a5..d446a59 100644 --- a/console.cpp +++ b/console.cpp @@ -281,7 +281,7 @@ void console::put_char(const char c) tx = 0; else if (c == 10) { if (debug_buffer.empty() == false) { - DOLOG(::debug, true, "TTY: %s", debug_buffer.c_str()); + TRACE("TTY: %s", debug_buffer.c_str()); debug_buffer.clear(); } @@ -322,7 +322,7 @@ void console::put_string(const std::string & what) void console::operator()() { - DOLOG(::info, true, "Console thread started"); + TRACE("Console thread started"); set_thread_name("kek::console"); @@ -360,5 +360,5 @@ void console::operator()() } } - DOLOG(::info, true, "Console thread terminating"); + TRACE("Console thread terminating"); } diff --git a/cpu.cpp b/cpu.cpp index 3639fcd..d899a29 100644 --- a/cpu.cpp +++ b/cpu.cpp @@ -371,7 +371,7 @@ bool cpu::execute_any_pending_interrupt() if (trap_delay.has_value()) { trap_delay.value()--; - DOLOG(debug, false, "Delayed trap: %d instructions left", trap_delay.value()); + TRACE("Delayed trap: %d instructions left", trap_delay.value()); if (trap_delay.value() > 0) return false; @@ -409,7 +409,7 @@ bool cpu::execute_any_pending_interrupt() interrupts->second.erase(vector); - DOLOG(debug, false, "Invoking interrupt vector %o (IPL %d, current: %d)", v, i, current_level); + TRACE("Invoking interrupt vector %o (IPL %d, current: %d)", v, i, current_level); trap(v, i, true); @@ -458,7 +458,7 @@ void cpu::queue_interrupt(const uint8_t level, const uint8_t vector) any_queued_interrupts = true; - DOLOG(debug, false, "Queueing interrupt vector %o (IPL %d, current: %d), n: %zu", vector, level, getPSW_spl(), it->second.size()); + TRACE("Queueing interrupt vector %o (IPL %d, current: %d), n: %zu", vector, level, getPSW_spl(), it->second.size()); } void cpu::addToMMR1(const gam_rc_t & g) @@ -838,7 +838,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr) addToMMR1(g_dst); uint16_t shift = g_dst.value.value() & 077; - DOLOG(debug, true, "shift %06o with %d", R, shift); + TRACE("shift %06o with %d", R, shift); bool sign = SIGN(R, wm_word); @@ -1638,7 +1638,7 @@ bool cpu::condition_code_operations(const uint16_t instr) void cpu::pushStack(const uint16_t v) { if (getRegister(6) == stackLimitRegister) { - DOLOG(debug, false, "stackLimitRegister reached %06o while pushing %06o", stackLimitRegister, v); + TRACE("stackLimitRegister reached %06o while pushing %06o", stackLimitRegister, v); trap(04, 7); } @@ -1687,7 +1687,7 @@ bool cpu::misc_operations(const uint16_t instr) wait_time += end - start; // used for MIPS calculation } - DOLOG(debug, false, "WAIT returned"); + TRACE("WAIT returned"); return true; @@ -1811,7 +1811,7 @@ bool cpu::misc_operations(const uint16_t instr) // 'is_interrupt' is not correct naming; it is true for mmu faults and interrupts void cpu::trap(uint16_t vector, const int new_ipl, const bool is_interrupt) { - DOLOG(debug, false, "*** CPU::TRAP %o, new-ipl: %d, is-interrupt: %d, run mode: %d ***", vector, new_ipl, is_interrupt, getPSW_runmode()); + TRACE("*** CPU::TRAP %o, new-ipl: %d, is-interrupt: %d, run mode: %d ***", vector, new_ipl, is_interrupt, getPSW_runmode()); uint16_t before_psw = 0; uint16_t before_pc = 0; @@ -1825,7 +1825,7 @@ void cpu::trap(uint16_t vector, const int new_ipl, const bool is_interrupt) bool kernel_mode = !(psw >> 14); if (processing_trap_depth >= 2) { - DOLOG(debug, false, "Trap depth %d", processing_trap_depth); + TRACE("Trap depth %d", processing_trap_depth); if (processing_trap_depth >= 3) { *event = EVENT_HALT; @@ -1879,10 +1879,10 @@ void cpu::trap(uint16_t vector, const int new_ipl, const bool is_interrupt) // if we reach this point then the trap was processed without causing // another trap - DOLOG(debug, false, "Trapping to %06o with PSW %06o", pc, psw); + TRACE("Trapping to %06o with PSW %06o", pc, psw); } catch(const int exception) { - DOLOG(debug, false, "trap during execution of trap (%d)", exception); + TRACE("trap during execution of trap (%d)", exception); setPSW(before_psw, false); } @@ -2419,12 +2419,12 @@ void cpu::step() if (misc_operations(instr)) return; - DOLOG(warning, true, "UNHANDLED instruction %06o @ %06o", instr, instruction_start); + DOLOG(warning, false, "UNHANDLED instruction %06o @ %06o", instr, instruction_start); trap(010); // floating point nog niet geimplementeerd } catch(const int exception_nr) { - DOLOG(debug, false, "bus-trap during execution of command (%d)", exception_nr); + TRACE("bus-trap during execution of command (%d)", exception_nr); } } diff --git a/debugger.cpp b/debugger.cpp index 046babc..e8e6ba4 100644 --- a/debugger.cpp +++ b/debugger.cpp @@ -617,10 +617,9 @@ void tm11_unload_tape(bus *const b) b->getTM11()->unload(); } -void debugger(console *const cnsl, bus *const b, std::atomic_uint32_t *const stop_event, const bool tracing_in) +void debugger(console *const cnsl, bus *const b, std::atomic_uint32_t *const stop_event) { int32_t trace_start_addr = -1; - bool tracing = tracing_in; int n_single_step = 1; bool turbo = false; std::optional t_rl; // trace runlevel @@ -759,9 +758,9 @@ void debugger(console *const cnsl, bus *const b, std::atomic_uint32_t *const sto continue; } else if (parts[0] == "trace" || parts[0] == "t") { - tracing = !tracing; + settrace(!gettrace()); - cnsl->put_string_lf(format("Tracing set to %s", tracing ? "ON" : "OFF")); + cnsl->put_string_lf(format("Tracing set to %s", gettrace() ? "ON" : "OFF")); continue; } @@ -1100,12 +1099,12 @@ void debugger(console *const cnsl, bus *const b, std::atomic_uint32_t *const sto while(*stop_event == EVENT_NONE) { if (!single_step) - DOLOG(debug, false, "---"); + TRACE("---"); if (trace_start_addr != -1 && c->getPC() == trace_start_addr) - tracing = true; + settrace(true); - if ((tracing || single_step) && (t_rl.has_value() == false || t_rl.value() == c->getPSW_runmode())) + if ((gettrace() || single_step) && (t_rl.has_value() == false || t_rl.value() == c->getPSW_runmode())) disassemble(c, single_step ? cnsl : nullptr, c->getPC(), false); auto bp_result = c->check_breakpoint(); @@ -1138,7 +1137,7 @@ void debugger(console *const cnsl, bus *const b, std::atomic_uint32_t *const sto } } -void run_bic(console *const cnsl, bus *const b, std::atomic_uint32_t *const stop_event, const bool tracing, const uint16_t start_addr) +void run_bic(console *const cnsl, bus *const b, std::atomic_uint32_t *const stop_event, const uint16_t start_addr) { cpu *const c = b->getCpu(); @@ -1147,7 +1146,7 @@ void run_bic(console *const cnsl, bus *const b, std::atomic_uint32_t *const stop *cnsl->get_running_flag() = true; while(*stop_event == EVENT_NONE) { - if (tracing) + if (gettrace()) disassemble(c, nullptr, c->getPC(), false); c->step(); diff --git a/debugger.h b/debugger.h index 083f0a1..5387271 100644 --- a/debugger.h +++ b/debugger.h @@ -7,6 +7,6 @@ int disassemble(cpu *const c, console *const cnsl, const uint16_t pc, const bool instruction_only); -void debugger(console *const cnsl, bus *const b, std::atomic_uint32_t *const stop_event, const bool tracing); +void debugger(console *const cnsl, bus *const b, std::atomic_uint32_t *const stop_event); -void run_bic(console *const cnsl, bus *const b, std::atomic_uint32_t *const stop_event, const bool tracing, const uint16_t bic_start); +void run_bic(console *const cnsl, bus *const b, std::atomic_uint32_t *const stop_event, const uint16_t bic_start); diff --git a/disk_backend_file.cpp b/disk_backend_file.cpp index eca3a0f..13fb400 100644 --- a/disk_backend_file.cpp +++ b/disk_backend_file.cpp @@ -60,7 +60,7 @@ bool disk_backend_file::begin(const bool snapshots) bool disk_backend_file::read(const off_t offset_in, const size_t n, uint8_t *const target, const size_t sector_size) { - DOLOG(debug, false, "disk_backend_file::read: read %zu bytes from offset %zu", n, offset_in); + TRACE("disk_backend_file::read: read %zu bytes from offset %zu", n, offset_in); assert((offset_in % sector_size) == 0); assert((n % sector_size) == 0); @@ -95,7 +95,7 @@ bool disk_backend_file::read(const off_t offset_in, const size_t n, uint8_t *con bool disk_backend_file::write(const off_t offset, const size_t n, const uint8_t *const from, const size_t sector_size) { - DOLOG(debug, false, "disk_backend_file::write: write %zu bytes to offset %zu", n, offset); + TRACE("disk_backend_file::write: write %zu bytes to offset %zu", n, offset); if (store_mem_range_in_overlay(offset, n, from, sector_size)) return true; diff --git a/disk_backend_nbd.cpp b/disk_backend_nbd.cpp index 1042ab6..a20e15e 100644 --- a/disk_backend_nbd.cpp +++ b/disk_backend_nbd.cpp @@ -165,7 +165,7 @@ bool disk_backend_nbd::connect(const bool retry) bool disk_backend_nbd::read(const off_t offset_in, const size_t n, uint8_t *const target, const size_t sector_size) { - DOLOG(debug, false, "disk_backend_nbd::read: read %zu bytes from offset %zu", n, offset_in); + TRACE("disk_backend_nbd::read: read %zu bytes from offset %zu", n, offset_in); if (n == 0) return true; @@ -256,7 +256,7 @@ bool disk_backend_nbd::read(const off_t offset_in, const size_t n, uint8_t *cons bool disk_backend_nbd::write(const off_t offset, const size_t n, const uint8_t *const from, const size_t sector_size) { - DOLOG(debug, false, "disk_backend_nbd::write: write %zu bytes to offset %zu", n, offset); + TRACE("disk_backend_nbd::write: write %zu bytes to offset %zu", n, offset); if (n == 0) return true; diff --git a/kw11-l.cpp b/kw11-l.cpp index 978853f..4852299 100644 --- a/kw11-l.cpp +++ b/kw11-l.cpp @@ -66,7 +66,7 @@ void kw11_l::operator()() { set_thread_name("kek:kw-11l"); - DOLOG(debug, true, "Starting KW11-L thread"); + TRACE("Starting KW11-L thread"); while(!stop_flag) { if (*cnsl->get_running_flag()) { @@ -83,13 +83,13 @@ void kw11_l::operator()() } } - DOLOG(debug, true, "KW11-L thread terminating"); + TRACE("KW11-L thread terminating"); } uint16_t kw11_l::read_word(const uint16_t a) { if (a != ADDR_LFC) { - DOLOG(debug, true, "KW11-L read_word not for us (%06o)", a); + TRACE("KW11-L read_word not for us (%06o)", a); return 0; } @@ -111,7 +111,7 @@ uint16_t kw11_l::read_word(const uint16_t a) void kw11_l::write_word(const uint16_t a, const uint16_t value) { if (a != ADDR_LFC) { - DOLOG(debug, true, "KW11-L write_word not for us (%06o to %06o)", value, a); + TRACE("KW11-L write_word not for us (%06o to %06o)", value, a); return; } @@ -121,7 +121,7 @@ void kw11_l::write_word(const uint16_t a, const uint16_t value) std::unique_lock lck(lf_csr_lock); #endif - DOLOG(debug, false, "WRITE-I/O set line frequency clock/status register: %06o", value); + TRACE("WRITE-I/O set line frequency clock/status register: %06o", value); lf_csr = value; #if defined(BUILD_FOR_RP2040) xSemaphoreGive(lf_csr_lock); diff --git a/loaders.cpp b/loaders.cpp index 03891ff..3be2575 100644 --- a/loaders.cpp +++ b/loaders.cpp @@ -191,7 +191,7 @@ std::optional load_tape(bus *const b, const std::string & file) } #if !defined(ESP32) - DOLOG(debug, false, "%ld] reading %d (dec) bytes to %o (oct)", ftell(fh), count - 6, p); + TRACE("%ld] reading %d (dec) bytes to %o (oct)", ftell(fh), count - 6, p); #endif for(int i=0; i(malloc(log_buffer_size)); +static thread_local char *log_buffer = reinterpret_cast(malloc(log_buffer_size)); +bool log_trace_enabled = false; #if defined(ESP32) int gettid() @@ -39,6 +40,16 @@ int gettid() } #endif +void settrace(const bool on) +{ + log_trace_enabled = on; +} + +bool gettrace() +{ + return log_trace_enabled; +} + void setlogfile(const char *const lf, const log_level_t ll_file, const log_level_t ll_screen, const bool timestamp) { if (log_fh) diff --git a/log.h b/log.h index 668cf33..b3f0fe0 100644 --- a/log.h +++ b/log.h @@ -18,6 +18,8 @@ void setloguid(const int uid, const int gid); void send_syslog(const int ll, const std::string & what); void closelog(); void dolog(const log_level_t ll, const char *fmt, ...); +void settrace(const bool on); +bool gettrace(); #ifdef TURBO #define DOLOG(ll, always, fmt, ...) do { } while(0) @@ -38,3 +40,14 @@ void dolog(const log_level_t ll, const char *fmt, ...); } while(0) #endif #endif + +#ifdef TURBO +#define TRACE(fmt, ...) do { } while(0) +#else +#define TRACE(fmt, ...) do { \ + extern bool log_trace_enabled; \ + if (log_trace_enabled) { \ + dolog(debug, fmt, ##__VA_ARGS__); \ + } \ +} while(0) +#endif diff --git a/main.cpp b/main.cpp index 8e5fd6e..c42a8f9 100644 --- a/main.cpp +++ b/main.cpp @@ -336,7 +336,6 @@ int main(int argc, char *argv[]) std::vector rl02_files; bool run_debugger = false; - bool tracing = false; bool enable_bootloader = false; bootloader_t bootloader = BL_NONE; @@ -416,7 +415,7 @@ int main(int argc, char *argv[]) break; case 't': - tracing = true; + settrace(true); break; case 'n': @@ -629,9 +628,9 @@ int main(int argc, char *argv[]) b->getKW11_L()->begin(cnsl); if (is_bic) - run_bic(cnsl, b, &event, tracing, bic_start.value()); + run_bic(cnsl, b, &event, bic_start.value()); else if (run_debugger || (bootloader == BL_NONE && test.empty() && tape.empty())) - debugger(cnsl, b, &event, tracing); + debugger(cnsl, b, &event); else { b->getCpu()->emulation_start(); // for statistics diff --git a/mmu.cpp b/mmu.cpp index ffe86be..a4d64c8 100644 --- a/mmu.cpp +++ b/mmu.cpp @@ -130,7 +130,7 @@ void mmu::write_pdr(const uint32_t a, const int run_mode, const uint16_t value, pages[run_mode][is_d][page].pdr &= ~(32768 + 128 /*A*/ + 64 /*W*/ + 32 + 16); // set bit 4, 5 & 15 to 0 as they are unused and A/W are set to 0 by writes - DOLOG(debug, false, "mmu WRITE-I/O PDR run-mode %d: %c for %d: %o [%d]", run_mode, is_d ? 'D' : 'I', page, value, word_mode); + TRACE("mmu WRITE-I/O PDR run-mode %d: %c for %d: %o [%d]", run_mode, is_d ? 'D' : 'I', page, value, word_mode); } void mmu::write_par(const uint32_t a, const int run_mode, const uint16_t value, const word_mode_t word_mode) @@ -145,7 +145,7 @@ void mmu::write_par(const uint32_t a, const int run_mode, const uint16_t value, pages[run_mode][is_d][page].pdr &= ~(128 /*A*/ + 64 /*W*/); // reset PDR A/W when PAR is written to - DOLOG(debug, false, "mmu WRITE-I/O PAR run-mode %d: %c for %d: %o (%07o)", run_mode, is_d ? 'D' : 'I', page, word_mode == wm_byte ? value & 0xff : value, pages[run_mode][is_d][page].par * 64); + TRACE("mmu WRITE-I/O PAR run-mode %d: %c for %d: %o (%07o)", run_mode, is_d ? 'D' : 'I', page, word_mode == wm_byte ? value & 0xff : value, pages[run_mode][is_d][page].par * 64); } uint16_t mmu::read_word(const uint16_t a) @@ -296,7 +296,7 @@ void mmu::mmudebug(const uint16_t a) for(int rm=0; rm<4; rm++) { auto ma = calculate_physical_address(rm, a); - DOLOG(debug, false, "RM %d, a: %06o, apf: %d, PI: %08o (PSW: %d), PD: %08o (PSW: %d)", rm, ma.virtual_address, ma.apf, ma.physical_instruction, ma.physical_instruction_is_psw, ma.physical_data, ma.physical_data_is_psw); + TRACE("RM %d, a: %06o, apf: %d, PI: %08o (PSW: %d), PD: %08o (PSW: %d)", rm, ma.virtual_address, ma.apf, ma.physical_instruction, ma.physical_instruction_is_psw, ma.physical_data, ma.physical_data_is_psw); } } @@ -352,18 +352,18 @@ uint32_t mmu::calculate_physical_address(cpu *const c, const int run_mode, const setMMR0(temp); - DOLOG(debug, false, "MMR0: %06o", temp); + TRACE("MMR0: %06o", temp); } if (trap_action == T_TRAP_250) { - DOLOG(debug, false, "Page access %d (for virtual address %06o): trap 0250", access_control, a); + TRACE("Page access %d (for virtual address %06o): trap 0250", access_control, a); c->trap(0250); // trap throw 5; } else { // T_ABORT_4 - DOLOG(debug, false, "Page access %d (for virtual address %06o): trap 004", access_control, a); + TRACE("Page access %d (for virtual address %06o): trap 004", access_control, a); c->trap(004); // abort @@ -373,8 +373,9 @@ uint32_t mmu::calculate_physical_address(cpu *const c, const int run_mode, const } if (m_offset >= m->get_memory_size() && !is_io) [[unlikely]] { - DOLOG(debug, !peek_only, "mmu::calculate_physical_address %o >= %o", m_offset, m->get_memory_size()); - DOLOG(debug, false, "TRAP(04) (throw 6) on address %06o", a); + if (!peek_only) + TRACE("mmu::calculate_physical_address %o >= %o", m_offset, m->get_memory_size()); + TRACE("TRAP(04) (throw 6) on address %06o", a); if (is_locked() == false) { uint16_t temp = getMMR0(); @@ -404,11 +405,11 @@ uint32_t mmu::calculate_physical_address(cpu *const c, const int run_mode, const bool direction = get_pdr_direction(run_mode, d, apf); - // DOLOG(debug, false, "p_offset %06o pdr_len %06o direction %d, run_mode %d, apf %d, pdr: %06o", p_offset, pdr_len, direction, run_mode, apf, pages[run_mode][d][apf].pdr); + // TRACE("p_offset %06o pdr_len %06o direction %d, run_mode %d, apf %d, pdr: %06o", p_offset, pdr_len, direction, run_mode, apf, pages[run_mode][d][apf].pdr); if ((pdr_cmp > pdr_len && direction == false) || (pdr_cmp < pdr_len && direction == true)) [[unlikely]] { - DOLOG(debug, false, "mmu::calculate_physical_address::p_offset %o versus %o direction %d", pdr_cmp, pdr_len, direction); - DOLOG(debug, false, "TRAP(0250) (throw 7) on address %06o", a); + TRACE("mmu::calculate_physical_address::p_offset %o versus %o direction %d", pdr_cmp, pdr_len, direction); + TRACE("TRAP(0250) (throw 7) on address %06o", a); c->trap(0250); // invalid access if (is_locked() == false) { @@ -436,12 +437,12 @@ uint32_t mmu::calculate_physical_address(cpu *const c, const int run_mode, const } } - DOLOG(debug, false, "virtual address %06o maps to physical address %08o (run_mode: %d, apf: %d, par: %08o, poff: %o, AC: %d, %s)", a, m_offset, run_mode, apf, + TRACE("virtual address %06o maps to physical address %08o (run_mode: %d, apf: %d, par: %08o, poff: %o, AC: %d, %s)", a, m_offset, run_mode, apf, get_physical_memory_offset(run_mode, d, apf), p_offset, get_access_control(run_mode, d, apf), d ? "D" : "I"); } else { - // DOLOG(debug, false, "no MMU (read physical address %08o)", m_offset); + // TRACE("no MMU (read physical address %08o)", m_offset); } return m_offset; diff --git a/rk05.cpp b/rk05.cpp index 046cc84..a30d407 100644 --- a/rk05.cpp +++ b/rk05.cpp @@ -80,7 +80,7 @@ uint16_t rk05::read_word(const uint16_t addr) if (addr == RK05_CS) setBit(registers[reg], 0, false); // clear go - DOLOG(debug, false, "RK05 read %s/%o: %06o", reg[regnames], addr, vtemp); + TRACE("RK05 read %s/%o: %06o", reg[regnames], addr, vtemp); return vtemp; } @@ -138,12 +138,12 @@ void rk05::write_word(const uint16_t addr, const uint16_t v) registers[(RK05_CS - RK05_BASE) / 2] &= ~(1 << 13); // reset search complete if (func == 0) { // controller reset - DOLOG(debug, false, "RK05 invoke %d (controller reset)", func); + TRACE("RK05 invoke %d (controller reset)", func); } else if (func == 1) { // write *disk_write_acitivity = true; - DOLOG(debug, false, "RK05 drive %d position sec %d surf %d cyl %d, reclen %zo, WRITE to %o, mem: %o", device, sector, surface, cylinder, reclen, diskoffb, memoff); + TRACE("RK05 drive %d position sec %d surf %d cyl %d, reclen %zo, WRITE to %o, mem: %o", device, sector, surface, cylinder, reclen, diskoffb, memoff); uint32_t work_reclen = reclen; uint32_t work_memoff = memoff; @@ -164,7 +164,7 @@ void rk05::write_word(const uint16_t addr, const uint16_t v) work_diskoffb += cur; if (v & 2048) - DOLOG(debug, false, "RK05 inhibit BA increase"); + TRACE("RK05 inhibit BA increase"); else update_bus_address(cur); @@ -184,7 +184,7 @@ void rk05::write_word(const uint16_t addr, const uint16_t v) else if (func == 2) { // read *disk_read_acitivity = true; - DOLOG(debug, false, "RK05 drive %d position sec %d surf %d cyl %d, reclen %zo, READ from %o, mem: %o", device, sector, surface, cylinder, reclen, diskoffb, memoff); + TRACE("RK05 drive %d position sec %d surf %d cyl %d, reclen %zo, READ from %o, mem: %o", device, sector, surface, cylinder, reclen, diskoffb, memoff); uint32_t temp_diskoffb = diskoffb; @@ -224,15 +224,15 @@ void rk05::write_word(const uint16_t addr, const uint16_t v) *disk_read_acitivity = false; } else if (func == 4) { - DOLOG(debug, false, "RK05 invoke %d (seek) to %o", func, diskoffb); + TRACE("RK05 invoke %d (seek) to %o", func, diskoffb); registers[(RK05_CS - RK05_BASE) / 2] |= 1 << 13; // search complete } else if (func == 7) { - DOLOG(debug, false, "RK05 invoke %d (write lock)", func); + TRACE("RK05 invoke %d (write lock)", func); } else { - DOLOG(debug, false, "RK05 command %d UNHANDLED", func); + TRACE("RK05 command %d UNHANDLED", func); } registers[(RK05_WC - RK05_BASE) / 2] = 0; diff --git a/rl02.cpp b/rl02.cpp index 4df351b..25139e9 100644 --- a/rl02.cpp +++ b/rl02.cpp @@ -140,7 +140,7 @@ uint16_t rl02::read_word(const uint16_t addr) value = registers[reg]; } - DOLOG(debug, false, "RL02: read \"%s\"/%o: %06o", regnames[reg], addr, value); + TRACE("RL02: read \"%s\"/%o: %06o", regnames[reg], addr, value); return value; } @@ -188,7 +188,7 @@ void rl02::write_word(const uint16_t addr, uint16_t v) { const int reg = (addr - RL02_BASE) / 2; - DOLOG(debug, false, "RL02: write \"%s\"/%06o: %06o", regnames[reg], addr, v); + TRACE("RL02: write \"%s\"/%06o: %06o", regnames[reg], addr, v); registers[reg] = v; @@ -199,7 +199,7 @@ void rl02::write_word(const uint16_t addr, uint16_t v) int device = (v >> 8) & 3; - DOLOG(debug, false, "RL02: device %d, set command %d, exec: %d (%s)", device, command, do_exec, commands[command]); + TRACE("RL02: device %d, set command %d, exec: %d (%s)", device, command, do_exec, commands[command]); bool do_int = false; @@ -226,7 +226,7 @@ void rl02::write_word(const uint16_t addr, uint16_t v) else if (new_track >= rl02_track_count) new_track = rl02_track_count - 1; - DOLOG(debug, false, "RL02: device %d, seek from cylinder %d to %d (distance: %d, DAR: %06o)", device, track, new_track, cylinder_count, temp); + TRACE("RL02: device %d, seek from cylinder %d to %d (distance: %d, DAR: %06o)", device, track, new_track, cylinder_count, temp); track = new_track; // update_dar(); @@ -238,7 +238,7 @@ void rl02::write_word(const uint16_t addr, uint16_t v) mpr[1] = 0; // zero mpr[2] = 0; // TODO: CRC - DOLOG(debug, false, "RL02: device %d, read header [cylinder: %d, head: %d, sector: %d] %06o", device, track, head, sector, mpr[0]); + TRACE("RL02: device %d, read header [cylinder: %d, head: %d, sector: %d] %06o", device, track, head, sector, mpr[0]); do_int = true; } @@ -260,7 +260,7 @@ void rl02::write_word(const uint16_t addr, uint16_t v) uint32_t temp_disk_offset = calc_offset(); - DOLOG(debug, false, "RL02: device %d, write %d bytes (dec) to %d (dec) from %06o (oct) [cylinder: %d, head: %d, sector: %d]", device, count, temp_disk_offset, memory_address, track, head, sector); + TRACE("RL02: device %d, write %d bytes (dec) to %d (dec) from %06o (oct) [cylinder: %d, head: %d, sector: %d]", device, count, temp_disk_offset, memory_address, track, head, sector); while(count > 0) { uint32_t cur = std::min(uint32_t(sizeof xfer_buffer), count); @@ -321,7 +321,7 @@ void rl02::write_word(const uint16_t addr, uint16_t v) uint32_t temp_disk_offset = calc_offset(); - DOLOG(debug, false, "RL02: device %d, read %d bytes (dec) from %d (dec) to %06o (oct) [cylinder: %d, head: %d, sector: %d]", device, count, temp_disk_offset, memory_address, track, head, sector); + TRACE("RL02: device %d, read %d bytes (dec) from %d (dec) to %06o (oct) [cylinder: %d, head: %d, sector: %d]", device, count, temp_disk_offset, memory_address, track, head, sector); // update_dar(); @@ -368,12 +368,12 @@ void rl02::write_word(const uint16_t addr, uint16_t v) *disk_read_activity = false; } else { - DOLOG(debug, false, "RL02: command %d not implemented", command); + TRACE("RL02: command %d not implemented", command); } if (do_int) { if (registers[(RL02_CSR - RL02_BASE) / 2] & 64) { // interrupt enable? - DOLOG(debug, false, "RL02: triggering interrupt"); + TRACE("RL02: triggering interrupt"); b->getCpu()->queue_interrupt(5, 0160); } diff --git a/tm-11.cpp b/tm-11.cpp index f145578..e41eb67 100644 --- a/tm-11.cpp +++ b/tm-11.cpp @@ -90,7 +90,7 @@ uint16_t tm_11::read_word(const uint16_t addr) vtemp = 0; } - DOLOG(debug, false, "TM-11 read addr %o: %o", addr, vtemp); + TRACE("TM-11 read addr %o: %o", addr, vtemp); return vtemp; } @@ -113,20 +113,20 @@ void tm_11::write_byte(const uint16_t addr, const uint8_t v) void tm_11::write_word(const uint16_t addr, uint16_t v) { - DOLOG(debug, false, "TM-11 write %o: %o", addr, v); + TRACE("TM-11 write %o: %o", addr, v); if (addr == TM_11_MTC) { if (v & 1) { // GO const int func = (v >> 1) & 7; // FUNCTION const int reclen = 512; - DOLOG(debug, false, "invoke %d", func); + TRACE("invoke %d", func); if (func == 0) { // off-line v = 128; // TODO set error if error } else if (func == 1) { // read - DOLOG(debug, false, "reading %d bytes from offset %d", reclen, offset); + TRACE("reading %d bytes from offset %d", reclen, offset); if (fread(xfer_buffer, 1, reclen, fh) != reclen) DOLOG(info, true, "failed: %s", strerror(errno)); for(int i=0; iput_char(ch); @@ -190,7 +190,7 @@ void tty::write_word(const uint16_t addr, uint16_t v) b->getCpu()->queue_interrupt(4, 064); } - DOLOG(debug, false, "set register %o to %o", addr, v); + TRACE("set register %o to %o", addr, v); registers[(addr - PDP11TTY_BASE) / 2] = v; }