logging no longer on by default
This commit is contained in:
folkert van heusden
parent
657ac27612
commit
608d374138
GPG key ID:
6B6455EDFEED3BD1
9 changed files with 73 additions and 73 deletions
76
bus.cpp
76
bus.cpp
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@ -170,7 +170,7 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
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if (!peek_only) {
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if ((a & 1) && word_mode == wm_word) {
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DOLOG(debug, true, "READ-I/O odd address %06o UNHANDLED", a);
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DOLOG(debug, false, "READ-I/O odd address %06o UNHANDLED", a);
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trap_odd(a);
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throw 0;
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return 0;
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@ -404,7 +404,7 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
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}
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if (!peek_only) {
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DOLOG(debug, true, "READ-I/O UNHANDLED read %08o (%c), (base: %o)", m_offset, word_mode ? 'B' : ' ', get_io_base());
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DOLOG(debug, false, "READ-I/O UNHANDLED read %08o (%c), (base: %o)", m_offset, word_mode ? 'B' : ' ', get_io_base());
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c->trap(004); // no such i/o
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throw 1;
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@ -414,7 +414,7 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
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}
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if (peek_only == false && word_mode == wm_word && (addr_in & 1)) {
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if (!peek_only) DOLOG(debug, true, "READ from %06o - odd address!", addr_in);
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if (!peek_only) DOLOG(debug, false, "READ from %06o - odd address!", addr_in);
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trap_odd(addr_in);
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throw 2;
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return 0;
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@ -422,7 +422,7 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
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if (m_offset >= n_pages * 8192) {
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if (peek_only) {
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DOLOG(debug, true, "READ from %06o - out of range!", addr_in);
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DOLOG(debug, false, "READ from %06o - out of range!", addr_in);
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return 0;
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}
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@ -528,7 +528,7 @@ void bus::mmudebug(const uint16_t a)
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for(int rm=0; rm<4; rm++) {
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auto ma = calculate_physical_address(rm, a);
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DOLOG(debug, true, "RM %d, a: %06o, apf: %d, PI: %08o (PSW: %d), PD: %08o (PSW: %d)", rm, ma.virtual_address, ma.apf, ma.physical_instruction, ma.physical_instruction_is_psw, ma.physical_data, ma.physical_data_is_psw);
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DOLOG(debug, false, "RM %d, a: %06o, apf: %d, PI: %08o (PSW: %d), PD: %08o (PSW: %d)", rm, ma.virtual_address, ma.apf, ma.physical_instruction, ma.physical_instruction_is_psw, ma.physical_data, ma.physical_data_is_psw);
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}
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}
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@ -574,12 +574,12 @@ uint32_t bus::calculate_physical_address(const int run_mode, const uint16_t a, c
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bool do_trap_250 = false;
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if ((MMR0 & 0xf000) == 0) {
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DOLOG(debug, true, "TRAP(0250) (throw 5) for access_control %d on address %06o, run mode %d", access_control, a, run_mode);
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DOLOG(debug, false, "TRAP(0250) (throw 5) for access_control %d on address %06o, run mode %d", access_control, a, run_mode);
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do_trap_250 = true;
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}
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else {
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DOLOG(debug, true, "A.C.F. triggger for %d on address %06o, run mode %d", access_control, a, run_mode);
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DOLOG(debug, false, "A.C.F. triggger for %d on address %06o, run mode %d", access_control, a, run_mode);
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}
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if (is_write)
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@ -603,7 +603,7 @@ uint32_t bus::calculate_physical_address(const int run_mode, const uint16_t a, c
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MMR0 |= d << 4;
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}
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DOLOG(debug, true, "MMR0: %06o", MMR0);
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DOLOG(debug, false, "MMR0: %06o", MMR0);
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if (do_trap_250) {
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c->trap(0250); // invalid address
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@ -615,7 +615,7 @@ uint32_t bus::calculate_physical_address(const int run_mode, const uint16_t a, c
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if (m_offset >= n_pages * 8192l && !is_io) {
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DOLOG(debug, !peek_only, "bus::calculate_physical_address %o >= %o", m_offset, n_pages * 8192l);
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DOLOG(debug, true, "TRAP(04) (throw 6) on address %06o", a);
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DOLOG(debug, false, "TRAP(04) (throw 6) on address %06o", a);
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if ((MMR0 & 0160000) == 0) {
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MMR0 &= 017777;
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@ -641,11 +641,11 @@ uint32_t bus::calculate_physical_address(const int run_mode, const uint16_t a, c
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bool direction = pages[run_mode][d][apf].pdr & 8;
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// DOLOG(debug, true, "p_offset %06o pdr_len %06o direction %d, run_mode %d, apf %d, pdr: %06o", p_offset, pdr_len, direction, run_mode, apf, pages[run_mode][d][apf].pdr);
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// DOLOG(debug, false, "p_offset %06o pdr_len %06o direction %d, run_mode %d, apf %d, pdr: %06o", p_offset, pdr_len, direction, run_mode, apf, pages[run_mode][d][apf].pdr);
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if ((pdr_cmp > pdr_len && direction == false) || (pdr_cmp < pdr_len && direction == true)) {
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DOLOG(debug, !peek_only, "bus::calculate_physical_address::p_offset %o versus %o direction %d", pdr_cmp, pdr_len, direction);
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DOLOG(debug, true, "TRAP(0250) (throw 7) on address %06o", a);
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DOLOG(debug, false, "TRAP(0250) (throw 7) on address %06o", a);
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c->trap(0250); // invalid access
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if ((MMR0 & 0160000) == 0) {
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@ -668,7 +668,7 @@ uint32_t bus::calculate_physical_address(const int run_mode, const uint16_t a, c
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}
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}
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DOLOG(debug, !peek_only, "virtual address %06o maps to physical address %08o (run_mode: %d, apf: %d, par: %08o, poff: %o, AC: %d, %s)", a, m_offset, run_mode, apf, pages[run_mode][d][apf].par * 64, p_offset, pages[run_mode][d][apf].pdr & 7, d ? "D" : "I");
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DOLOG(debug, false, "virtual address %06o maps to physical address %08o (run_mode: %d, apf: %d, par: %08o, poff: %o, AC: %d, %s)", a, m_offset, run_mode, apf, pages[run_mode][d][apf].par * 64, p_offset, pages[run_mode][d][apf].pdr & 7, d ? "D" : "I");
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}
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else {
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// DOLOG(debug, false, "no MMU (read physical address %08o)", m_offset);
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@ -724,7 +724,7 @@ void bus::write_pdr(const uint32_t a, const int run_mode, const uint16_t value,
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pages[run_mode][is_d][page].pdr &= ~(32768 + 128 /*A*/ + 64 /*W*/ + 32 + 16); // set bit 4, 5 & 15 to 0 as they are unused and A/W are set to 0 by writes
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DOLOG(debug, true, "WRITE-I/O PDR run-mode %d: %c for %d: %o [%d]", run_mode, is_d ? 'D' : 'I', page, value, word_mode);
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DOLOG(debug, false, "WRITE-I/O PDR run-mode %d: %c for %d: %o [%d]", run_mode, is_d ? 'D' : 'I', page, value, word_mode);
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}
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void bus::write_par(const uint32_t a, const int run_mode, const uint16_t value, const word_mode_t word_mode)
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@ -742,7 +742,7 @@ void bus::write_par(const uint32_t a, const int run_mode, const uint16_t value,
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pages[run_mode][is_d][page].pdr &= ~(128 /*A*/ + 64 /*W*/); // reset PDR A/W when PAR is written to
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DOLOG(debug, true, "WRITE-I/O PAR run-mode %d: %c for %d: %o (%07o)", run_mode, is_d ? 'D' : 'I', page, word_mode ? value & 0xff : value, pages[run_mode][is_d][page].par * 64);
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DOLOG(debug, false, "WRITE-I/O PAR run-mode %d: %c for %d: %o (%07o)", run_mode, is_d ? 'D' : 'I', page, word_mode ? value & 0xff : value, pages[run_mode][is_d][page].par * 64);
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}
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void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t space)
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@ -768,7 +768,7 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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if (word_mode) {
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if (a == ADDR_PSW || a == ADDR_PSW + 1) { // PSW
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DOLOG(debug, true, "WRITE-I/O PSW %s: %03o", a & 1 ? "MSB" : "LSB", value);
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DOLOG(debug, false, "WRITE-I/O PSW %s: %03o", a & 1 ? "MSB" : "LSB", value);
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uint16_t vtemp = c->getPSW();
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@ -785,7 +785,7 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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}
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if (a == ADDR_STACKLIM || a == ADDR_STACKLIM + 1) { // stack limit register
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DOLOG(debug, true, "WRITE-I/O stack limit register %s: %03o", a & 1 ? "MSB" : "LSB", value);
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DOLOG(debug, false, "WRITE-I/O stack limit register %s: %03o", a & 1 ? "MSB" : "LSB", value);
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uint16_t v = c->getStackLimitRegister();
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@ -813,7 +813,7 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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}
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if (a == ADDR_MMR0 || a == ADDR_MMR0 + 1) { // MMR0
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DOLOG(debug, true, "WRITE-I/O MMR0 register %s: %03o", a & 1 ? "MSB" : "LSB", value);
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DOLOG(debug, false, "WRITE-I/O MMR0 register %s: %03o", a & 1 ? "MSB" : "LSB", value);
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if (a == ADDR_MMR0)
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MMR0 = (MMR0 & 0xff00) | value;
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@ -825,46 +825,46 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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}
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else {
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if (a == ADDR_PSW) { // PSW
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DOLOG(debug, true, "WRITE-I/O PSW: %06o", value);
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DOLOG(debug, false, "WRITE-I/O PSW: %06o", value);
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c->setPSW(value & ~16, false);
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return;
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}
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if (a == ADDR_STACKLIM) { // stack limit register
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DOLOG(debug, true, "WRITE-I/O stack limit register: %06o", value);
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DOLOG(debug, false, "WRITE-I/O stack limit register: %06o", value);
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c->setStackLimitRegister(value & 0xff00);
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return;
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}
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if (a >= ADDR_KERNEL_R && a <= ADDR_KERNEL_R + 5) { // kernel R0-R5
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int reg = a - ADDR_KERNEL_R;
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DOLOG(debug, true, "WRITE-I/O kernel R%d: %06o", reg, value);
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DOLOG(debug, false, "WRITE-I/O kernel R%d: %06o", reg, value);
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c->setRegister(reg, value);
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return;
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}
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if (a >= ADDR_USER_R && a <= ADDR_USER_R + 5) { // user R0-R5
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int reg = a - ADDR_USER_R;
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DOLOG(debug, true, "WRITE-I/O user R%d: %06o", reg, value);
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DOLOG(debug, false, "WRITE-I/O user R%d: %06o", reg, value);
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c->setRegister(reg, value);
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return;
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}
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if (a == ADDR_KERNEL_SP) { // kernel SP
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DOLOG(debug, true, "WRITE-I/O kernel SP: %06o", value);
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DOLOG(debug, false, "WRITE-I/O kernel SP: %06o", value);
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c->setStackPointer(0, value);
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return;
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}
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if (a == ADDR_PC) { // PC
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DOLOG(debug, true, "WRITE-I/O PC: %06o", value);
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DOLOG(debug, false, "WRITE-I/O PC: %06o", value);
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c->setPC(value);
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return;
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}
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if (a == ADDR_SV_SP) { // supervisor SP
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DOLOG(debug, true, "WRITE-I/O supervisor sp: %06o", value);
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DOLOG(debug, false, "WRITE-I/O supervisor sp: %06o", value);
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c->setStackPointer(1, value);
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return;
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}
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if (a == ADDR_USER_SP) { // user SP
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DOLOG(debug, true, "WRITE-I/O user sp: %06o", value);
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DOLOG(debug, false, "WRITE-I/O user sp: %06o", value);
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c->setStackPointer(3, value);
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return;
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}
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@ -877,25 +877,25 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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}
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if (a == ADDR_CPU_ERR) { // cpu error register
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DOLOG(debug, true, "WRITE-I/O CPUERR: %06o", value);
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DOLOG(debug, false, "WRITE-I/O CPUERR: %06o", value);
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CPUERR = 0;
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return;
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}
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if (a == ADDR_MMR3) { // MMR3
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DOLOG(debug, true, "WRITE-I/O set MMR3: %06o", value);
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DOLOG(debug, false, "WRITE-I/O set MMR3: %06o", value);
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MMR3 = value;
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return;
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}
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if (a == ADDR_MMR0) { // MMR0
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DOLOG(debug, true, "WRITE-I/O set MMR0: %06o", value);
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DOLOG(debug, false, "WRITE-I/O set MMR0: %06o", value);
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setMMR0(value);
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return;
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}
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if (a == ADDR_PIR) { // PIR
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DOLOG(debug, true, "WRITE-I/O set PIR: %06o", value);
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DOLOG(debug, false, "WRITE-I/O set PIR: %06o", value);
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value &= 0177000;
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@ -917,7 +917,7 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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std::unique_lock<std::mutex> lck(lf_csr_lock);
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#endif
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DOLOG(debug, true, "WRITE-I/O set line frequency clock/status register: %06o", value);
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DOLOG(debug, false, "WRITE-I/O set line frequency clock/status register: %06o", value);
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lf_csr = value;
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#if defined(BUILD_FOR_RP2040)
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xSemaphoreGive(lf_csr_lock);
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@ -1005,10 +1005,10 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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///////////
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DOLOG(debug, true, "WRITE-I/O UNHANDLED %08o(%c): %06o (base: %o)", m_offset, word_mode ? 'B' : 'W', value, get_io_base());
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DOLOG(debug, false, "WRITE-I/O UNHANDLED %08o(%c): %06o (base: %o)", m_offset, word_mode ? 'B' : 'W', value, get_io_base());
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if (word_mode == wm_word && (a & 1)) {
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DOLOG(debug, true, "WRITE-I/O to %08o (value: %06o) - odd address!", m_offset, value);
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DOLOG(debug, false, "WRITE-I/O to %08o (value: %06o) - odd address!", m_offset, value);
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trap_odd(a);
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throw 8;
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@ -1020,13 +1020,13 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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}
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if (word_mode == wm_word && (addr_in & 1)) {
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DOLOG(debug, true, "WRITE to %06o (value: %06o) - odd address!", addr_in, value);
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DOLOG(debug, false, "WRITE to %06o (value: %06o) - odd address!", addr_in, value);
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trap_odd(addr_in);
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throw 10;
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}
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DOLOG(debug, true, "WRITE to %06o/%07o %c %c: %06o", addr_in, m_offset, space == d_space ? 'D' : 'I', word_mode ? 'B' : 'W', value);
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DOLOG(debug, false, "WRITE to %06o/%07o %c %c: %06o", addr_in, m_offset, space == d_space ? 'D' : 'I', word_mode ? 'B' : 'W', value);
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if (m_offset >= n_pages * 8192) {
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c->trap(004); // no such RAM
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@ -1041,10 +1041,10 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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void bus::writePhysical(const uint32_t a, const uint16_t value)
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{
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DOLOG(debug, true, "physicalWRITE %06o to %o", value, a);
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DOLOG(debug, false, "physicalWRITE %06o to %o", value, a);
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if (a >= n_pages * 8192l) {
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DOLOG(debug, true, "physicalWRITE to %o: trap 004", a);
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DOLOG(debug, false, "physicalWRITE to %o: trap 004", a);
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c->trap(004);
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throw 12;
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}
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@ -1056,14 +1056,14 @@ void bus::writePhysical(const uint32_t a, const uint16_t value)
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uint16_t bus::readPhysical(const uint32_t a)
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{
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if (a >= n_pages * 8192l) {
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DOLOG(debug, true, "physicalREAD from %o: trap 004", a);
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DOLOG(debug, false, "physicalREAD from %o: trap 004", a);
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c->trap(004);
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throw 13;
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}
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uint16_t value = m->readWord(a);
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DOLOG(debug, true, "physicalREAD %06o from %o", value, a);
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DOLOG(debug, false, "physicalREAD %06o from %o", value, a);
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return value;
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}
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14
cpu.cpp
14
cpu.cpp
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@ -317,7 +317,7 @@ bool cpu::check_queued_interrupts()
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interrupts->second.erase(vector);
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DOLOG(debug, true, "Invoking interrupt vector %o (IPL %d, current: %d)", v, i, current_level);
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DOLOG(debug, false, "Invoking interrupt vector %o (IPL %d, current: %d)", v, i, current_level);
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trap(v, i, true);
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@ -362,7 +362,7 @@ void cpu::queue_interrupt(const uint8_t level, const uint8_t vector)
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any_queued_interrupts = true;
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DOLOG(debug, true, "Queueing interrupt vector %o (IPL %d, current: %d), n: %zu", vector, level, getPSW_spl(), it->second.size());
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||||
DOLOG(debug, false, "Queueing interrupt vector %o (IPL %d, current: %d), n: %zu", vector, level, getPSW_spl(), it->second.size());
|
||||
}
|
||||
|
||||
void cpu::addToMMR1(const uint8_t mode, const uint8_t reg, const word_mode_t word_mode)
|
||||
|
|
@ -1511,7 +1511,7 @@ bool cpu::condition_code_operations(const uint16_t instr)
|
|||
void cpu::pushStack(const uint16_t v)
|
||||
{
|
||||
if (getRegister(6) == stackLimitRegister) {
|
||||
DOLOG(debug, true, "stackLimitRegister reached %06o while pushing %06o", stackLimitRegister, v);
|
||||
DOLOG(debug, false, "stackLimitRegister reached %06o while pushing %06o", stackLimitRegister, v);
|
||||
|
||||
trap(04, 7);
|
||||
}
|
||||
|
|
@ -1660,7 +1660,7 @@ bool cpu::misc_operations(const uint16_t instr)
|
|||
// 'is_interrupt' is not correct naming; it is true for mmu faults and interrupts
|
||||
void cpu::trap(uint16_t vector, const int new_ipl, const bool is_interrupt)
|
||||
{
|
||||
DOLOG(debug, true, "*** CPU::TRAP %o, new-ipl: %d, is-interrupt: %d, run mode: %d ***", vector, new_ipl, is_interrupt, getPSW_runmode());
|
||||
DOLOG(debug, false, "*** CPU::TRAP %o, new-ipl: %d, is-interrupt: %d, run mode: %d ***", vector, new_ipl, is_interrupt, getPSW_runmode());
|
||||
|
||||
uint16_t before_psw = 0;
|
||||
uint16_t before_pc = 0;
|
||||
|
|
@ -1674,7 +1674,7 @@ void cpu::trap(uint16_t vector, const int new_ipl, const bool is_interrupt)
|
|||
bool kernel_mode = !(psw >> 14);
|
||||
|
||||
if (processing_trap_depth >= 2) {
|
||||
DOLOG(debug, true, "Trap depth %d", processing_trap_depth);
|
||||
DOLOG(debug, false, "Trap depth %d", processing_trap_depth);
|
||||
|
||||
if (processing_trap_depth >= 3) {
|
||||
*event = EVENT_HALT;
|
||||
|
|
@ -1722,7 +1722,7 @@ void cpu::trap(uint16_t vector, const int new_ipl, const bool is_interrupt)
|
|||
// another trap
|
||||
}
|
||||
catch(const int exception) {
|
||||
DOLOG(debug, true, "trap during execution of trap (%d)", exception);
|
||||
DOLOG(debug, false, "trap during execution of trap (%d)", exception);
|
||||
|
||||
setPSW(before_psw, false);
|
||||
}
|
||||
|
|
@ -2267,6 +2267,6 @@ void cpu::step_b()
|
|||
trap(010); // floating point nog niet geimplementeerd
|
||||
}
|
||||
catch(const int exception_nr) {
|
||||
DOLOG(debug, true, "bus-trap during execution of command (%d)", exception_nr);
|
||||
DOLOG(debug, false, "bus-trap during execution of command (%d)", exception_nr);
|
||||
}
|
||||
}
|
||||
|
|
|
|||
|
|
@ -90,13 +90,13 @@ int disassemble(cpu *const c, console *const cnsl, const uint16_t pc, const bool
|
|||
if (cnsl)
|
||||
cnsl->debug(result);
|
||||
else
|
||||
DOLOG(debug, true, "%s", result.c_str());
|
||||
DOLOG(debug, false, "%s", result.c_str());
|
||||
|
||||
std::string sp;
|
||||
for(auto sp_val : data["sp"])
|
||||
sp += (sp.empty() ? "" : ",") + sp_val;
|
||||
|
||||
DOLOG(debug, true, "SP: %s", sp.c_str());
|
||||
DOLOG(debug, false, "SP: %s", sp.c_str());
|
||||
|
||||
return data["instruction-values"].size() * 2;
|
||||
}
|
||||
|
|
|
|||
|
|
@ -173,7 +173,7 @@ std::optional<uint16_t> loadTape(bus *const b, const std::string & file)
|
|||
}
|
||||
}
|
||||
|
||||
DOLOG(debug, true, "%ld] reading %d (dec) bytes to %o (oct)", ftell(fh), count - 6, p);
|
||||
DOLOG(debug, false, "%ld] reading %d (dec) bytes to %o (oct)", ftell(fh), count - 6, p);
|
||||
|
||||
for(int i=0; i<count - 6; i++) {
|
||||
if (feof(fh)) {
|
||||
|
|
|
|||
18
rk05.cpp
18
rk05.cpp
|
|
@ -73,7 +73,7 @@ uint16_t rk05::readWord(const uint16_t addr)
|
|||
if (addr == RK05_CS)
|
||||
setBit(registers[reg], 0, false); // clear go
|
||||
|
||||
DOLOG(debug, true, "RK05 read %s/%o: %06o", reg[regnames], addr, vtemp);
|
||||
DOLOG(debug, false, "RK05 read %s/%o: %06o", reg[regnames], addr, vtemp);
|
||||
|
||||
return vtemp;
|
||||
}
|
||||
|
|
@ -121,12 +121,12 @@ void rk05::writeWord(const uint16_t addr, uint16_t v)
|
|||
registers[(RK05_CS - RK05_BASE) / 2] &= ~(1 << 13); // reset search complete
|
||||
|
||||
if (func == 0) { // controller reset
|
||||
DOLOG(debug, true, "RK05 invoke %d (controller reset)", func);
|
||||
DOLOG(debug, false, "RK05 invoke %d (controller reset)", func);
|
||||
}
|
||||
else if (func == 1) { // write
|
||||
*disk_write_acitivity = true;
|
||||
|
||||
DOLOG(debug, true, "RK05 drive %d position sec %d surf %d cyl %d, reclen %zo, WRITE to %o, mem: %o", device, sector, surface, cylinder, reclen, diskoffb, memoff);
|
||||
DOLOG(debug, false, "RK05 drive %d position sec %d surf %d cyl %d, reclen %zo, WRITE to %o, mem: %o", device, sector, surface, cylinder, reclen, diskoffb, memoff);
|
||||
|
||||
uint8_t *xfer_buffer = new uint8_t[reclen];
|
||||
|
||||
|
|
@ -138,7 +138,7 @@ void rk05::writeWord(const uint16_t addr, uint16_t v)
|
|||
DOLOG(ll_error, true, "RK05(%d) write error %s", device, strerror(errno));
|
||||
|
||||
if (v & 2048)
|
||||
DOLOG(debug, true, "RK05 inhibit BA increase");
|
||||
DOLOG(debug, false, "RK05 inhibit BA increase");
|
||||
else
|
||||
registers[(RK05_BA - RK05_BASE) / 2] += p;
|
||||
|
||||
|
|
@ -159,7 +159,7 @@ void rk05::writeWord(const uint16_t addr, uint16_t v)
|
|||
else if (func == 2) { // read
|
||||
*disk_read_acitivity = true;
|
||||
|
||||
DOLOG(debug, true, "RK05 drive %d position sec %d surf %d cyl %d, reclen %zo, READ from %o, mem: %o", device, sector, surface, cylinder, reclen, diskoffb, memoff);
|
||||
DOLOG(debug, false, "RK05 drive %d position sec %d surf %d cyl %d, reclen %zo, READ from %o, mem: %o", device, sector, surface, cylinder, reclen, diskoffb, memoff);
|
||||
|
||||
uint8_t xfer_buffer[512];
|
||||
|
||||
|
|
@ -188,7 +188,7 @@ void rk05::writeWord(const uint16_t addr, uint16_t v)
|
|||
}
|
||||
|
||||
if (v & 2048)
|
||||
DOLOG(debug, true, "RK05 inhibit BA increase");
|
||||
DOLOG(debug, false, "RK05 inhibit BA increase");
|
||||
else
|
||||
registers[(RK05_BA - RK05_BASE) / 2] += p;
|
||||
|
||||
|
|
@ -205,15 +205,15 @@ void rk05::writeWord(const uint16_t addr, uint16_t v)
|
|||
*disk_read_acitivity = false;
|
||||
}
|
||||
else if (func == 4) {
|
||||
DOLOG(debug, true, "RK05 invoke %d (seek) to %o", func, diskoffb);
|
||||
DOLOG(debug, false, "RK05 invoke %d (seek) to %o", func, diskoffb);
|
||||
|
||||
registers[(RK05_CS - RK05_BASE) / 2] |= 1 << 13; // search complete
|
||||
}
|
||||
else if (func == 7) {
|
||||
DOLOG(debug, true, "RK05 invoke %d (write lock)", func);
|
||||
DOLOG(debug, false, "RK05 invoke %d (write lock)", func);
|
||||
}
|
||||
else {
|
||||
DOLOG(debug, true, "RK05 command %d UNHANDLED", func);
|
||||
DOLOG(debug, false, "RK05 command %d UNHANDLED", func);
|
||||
}
|
||||
|
||||
registers[(RK05_WC - RK05_BASE) / 2] = 0;
|
||||
|
|
|
|||
10
rl02.cpp
10
rl02.cpp
|
|
@ -63,7 +63,7 @@ uint16_t rl02::readWord(const uint16_t addr)
|
|||
|
||||
// TODO
|
||||
|
||||
DOLOG(debug, true, "RL02 read %s/%o: %06o", regnames[reg], addr, value);
|
||||
DOLOG(debug, false, "RL02 read %s/%o: %06o", regnames[reg], addr, value);
|
||||
|
||||
return value;
|
||||
}
|
||||
|
|
@ -96,7 +96,7 @@ uint32_t rl02::calcOffset(const uint16_t da)
|
|||
|
||||
void rl02::writeWord(const uint16_t addr, uint16_t v)
|
||||
{
|
||||
DOLOG(debug, true, "RL02 write %06o: %06o", addr, v);
|
||||
DOLOG(debug, false, "RL02 write %06o: %06o", addr, v);
|
||||
|
||||
const int reg = (addr - RL02_BASE) / 2;
|
||||
|
||||
|
|
@ -107,7 +107,7 @@ void rl02::writeWord(const uint16_t addr, uint16_t v)
|
|||
|
||||
const bool do_exec = !(v & 128);
|
||||
|
||||
DOLOG(debug, true, "RL02 set command %d, exec: %d", command, do_exec);
|
||||
DOLOG(debug, false, "RL02 set command %d, exec: %d", command, do_exec);
|
||||
|
||||
uint32_t disk_offset = calcOffset(registers[(RL02_DAR - RL02_BASE) / 2] & ~1);
|
||||
int device = 0; // TODO
|
||||
|
|
@ -126,7 +126,7 @@ void rl02::writeWord(const uint16_t addr, uint16_t v)
|
|||
|
||||
uint32_t count = (65536l - registers[(RL02_MPR - RL02_BASE) / 2]) * 2;
|
||||
|
||||
DOLOG(debug, true, "RL02 read %d bytes (dec) from %d (dec) to %06o (oct)", count, disk_offset, memory_address);
|
||||
DOLOG(debug, false, "RL02 read %d bytes (dec) from %d (dec) to %06o (oct)", count, disk_offset, memory_address);
|
||||
|
||||
uint32_t p = memory_address;
|
||||
while(proceed && count > 0) {
|
||||
|
|
@ -146,7 +146,7 @@ void rl02::writeWord(const uint16_t addr, uint16_t v)
|
|||
}
|
||||
|
||||
if (registers[(RL02_CSR - RL02_BASE) / 2] & 64) { // interrupt enable?
|
||||
DOLOG(debug, true, "RL02 triggering interrupt");
|
||||
DOLOG(debug, false, "RL02 triggering interrupt");
|
||||
|
||||
b->getCpu()->queue_interrupt(5, 0254);
|
||||
}
|
||||
|
|
|
|||
12
tm-11.cpp
12
tm-11.cpp
|
|
@ -60,7 +60,7 @@ uint16_t tm_11::readWord(const uint16_t addr)
|
|||
vtemp = 0;
|
||||
}
|
||||
|
||||
DOLOG(debug, true, "TM-11 read addr %o: %o", addr, vtemp);
|
||||
DOLOG(debug, false, "TM-11 read addr %o: %o", addr, vtemp);
|
||||
|
||||
return vtemp;
|
||||
}
|
||||
|
|
@ -83,20 +83,20 @@ void tm_11::writeByte(const uint16_t addr, const uint8_t v)
|
|||
|
||||
void tm_11::writeWord(const uint16_t addr, uint16_t v)
|
||||
{
|
||||
DOLOG(debug, true, "TM-11 write %o: %o", addr, v);
|
||||
DOLOG(debug, false, "TM-11 write %o: %o", addr, v);
|
||||
|
||||
if (addr == TM_11_MTC) {
|
||||
if (v & 1) { // GO
|
||||
const int func = (v >> 1) & 7; // FUNCTION
|
||||
const int reclen = 512;
|
||||
|
||||
DOLOG(debug, true, "invoke %d", func);
|
||||
DOLOG(debug, false, "invoke %d", func);
|
||||
|
||||
if (func == 0) { // off-line
|
||||
v = 128; // TODO set error if error
|
||||
}
|
||||
else if (func == 1) { // read
|
||||
DOLOG(debug, true, "reading %d bytes from offset %d", reclen, offset);
|
||||
DOLOG(debug, false, "reading %d bytes from offset %d", reclen, offset);
|
||||
if (fread(xfer_buffer, 1, reclen, fh) != reclen)
|
||||
DOLOG(info, true, "failed: %s", strerror(errno));
|
||||
for(int i=0; i<reclen; i++)
|
||||
|
|
@ -129,9 +129,9 @@ void tm_11::writeWord(const uint16_t addr, uint16_t v)
|
|||
}
|
||||
else if (addr == TM_11_MTCMA) {
|
||||
v &= ~1;
|
||||
DOLOG(debug, true, "Set DMA address to %o", v);
|
||||
DOLOG(debug, false, "Set DMA address to %o", v);
|
||||
}
|
||||
|
||||
DOLOG(debug, true, "set register %o to %o", addr, v);
|
||||
DOLOG(debug, false, "set register %o to %o", addr, v);
|
||||
registers[(addr - TM_11_BASE) / 2] = v;
|
||||
}
|
||||
|
|
|
|||
8
tty.cpp
8
tty.cpp
|
|
@ -111,7 +111,7 @@ uint16_t tty::readWord(const uint16_t addr)
|
|||
xSemaphoreGive(chars_lock);
|
||||
#endif
|
||||
|
||||
DOLOG(debug, true, "PDP11TTY read addr %o (%s): %d, 7bit: %d", addr, regnames[reg], vtemp, vtemp & 127);
|
||||
DOLOG(debug, false, "PDP11TTY read addr %o (%s): %d, 7bit: %d", addr, regnames[reg], vtemp, vtemp & 127);
|
||||
|
||||
registers[reg] = vtemp;
|
||||
|
||||
|
|
@ -166,12 +166,12 @@ void tty::writeWord(const uint16_t addr, uint16_t v)
|
|||
{
|
||||
const int reg = (addr - PDP11TTY_BASE) / 2;
|
||||
|
||||
DOLOG(debug, true, "PDP11TTY write %o (%s): %o", addr, regnames[reg], v);
|
||||
DOLOG(debug, false, "PDP11TTY write %o (%s): %o", addr, regnames[reg], v);
|
||||
|
||||
if (addr == PDP11TTY_TPB) {
|
||||
char ch = v & 127;
|
||||
|
||||
DOLOG(debug, true, "PDP11TTY print '%c'", ch);
|
||||
DOLOG(debug, false, "PDP11TTY print '%c'", ch);
|
||||
|
||||
c->put_char(ch);
|
||||
|
||||
|
|
@ -181,6 +181,6 @@ void tty::writeWord(const uint16_t addr, uint16_t v)
|
|||
b->getCpu()->queue_interrupt(4, 064);
|
||||
}
|
||||
|
||||
DOLOG(debug, true, "set register %o to %o", addr, v);
|
||||
DOLOG(debug, false, "set register %o to %o", addr, v);
|
||||
registers[(addr - PDP11TTY_BASE) / 2] = v;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue