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MIPS calculation: compensate for idle waits

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folkert van heusden 2024-03-29 10:29:09 +01:00
parent 81f7d8f1ad
commit 661d94f8f6
Signed by untrusted user who does not match committer: folkert
GPG key ID: 6B6455EDFEED3BD1
2 changed files with 13 additions and 7 deletions
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7
cpu.cpp
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@ -41,6 +41,7 @@ void cpu::emulation_start()
instruction_count = 0; instruction_count = 0;
running_since = get_ms(); running_since = get_ms();
wait_time = 0;
} }
bool cpu::check_breakpoint() bool cpu::check_breakpoint()
@ -75,7 +76,7 @@ std::tuple<double, double, uint64_t> cpu::get_mips_rel_speed()
{ {
uint64_t instr_count = get_instructions_executed_count(); uint64_t instr_count = get_instructions_executed_count();
uint32_t t_diff = get_ms() - running_since; // TODO fix this because we now implement WAIT where it sits idle uint32_t t_diff = get_ms() - running_since - (wait_time / 1000);
double mips = instr_count / (1000.0 * t_diff); double mips = instr_count / (1000.0 * t_diff);
@ -1524,6 +1525,7 @@ bool cpu::misc_operations(const uint16_t instr)
case 0b0000000000000001: // WAIT case 0b0000000000000001: // WAIT
{ {
uint64_t start = get_us();
#if defined(BUILD_FOR_RP2040) #if defined(BUILD_FOR_RP2040)
uint8_t rc = 0; uint8_t rc = 0;
xQueueReceive(qi_q, &rc, 0); xQueueReceive(qi_q, &rc, 0);
@ -1532,6 +1534,9 @@ bool cpu::misc_operations(const uint16_t instr)
qi_cv.wait(lck); qi_cv.wait(lck);
#endif #endif
uint64_t end = get_us();
wait_time += end - start; // used for MIPS calculation
} }
DOLOG(debug, false, "WAIT returned"); DOLOG(debug, false, "WAIT returned");

13
cpu.h
View file

@ -31,14 +31,15 @@ class cpu
private: private:
uint16_t regs0_5[2][6]; // R0...5, selected by bit 11 in PSW, uint16_t regs0_5[2][6]; // R0...5, selected by bit 11 in PSW,
uint16_t sp[3 + 1]; // stackpointers, MF../MT.. select via 12/13 from PSW, others via 14/15 uint16_t sp[3 + 1]; // stackpointers, MF../MT.. select via 12/13 from PSW, others via 14/15
uint16_t pc { 0 }; uint16_t pc { 0 };
uint16_t psw { 0 }; uint16_t psw { 0 };
uint16_t fpsr { 0 }; uint16_t fpsr { 0 };
uint16_t stackLimitRegister { 0377 }; uint16_t stackLimitRegister { 0377 };
uint64_t instruction_count { 0 }; uint64_t instruction_count { 0 };
uint64_t running_since { 0 }; uint64_t running_since { 0 };
uint64_t wait_time { 0 };
uint64_t mtpi_count { 0 }; uint64_t mtpi_count { 0 };
// level, vector // level, vector
std::map<uint8_t, std::set<uint8_t> > queued_interrupts; std::map<uint8_t, std::set<uint8_t> > queued_interrupts;