removed more old dis-as code
This commit is contained in:
parent
976f37c0bc
commit
67fe7145fe
2 changed files with 42 additions and 83 deletions
121
cpu.cpp
121
cpu.cpp
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@ -9,10 +9,6 @@
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#include "gen.h"
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#include "utils.h"
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#ifndef _DEBUG
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std::string *src_gam_text = NULL, *dst_gam_text = NULL;
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#endif
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#define SIGN(x, wm) ((wm) ? (x) & 0x80 : (x) & 0x8000)
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cpu::cpu(bus *const b) : b(b)
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@ -142,7 +138,7 @@ void cpu::setPSW_spl(const int v)
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}
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// GAM = general addressing modes
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uint16_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode, const bool prev_mode, std::string *const text)
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uint16_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode, const bool prev_mode)
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{
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uint16_t next_word = 0, temp = 0;
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@ -157,12 +153,6 @@ uint16_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode
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addRegister(reg, prev_mode, 2);
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else
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addRegister(reg, prev_mode, word_mode ? 1 : 2);
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#if _DEBUG
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if (reg == 7)
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*text = format("#%o", temp);
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else
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*text = format("(R%d)+", reg);
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#endif
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return temp;
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case 3:
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temp = b -> read(b -> read(getRegister(reg, prev_mode), false, prev_mode), word_mode, prev_mode);
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@ -179,16 +169,8 @@ uint16_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode
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return b -> read(b -> read(getRegister(reg, prev_mode), false, prev_mode), word_mode, prev_mode);
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case 6:
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next_word = b -> read(getPC(), false, prev_mode);
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//fprintf(stderr, "next word %o\n", next_word);
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addRegister(7, prev_mode, + 2);
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temp = b -> read(getRegister(reg, prev_mode) + next_word, word_mode, prev_mode);
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//fprintf(stderr, "-> %d: %o\n", word_mode, temp);
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#if !defined(NDEBUG) && !defined(ESP32)
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if (reg == 7)
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*text = format("0o%o", getPC() + next_word); // FIXME
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else
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*text = format("0o%o(R%d)", next_word, reg);
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#endif
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return temp;
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case 7:
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next_word = b -> read(getPC(), false, prev_mode);
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@ -199,7 +181,7 @@ uint16_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode
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return -1;
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}
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void cpu::putGAM(const uint8_t mode, const int reg, const bool word_mode, const uint16_t value, bool const prev_mode, std::string *const text)
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void cpu::putGAM(const uint8_t mode, const int reg, const bool word_mode, const uint16_t value, bool const prev_mode)
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{
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uint16_t next_word = 0;
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@ -316,10 +298,6 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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const uint8_t src_mode = (src >> 3) & 7;
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const uint8_t src_reg = src & 7;
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#if !defined(NDEBUG) && !defined(ESP32)
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std::string debug_a, debug_b;
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std::string *src_gam_text = &debug_a, *dst_gam_text = &debug_b;
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#endif
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uint16_t src_value;
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const uint8_t dst = instr & 63;
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@ -328,15 +306,15 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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switch(operation) {
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case 0b001: // MOV/MOVB Move Word/Byte
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src_value = getGAM(src_mode, src_reg, word_mode, false, src_gam_text);
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src_value = getGAM(src_mode, src_reg, word_mode, false);
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if (word_mode) {
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if (dst_mode == 0)
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setRegister(dst_reg, false, int8_t(src_value));
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else
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putGAM(dst_mode, dst_reg, word_mode, src_value, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, src_value, false);
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}
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else {
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putGAM(dst_mode, dst_reg, word_mode, src_value, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, src_value, false);
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}
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setPSW_n(SIGN(src_value, word_mode));
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@ -346,8 +324,8 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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return true;
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case 0b010: { // CMP/CMPB Compare Word/Byte
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src_value = getGAM(src_mode, src_reg, word_mode, false, src_gam_text);
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uint16_t dst_value = getGAM(dst_mode, dst_reg, word_mode, false, dst_gam_text);
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src_value = getGAM(src_mode, src_reg, word_mode, false);
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uint16_t dst_value = getGAM(dst_mode, dst_reg, word_mode, false);
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uint16_t temp = (src_value - dst_value) & (word_mode ? 0xff : 0xffff);
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setPSW_n(SIGN(temp, word_mode));
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@ -361,8 +339,8 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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}
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case 0b011: { // BIT/BITB Bit Test Word/Byte
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src_value = getGAM(src_mode, src_reg, word_mode, false, src_gam_text);
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uint16_t dst_value = getGAM(dst_mode, dst_reg, word_mode, false, dst_gam_text);
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src_value = getGAM(src_mode, src_reg, word_mode, false);
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uint16_t dst_value = getGAM(dst_mode, dst_reg, word_mode, false);
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uint16_t result = dst_value & src_value;
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setPSW_n(SIGN(result, word_mode));
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setPSW_z(result == 0);
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@ -371,13 +349,13 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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}
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case 0b100: { // BIC/BICB Bit Clear Word/Byte
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src_value = getGAM(src_mode, src_reg, word_mode, false, src_gam_text);
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src_value = getGAM(src_mode, src_reg, word_mode, false);
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uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
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uint16_t result = b -> readWord(a) & ~src_value;
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, result, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, result, false);
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else
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b -> write(a, word_mode, result);
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@ -388,19 +366,15 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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}
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case 0b101: { // BIS/BISB Bit Set Word/Byte
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src_value = getGAM(src_mode, src_reg, word_mode, false, src_gam_text);
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src_value = getGAM(src_mode, src_reg, word_mode, false);
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uint16_t a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
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uint16_t result = b -> readWord(a) | src_value;
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, result, false, dst_gam_text);
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else {
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#if !defined(NDEBUG) && !defined(ESP32)
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dst_gam_text -> assign(format("(%o)", a));
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#endif
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putGAM(dst_mode, dst_reg, word_mode, result, false);
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else
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b -> write(a, word_mode, result);
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}
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setPSW_n(SIGN(result, word_mode));
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setPSW_z(result == 0);
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@ -409,7 +383,7 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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}
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case 0b110: { // ADD/SUB Add/Subtract Word
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int16_t src_value = getGAM(src_mode, src_reg, false, false, src_gam_text);
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int16_t src_value = getGAM(src_mode, src_reg, false, false);
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uint16_t da = getGAMAddress(dst_mode, dst_reg, false, false);
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int16_t dst_value = b -> readWord(da);
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int16_t result = 0;
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@ -440,11 +414,6 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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{
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const uint8_t reg = (instr >> 6) & 7;
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#if !defined(NDEBUG) && !defined(ESP32)
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std::string debug_b;
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std::string *dst_gam_text = &debug_b;
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#endif
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const uint8_t dst = instr & 63;
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const uint8_t dst_mode = (dst >> 3) & 7;
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const uint8_t dst_reg = dst & 7;
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@ -454,7 +423,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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switch(operation) {
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case 0: { // MUL
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uint16_t R = getRegister(reg);
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int32_t result = R * getGAM(dst_mode, dst_reg, true, false, dst_gam_text);
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int32_t result = R * getGAM(dst_mode, dst_reg, true, false);
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if (reg & 1)
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setRegister(reg, result >> 16);
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@ -471,7 +440,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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case 1: { // DIV
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int32_t R0R1 = (getRegister(reg) << 16) | getRegister(reg + 1);
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int32_t divider = getGAM(dst_mode, dst_reg, true, false, dst_gam_text);
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int32_t divider = getGAM(dst_mode, dst_reg, true, false);
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if (divider == 0) {
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setPSW_n(false);
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@ -497,7 +466,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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case 2: { // ASH
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int16_t R = getRegister(reg), oldR = R;
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int8_t shift = getGAM(dst_mode, dst_reg, true, false, dst_gam_text);
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int8_t shift = getGAM(dst_mode, dst_reg, true, false);
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if (shift > 0) {
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R <<= shift - 1;
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@ -520,7 +489,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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case 3: { // ASHC
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uint32_t R0R1 = (getRegister(reg) << 16) | getRegister(reg + 1);
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int16_t shift = getGAM(dst_mode, dst_reg, true, false, dst_gam_text);
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int16_t shift = getGAM(dst_mode, dst_reg, true, false);
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if (shift > 0) {
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R0R1 <<= (shift & 0b111111) - 1;
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@ -543,8 +512,8 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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}
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case 4: { // XOR (word only)
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uint16_t src_value = getGAM(dst_mode, dst_reg, true, false, dst_gam_text) ^ getRegister(reg);
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putGAM(dst_mode, dst_reg, false, src_value, false, dst_gam_text);
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uint16_t src_value = getGAM(dst_mode, dst_reg, true, false) ^ getRegister(reg);
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putGAM(dst_mode, dst_reg, false, src_value, false);
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setPSW_n(src_value & 0x8000);
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setPSW_z(src_value == 0);
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setPSW_v(false);
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@ -576,13 +545,6 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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int32_t vl = -1;
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uint16_t v = -1;
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#if !defined(NDEBUG) && !defined(ESP32)
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std::string debug_b;
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std::string *dst_gam_text = &debug_b;
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std::string debug_b2;
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std::string *src_gam_text = &debug_b2;
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#endif
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switch(opcode) {
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case 0b00000011: // SWAB
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if (word_mode) // handled elsewhere
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@ -616,7 +578,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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case 0b000101000: // CLR/CLRB
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a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, 0, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, 0, false);
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else
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b -> write(a, word_mode, 0);
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setPSW_n(false);
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@ -639,7 +601,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setPSW_c(true);
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, vl, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, vl, false);
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else
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b -> write(a, word_mode, vl);
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@ -653,7 +615,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setPSW_z(vl == 0);
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setPSW_v(word_mode ? v == 0x7f : v == 0x7fff);
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, vl, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, vl, false);
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else
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b -> write(a, word_mode, vl);
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break;
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@ -666,7 +628,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setPSW_z(vl == 0);
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setPSW_v(word_mode ? v == 0x80 : v == 0x8000);
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, vl, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, vl, false);
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else
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b -> write(a, word_mode, vl);
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break;
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@ -676,7 +638,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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v = b -> read(a, word_mode);
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vl = word_mode ? uint8_t(-int8_t(v)) : -int16_t(v);
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, vl, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, vl, false);
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else
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b -> write(a, word_mode, vl);
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setPSW_n(SIGN(vl, word_mode));
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@ -690,7 +652,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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uint16_t org = b -> read(a, word_mode);
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uint16_t new_ = org + getPSW_c();
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, new_, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, new_, false);
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else
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b -> write(a, word_mode, new_);
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setPSW_n(SIGN(new_, word_mode));
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@ -706,7 +668,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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v = b -> read(a, word_mode);
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vl = (v - getPSW_c()) & (word_mode ? 0xff : 0xffff);
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, vl, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, vl, false);
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else
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b -> write(a, word_mode, vl);
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setPSW_n(SIGN(vl, word_mode));
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@ -720,7 +682,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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break;
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case 0b000101111: // TST/TSTB
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v = getGAM(dst_mode, dst_reg, word_mode, false, dst_gam_text);
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v = getGAM(dst_mode, dst_reg, word_mode, false);
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setPSW_n(word_mode ? v & 128 : v & 32768);
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setPSW_z(v == 0);
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setPSW_v(false);
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@ -736,14 +698,14 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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if (word_mode) {
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temp = (t >> 1) | (getPSW_c() << 7);
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, temp, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, temp, false);
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else
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b -> writeByte(a, temp);
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}
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else {
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temp = (t >> 1) | (getPSW_c() << 15);
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, temp, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, temp, false);
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else
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b -> writeWord(a, temp);
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}
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@ -768,7 +730,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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new_carry = t & 0x80;
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temp = ((t << 1) | getPSW_c()) & 0xff;
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, temp, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, temp, false);
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else
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b -> writeByte(a, temp);
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}
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@ -776,7 +738,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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new_carry = t & 0x8000;
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temp = (t << 1) | getPSW_c();
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, temp, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, temp, false);
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else
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b -> writeWord(a, temp);
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}
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@ -804,7 +766,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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vl |= hb << 15;
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, vl, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, vl, false);
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else
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b -> write(a, word_mode, vl);
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@ -823,14 +785,14 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setPSW_c(word_mode ? vl & 0x80 : vl & 0x8000);
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setPSW_v(getPSW_n() ^ getPSW_c());
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if (dst_mode == 0)
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putGAM(dst_mode, dst_reg, word_mode, v, false, dst_gam_text);
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putGAM(dst_mode, dst_reg, word_mode, v, false);
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else
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b -> write(a, word_mode, v);
|
||||
break;
|
||||
|
||||
case 0b00110101: // MFPD/MFPI
|
||||
// FIXME
|
||||
v = getGAM(dst_mode, dst_reg, word_mode, true, dst_gam_text);
|
||||
v = getGAM(dst_mode, dst_reg, word_mode, true);
|
||||
setPSW_n(word_mode ? v & 0x80 : v & 0x8000);
|
||||
setPSW_z(v == 0);
|
||||
setPSW_v(false);
|
||||
|
@ -845,18 +807,18 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
|||
setPSW_z(v == 0);
|
||||
setPSW_v(false);
|
||||
if (dst_mode == 0)
|
||||
putGAM(dst_mode, dst_reg, word_mode, v, true, dst_gam_text);
|
||||
putGAM(dst_mode, dst_reg, word_mode, v, true);
|
||||
else
|
||||
b -> write(a, word_mode, v); // ?
|
||||
break;
|
||||
|
||||
case 0b000110100: // MTPS (put something in PSW)
|
||||
psw = getGAM(dst_mode, dst_reg, word_mode, false, src_gam_text);
|
||||
psw = getGAM(dst_mode, dst_reg, word_mode, false);
|
||||
break;
|
||||
|
||||
case 0b000110111: // MFPS (get PSW to something) / SXT
|
||||
if (word_mode) { // MFPS
|
||||
putGAM(dst_mode, dst_reg, word_mode, psw, false, dst_gam_text);
|
||||
putGAM(dst_mode, dst_reg, word_mode, psw, false);
|
||||
}
|
||||
else { // SXT
|
||||
a = getGAMAddress(dst_mode, dst_reg, word_mode, false);
|
||||
|
@ -868,7 +830,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
|||
setPSW_v(false);
|
||||
|
||||
if (dst_mode == 0)
|
||||
putGAM(dst_mode, dst_reg, word_mode, vl, false, dst_gam_text);
|
||||
putGAM(dst_mode, dst_reg, word_mode, vl, false);
|
||||
else
|
||||
b -> write(a, word_mode, vl);
|
||||
}
|
||||
|
@ -886,9 +848,6 @@ bool cpu::conditional_branch_instructions(const uint16_t instr)
|
|||
const uint8_t opcode = (instr >> 8) & 255;
|
||||
const int8_t offset = instr & 255;
|
||||
bool take = false;
|
||||
#if !defined(NDEBUG) && !defined(ESP32)
|
||||
std::string name;
|
||||
#endif
|
||||
|
||||
switch(opcode) {
|
||||
case 0b00000001: // BR
|
||||
|
|
4
cpu.h
4
cpu.h
|
@ -27,8 +27,8 @@ private:
|
|||
void addRegister(const int nr, const bool MF_MT, const uint16_t value);
|
||||
|
||||
uint16_t getGAMAddress(const uint8_t mode, const int reg, const bool word_mode, const bool MF_MT);
|
||||
uint16_t getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode, const bool MF_MT, std::string *const text);
|
||||
void putGAM(const uint8_t mode, const int reg, const bool word_mode, const uint16_t value, const bool MF_FT, std::string *const text);
|
||||
uint16_t getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode, const bool MF_MT);
|
||||
void putGAM(const uint8_t mode, const int reg, const bool word_mode, const uint16_t value, const bool MF_FT);
|
||||
|
||||
void switchModeToKernel();
|
||||
|
||||
|
|
Loading…
Add table
Reference in a new issue