MTPx auto increment SP and thus should update MMR1
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parent
d0359d510f
commit
788df49a8d
1 changed files with 10 additions and 8 deletions
18
cpu.cpp
18
cpu.cpp
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@ -331,23 +331,23 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode
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uint16_t next_word = 0;
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uint16_t next_word = 0;
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switch(mode) {
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switch(mode) {
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case 0: // 000
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case 0: // Rn
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g.reg = reg;
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g.reg = reg;
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g.value = getRegister(reg, g.set, prev_mode) & (word_mode ? 0xff : 0xffff);
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g.value = getRegister(reg, g.set, prev_mode) & (word_mode ? 0xff : 0xffff);
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break;
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break;
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case 1:
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case 1: // (Rn)
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g.addr = getRegister(reg, g.set, prev_mode);
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g.addr = getRegister(reg, g.set, prev_mode);
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if (read_value)
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if (read_value)
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g.value = b->read(g.addr.value(), word_mode, prev_mode, false, isR7_space);
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g.value = b->read(g.addr.value(), word_mode, prev_mode, false, isR7_space);
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break;
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break;
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case 2:
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case 2: // (Rn)+ / #n
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g.addr = getRegister(reg, g.set, prev_mode);
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g.addr = getRegister(reg, g.set, prev_mode);
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if (read_value)
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if (read_value)
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g.value = b->read(g.addr.value(), word_mode, prev_mode, false, isR7_space);
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g.value = b->read(g.addr.value(), word_mode, prev_mode, false, isR7_space);
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? 2 : 1);
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? 2 : 1);
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addToMMR1(mode, reg, word_mode);
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addToMMR1(mode, reg, word_mode);
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break;
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break;
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case 3:
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case 3: // @(Rn)+ / @#a
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g.addr = b->read(getRegister(reg, g.set, prev_mode), false, prev_mode, isR7_space);
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g.addr = b->read(getRegister(reg, g.set, prev_mode), false, prev_mode, isR7_space);
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addRegister(reg, prev_mode, 2);
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addRegister(reg, prev_mode, 2);
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if (read_value) {
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if (read_value) {
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@ -356,14 +356,14 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode
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}
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}
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addToMMR1(mode, reg, word_mode);
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addToMMR1(mode, reg, word_mode);
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break;
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break;
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case 4:
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case 4: // -(Rn)
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? -2 : -1);
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? -2 : -1);
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g.addr = getRegister(reg, g.set, prev_mode);
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g.addr = getRegister(reg, g.set, prev_mode);
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if (read_value)
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if (read_value)
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g.value = b->read(g.addr.value(), word_mode, prev_mode, false, isR7_space);
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g.value = b->read(g.addr.value(), word_mode, prev_mode, false, isR7_space);
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addToMMR1(mode, reg, word_mode);
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addToMMR1(mode, reg, word_mode);
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break;
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break;
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case 5:
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case 5: // @-(Rn)
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addRegister(reg, prev_mode, -2);
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addRegister(reg, prev_mode, -2);
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g.addr = b->read(getRegister(reg, g.set, prev_mode), false, prev_mode, isR7_space);
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g.addr = b->read(getRegister(reg, g.set, prev_mode), false, prev_mode, isR7_space);
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if (read_value) {
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if (read_value) {
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@ -372,7 +372,7 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode
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}
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}
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addToMMR1(mode, reg, word_mode);
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addToMMR1(mode, reg, word_mode);
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break;
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break;
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case 6:
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case 6: // x(Rn) / a
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next_word = b->read(getPC(), false, prev_mode, i_space);
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next_word = b->read(getPC(), false, prev_mode, i_space);
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addRegister(7, prev_mode, + 2);
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addRegister(7, prev_mode, + 2);
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g.addr = getRegister(reg, g.set, prev_mode) + next_word;
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g.addr = getRegister(reg, g.set, prev_mode) + next_word;
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@ -381,7 +381,7 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode
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g.value = b->read(g.addr.value(), word_mode, prev_mode, g.space);
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g.value = b->read(g.addr.value(), word_mode, prev_mode, g.space);
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}
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}
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break;
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break;
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case 7:
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case 7: // @x(Rn) / @a
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next_word = b->read(getPC(), false, prev_mode, i_space);
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next_word = b->read(getPC(), false, prev_mode, i_space);
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addRegister(7, prev_mode, + 2);
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addRegister(7, prev_mode, + 2);
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g.addr = b->read(getRegister(reg, g.set, prev_mode) + next_word, false, prev_mode, d_space);
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g.addr = b->read(getRegister(reg, g.set, prev_mode) + next_word, false, prev_mode, d_space);
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@ -1290,6 +1290,8 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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if (set_flags)
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if (set_flags)
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setPSW_flags_nzv(v, false);
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setPSW_flags_nzv(v, false);
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b->addToMMR1(2, 6);
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break;
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break;
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}
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}
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