the check if odd-address access is performed is done by the mmu
This commit is contained in:
parent
c44675311a
commit
8860b04045
5 changed files with 24 additions and 34 deletions
42
bus.cpp
42
bus.cpp
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@ -212,18 +212,6 @@ void bus::init()
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mmu_->setMMR3(0);
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mmu_->setMMR3(0);
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}
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}
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void bus::trap_odd(const uint16_t a)
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{
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uint16_t temp = mmu_->getMMR0();
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temp &= ~(7 << 1);
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temp |= (a >> 13) << 1;
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mmu_->setMMR0(temp);
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c->trap(004); // invalid access
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}
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uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm_selection_t mode_selection, const bool peek_only, const d_i_space_t space)
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uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm_selection_t mode_selection, const bool peek_only, const d_i_space_t space)
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{
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{
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int run_mode = mode_selection == rm_cur ? c->getPSW_runmode() : c->getPSW_prev_runmode();
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int run_mode = mode_selection == rm_cur ? c->getPSW_runmode() : c->getPSW_prev_runmode();
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@ -270,9 +258,9 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
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///^ registers ^///
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///^ registers ^///
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if (!peek_only) {
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if (!peek_only) {
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if ((a & 1) && word_mode == wm_word) {
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if ((a & 1) && word_mode == wm_word) [[unlikely]] {
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DOLOG(debug, false, "READ-I/O odd address %06o UNHANDLED", a);
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DOLOG(debug, false, "READ-I/O odd address %06o UNHANDLED", a);
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trap_odd(a);
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mmu_->trap_if_odd(addr_in, run_mode, space, false);
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throw 0;
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throw 0;
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return 0;
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return 0;
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}
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}
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@ -507,8 +495,8 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
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}
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}
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if (peek_only == false && word_mode == wm_word && (addr_in & 1)) {
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if (peek_only == false && word_mode == wm_word && (addr_in & 1)) {
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if (!peek_only) DOLOG(debug, false, "READ from %06o - odd address!", addr_in);
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DOLOG(debug, false, "READ from %06o - odd address!", addr_in);
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trap_odd(addr_in);
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mmu_->trap_if_odd(addr_in, run_mode, space, false);
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throw 2;
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throw 2;
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return 0;
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return 0;
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}
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}
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@ -534,18 +522,6 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
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return temp;
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return temp;
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}
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}
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void bus::check_odd_addressing(const uint16_t a, const int run_mode, const d_i_space_t space, const bool is_write)
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{
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if (a & 1) {
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if (is_write)
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mmu_->set_page_trapped(run_mode, space == d_space, a >> 13);
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trap_odd(a);
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throw 4;
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}
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}
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memory_addresses_t bus::calculate_physical_address(const int run_mode, const uint16_t a) const
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memory_addresses_t bus::calculate_physical_address(const int run_mode, const uint16_t a) const
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{
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{
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const uint8_t apf = a >> 13; // active page field
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const uint8_t apf = a >> 13; // active page field
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@ -1011,10 +987,11 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1
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DOLOG(debug, false, "WRITE-I/O UNHANDLED %08o(%c): %06o (base: %o)", m_offset, word_mode == wm_byte ? 'B' : 'W', value, get_io_base());
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DOLOG(debug, false, "WRITE-I/O UNHANDLED %08o(%c): %06o (base: %o)", m_offset, word_mode == wm_byte ? 'B' : 'W', value, get_io_base());
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if (word_mode == wm_word && (a & 1)) {
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if (word_mode == wm_word && (a & 1)) [[unlikely]] {
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DOLOG(debug, false, "WRITE-I/O to %08o (value: %06o) - odd address!", m_offset, value);
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DOLOG(debug, false, "WRITE-I/O to %08o (value: %06o) - odd address!", m_offset, value);
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trap_odd(a);
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mmu_->trap_if_odd(a, run_mode, space, true);
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throw 8;
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throw 8;
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}
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}
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@ -1023,10 +1000,11 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1
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throw 9;
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throw 9;
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}
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}
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if (word_mode == wm_word && (addr_in & 1)) {
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if (word_mode == wm_word && (addr_in & 1)) [[unlikely]] {
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DOLOG(debug, false, "WRITE to %06o (value: %06o) - odd address!", addr_in, value);
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DOLOG(debug, false, "WRITE to %06o (value: %06o) - odd address!", addr_in, value);
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trap_odd(addr_in);
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mmu_->trap_if_odd(addr_in, run_mode, space, true);
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throw 10;
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throw 10;
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}
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}
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1
bus.h
1
bus.h
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@ -140,7 +140,6 @@ public:
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void writePhysical(const uint32_t a, const uint16_t value);
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void writePhysical(const uint32_t a, const uint16_t value);
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void check_odd_addressing(const uint16_t a, const int run_mode, const d_i_space_t space, const bool is_write);
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void check_odd_addressing(const uint16_t a, const int run_mode, const d_i_space_t space, const bool is_write);
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void trap_odd(const uint16_t a);
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uint32_t get_io_base() const { return mmu_->getMMR0() & 1 ? (mmu_->getMMR3() & 16 ? 017760000 : 0760000) : 0160000; }
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uint32_t get_io_base() const { return mmu_->getMMR0() & 1 ? (mmu_->getMMR3() & 16 ? 017760000 : 0760000) : 0160000; }
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bool is_psw(const uint16_t addr, const int run_mode, const d_i_space_t space) const;
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bool is_psw(const uint16_t addr, const int run_mode, const d_i_space_t space) const;
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11
mmu.cpp
11
mmu.cpp
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@ -213,6 +213,17 @@ void mmu::write_byte(const uint16_t a, const uint8_t value)
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write_par(a, 3, value, wm_byte);
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write_par(a, 3, value, wm_byte);
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}
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}
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void mmu::trap_if_odd(const uint16_t a, const int run_mode, const d_i_space_t space, const bool is_write)
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{
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int page = a >> 13;
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if (is_write)
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set_page_trapped(run_mode, space == d_space, page);
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MMR0 &= ~(7 << 1);
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MMR0 |= page << 1;
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}
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#if IS_POSIX
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#if IS_POSIX
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void mmu::add_par_pdr(json_t *const target, const int run_mode, const bool is_d, const std::string & name) const
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void mmu::add_par_pdr(json_t *const target, const int run_mode, const bool is_d, const std::string & name) const
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{
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{
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2
mmu.h
2
mmu.h
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@ -88,6 +88,8 @@ public:
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void setMMR0Bit(const int bit);
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void setMMR0Bit(const int bit);
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void clearMMR0Bit(const int bit);
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void clearMMR0Bit(const int bit);
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void trap_if_odd(const uint16_t a, const int run_mode, const d_i_space_t space, const bool is_write);
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uint16_t getCPUERR() const { return CPUERR; }
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uint16_t getCPUERR() const { return CPUERR; }
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void setCPUERR(const uint16_t v) { CPUERR = v; }
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void setCPUERR(const uint16_t v) { CPUERR = v; }
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