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SR0 errors by KKTBD0 fixed

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This commit is contained in:
folkert van heusden 2022-06-18 08:48:29 +02:00
parent d851c4b9a0
commit 9d55740a0f
3 changed files with 24 additions and 3 deletions
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19
bus.cpp
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@ -326,6 +326,14 @@ void bus::setMMR0Bit(const int bit)
MMR0 |= 1 << bit;
}
void bus::clearMMR0Bit(const int bit)
{
assert(bit != 10 && bit != 11);
assert(bit < 16 && bit >= 0);
MMR0 &= ~(1 << bit);
}
void bus::setMMR2(const uint16_t value)
{
MMR2 = value;
@ -359,6 +367,7 @@ uint32_t bus::calculate_physical_address(const int run_mode, const uint16_t a, c
pages[run_mode][0][apf].pdr |= 1 << 7; // TODO: D/I
MMR0 &= 017777;
MMR0 |= 1 << 13; // read-only
MMR0 &= ~(3 << 5);
@ -367,6 +376,8 @@ uint32_t bus::calculate_physical_address(const int run_mode, const uint16_t a, c
MMR0 &= ~14; // add current page
MMR0 |= apf << 1;
DOLOG(info, true, "MMR0: %06o", MMR0);
throw 1;
}
else if (!is_write) { // read
@ -377,7 +388,11 @@ uint32_t bus::calculate_physical_address(const int run_mode, const uint16_t a, c
pages[run_mode][0][apf].pdr |= 1 << 7; // TODO: D/I
MMR0 |= 1 << 13; // read-only
MMR0 &= 017777;
if (access_control == 0 || access_control == 4)
MMR0 |= 1 << 15; // not resident
else
MMR0 |= 1 << 13; // read-only
MMR0 &= ~(3 << 5);
MMR0 |= run_mode << 5;
@ -398,6 +413,7 @@ uint32_t bus::calculate_physical_address(const int run_mode, const uint16_t a, c
DOLOG(debug, !peek_only, "bus::calculate_physical_address %o >= %o", m_offset, n_pages * 8192);
DOLOG(info, true, "TRAP(04) (throw 3) on address %06o", a);
MMR0 &= 017777;
MMR0 |= 1 << 15; // non-resident
MMR0 &= ~14; // add current page
@ -415,6 +431,7 @@ uint32_t bus::calculate_physical_address(const int run_mode, const uint16_t a, c
DOLOG(info, true, "TRAP(0250) (throw 4) on address %06o", a);
c->schedule_trap(0250); // invalid access
MMR0 &= 017777;
MMR0 |= 1 << 14; // length
MMR0 &= ~14; // add current page

1
bus.h
View file

@ -85,6 +85,7 @@ public:
void addToMMR1(const int8_t delta, const uint8_t reg);
void setMMR0(int value);
void setMMR0Bit(const int bit);
void clearMMR0Bit(const int bit);
void setMMR2(const uint16_t value);
uint16_t get_switch_register() const { return switch_register; }

7
cpu.cpp
View file

@ -1647,6 +1647,7 @@ void cpu::schedule_trap(const uint16_t vector)
scheduled_trap = vector;
}
// 'is_interrupt' is not correct naming; it is true for mmu faults and interrupts
void cpu::trap(const uint16_t vector, const int new_ipl, const bool is_interrupt)
{
uint16_t before_psw = getPSW();
@ -1661,7 +1662,9 @@ void cpu::trap(const uint16_t vector, const int new_ipl, const bool is_interrupt
b->addToMMR1(-2, 6);
}
if (!is_interrupt)
if (is_interrupt)
b->clearMMR0Bit(12);
else
b->setMMR0Bit(12); // it's a trap
setPC(b->readWord(vector + 0));
@ -2156,7 +2159,7 @@ void cpu::step_a()
b->clearMMR1();
if (scheduled_trap) {
trap(scheduled_trap, 7);
trap(scheduled_trap, 7, true);
scheduled_trap = 0;