From 4799cba2de626ff63668a1de87ec4657554f6f1d Mon Sep 17 00:00:00 2001 From: folkert van heusden Date: Wed, 22 Mar 2023 13:06:33 +0100 Subject: [PATCH 1/2] Revert "d/i index 0 for i is more logical? because it is default mode." This reverts commit cf420ca726efed6f19d1eae937a2676d269a67cf. => breaks at least the unix v6 bootloader --- bus.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/bus.h b/bus.h index 3aa583e..f60921d 100644 --- a/bus.h +++ b/bus.h @@ -56,7 +56,7 @@ class cpu; class memory; class tty; -typedef enum { i_space, d_space } d_i_space_t; +typedef enum { d_space, i_space } d_i_space_t; typedef struct { uint16_t virtual_address; From cfc819630ea3b54c4c2ecb78fd7f32628577fe46 Mon Sep 17 00:00:00 2001 From: folkert van heusden Date: Wed, 22 Mar 2023 13:08:23 +0100 Subject: [PATCH 2/2] Revert "MMR2 tracking" This reverts commit 2afa705209dfa012fed5f1b66a787bcb9bcd6be2. => breaks EKBA (from XXDP) --- cpu.cpp | 26 ++++++++++++++++---------- cpu.h | 2 +- 2 files changed, 17 insertions(+), 11 deletions(-) diff --git a/cpu.cpp b/cpu.cpp index eaa9c23..a73cda0 100644 --- a/cpu.cpp +++ b/cpu.cpp @@ -1301,7 +1301,7 @@ bool cpu::single_operand_instructions(const uint16_t instr) psw &= 0xff00; // only alter lower 8 bits psw |= getGAM(dst_mode, dst_reg, word_mode, false).value.value() & 0xef; // can't change bit 4 #else - schedule_trap(010); + trap(010); #endif } else { @@ -1332,7 +1332,7 @@ bool cpu::single_operand_instructions(const uint16_t instr) setPSW_n(extend_b7); } #else - schedule_trap(010); + trap(010); #endif } else { // SXT @@ -1446,7 +1446,7 @@ bool cpu::condition_code_operations(const uint16_t instr) setPSW_spl(level); // // trap via vector 010 only(?) on an 11/60 and not(?) on an 11/70 -// schedule_trap(010); +// trap(010); return true; } @@ -1474,7 +1474,7 @@ void cpu::pushStack(const uint16_t v) if (getRegister(6) == stackLimitRegister) { DOLOG(debug, true, "stackLimitRegister reached %06o while pushing %06o", stackLimitRegister, v); - schedule_trap(123); + trap(123, 7); // TODO } else { uint16_t a = addRegister(6, false, -2); @@ -1509,11 +1509,11 @@ bool cpu::misc_operations(const uint16_t instr) return true; case 0b0000000000000011: // BPT - schedule_trap(014); + trap(014); return true; case 0b0000000000000100: // IOT - schedule_trap(020); + trap(020); return true; case 0b0000000000000110: // RTT @@ -1523,7 +1523,7 @@ bool cpu::misc_operations(const uint16_t instr) case 0b0000000000000111: // MFPT //setRegister(0, 0); - schedule_trap(010); // does not exist on PDP-11/70 + trap(010); // does not exist on PDP-11/70 return true; case 0b0000000000000101: // RESET @@ -1533,12 +1533,12 @@ bool cpu::misc_operations(const uint16_t instr) } if ((instr >> 8) == 0b10001000) { // EMT - schedule_trap(030); + trap(030); return true; } if ((instr >> 8) == 0b10001001) { // TRAP - schedule_trap(034); + trap(034); return true; } @@ -2177,9 +2177,15 @@ void cpu::step_b() uint16_t temp_pc = getPC(); + if ((b->getMMR0() & 0160000) == 0) + b->setMMR2(temp_pc); + try { uint16_t instr = b->readWord(temp_pc); + if (temp_pc == 025250) + DOLOG(debug, true, "GREP %06o %06o", temp_pc, instr); + addRegister(7, false, 2); if (double_operand_instructions(instr)) @@ -2196,7 +2202,7 @@ void cpu::step_b() DOLOG(warning, true, "UNHANDLED instruction %06o @ %06o", instr, temp_pc); - schedule_trap(010); + trap(010); } catch(const int exception) { DOLOG(debug, true, "bus-trap during execution of command (%d)", exception); diff --git a/cpu.h b/cpu.h index 40db82c..d7395ee 100644 --- a/cpu.h +++ b/cpu.h @@ -132,7 +132,7 @@ public: void setStackLimitRegister(const uint16_t v) { stackLimitRegister = v; } uint16_t getStackPointer(const int which) const { assert(which >= 0 && which < 4); return sp[which]; } - uint16_t getPC() const { b->setMMR2(pc); return pc; } + uint16_t getPC() const { return pc; } void setRegister(const int nr, const bool reg_set, const bool prev_mode, const uint16_t value); void setRegister(const int nr, const bool prev_mode, const uint16_t v) { setRegister(nr, (getPSW() >> 11) & 1, prev_mode, v); }