Merge branch 'master' of github.com:folkertvanheusden/kek
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commit
b87d94db58
1 changed files with 45 additions and 20 deletions
27
cpu.cpp
27
cpu.cpp
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@ -646,6 +646,17 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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case 0b100: { // BIC/BICB Bit Clear Word/Byte
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gam_rc_t g_src = getGAM(src_mode, src_reg, word_mode, rm_cur);
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if (dst_mode == 0) {
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addToMMR1(g_src); // keep here because of order of updates
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uint16_t v = getRegister(dst_reg); // need the full word
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uint16_t result = v & ~g_src.value.value();
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setRegister(dst_reg, result);
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setPSW_flags_nzv(result, word_mode);
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}
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else {
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auto g_dst = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(g_dst);
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@ -655,14 +666,27 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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if (put_result(g_dst, result))
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setPSW_flags_nzv(result, word_mode);
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}
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return true;
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}
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case 0b101: { // BIS/BISB Bit Set Word/Byte
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// TODO: retain MSB for register operations?
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gam_rc_t g_src = getGAM(src_mode, src_reg, word_mode, rm_cur);
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if (dst_mode == 0) {
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addToMMR1(g_src); // keep here because of order of updates
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uint16_t v = getRegister(dst_reg); // need the full word
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uint16_t result = v | g_src.value.value();
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setRegister(dst_reg, result);
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setPSW_n(SIGN(result, word_mode));
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setPSW_z(IS_0(result, word_mode));
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setPSW_v(false);
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}
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else {
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auto g_dst = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(g_dst);
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@ -675,6 +699,7 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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setPSW_z(IS_0(result, word_mode));
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setPSW_v(false);
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}
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}
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return true;
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}
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