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camel case get/setRegister

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folkert van heusden 2024-06-24 09:28:33 +02:00
parent ae5b269dfa
commit bd1228bbf8
Signed by untrusted user who does not match committer: folkert
GPG key ID: 6B6455EDFEED3BD1
7 changed files with 97 additions and 97 deletions
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2
breakpoint_register.cpp
View file

@ -42,7 +42,7 @@ std::optional<std::string> breakpoint_register::is_triggered() const
uint16_t v = 0; uint16_t v = 0;
if (register_nr < 8) if (register_nr < 8)
v = c->getRegister(register_nr); // TODO run-mode v = c->get_register(register_nr); // TODO run-mode
else { else {
hwreg_t reg = hwreg_t(register_nr); hwreg_t reg = hwreg_t(register_nr);

8
bus.cpp
View file

@ -260,12 +260,12 @@ uint16_t bus::read(const uint16_t addr_in, const word_mode_t word_mode, const rm
//// REGISTERS //// //// REGISTERS ////
if (a >= ADDR_KERNEL_R && a <= ADDR_KERNEL_R + 5) { // kernel R0-R5 if (a >= ADDR_KERNEL_R && a <= ADDR_KERNEL_R + 5) { // kernel R0-R5
uint16_t temp = c->getRegister(a - ADDR_KERNEL_R) & (word_mode == wm_byte ? 0xff : 0xffff); uint16_t temp = c->get_register(a - ADDR_KERNEL_R) & (word_mode == wm_byte ? 0xff : 0xffff);
TRACE("READ-I/O kernel R%d: %06o", a - ADDR_KERNEL_R, temp); TRACE("READ-I/O kernel R%d: %06o", a - ADDR_KERNEL_R, temp);
return temp; return temp;
} }
if (a >= ADDR_USER_R && a <= ADDR_USER_R + 5) { // user R0-R5 if (a >= ADDR_USER_R && a <= ADDR_USER_R + 5) { // user R0-R5
uint16_t temp = c->getRegister(a - ADDR_USER_R) & (word_mode == wm_byte ? 0xff : 0xffff); uint16_t temp = c->get_register(a - ADDR_USER_R) & (word_mode == wm_byte ? 0xff : 0xffff);
TRACE("READ-I/O user R%d: %06o", a - ADDR_USER_R, temp); TRACE("READ-I/O user R%d: %06o", a - ADDR_USER_R, temp);
return temp; return temp;
} }
@ -628,13 +628,13 @@ write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint1
if (a >= ADDR_KERNEL_R && a <= ADDR_KERNEL_R + 5) { // kernel R0-R5 if (a >= ADDR_KERNEL_R && a <= ADDR_KERNEL_R + 5) { // kernel R0-R5
int reg = a - ADDR_KERNEL_R; int reg = a - ADDR_KERNEL_R;
TRACE("WRITE-I/O kernel R%d: %06o", reg, value); TRACE("WRITE-I/O kernel R%d: %06o", reg, value);
c->setRegister(reg, value); c->set_register(reg, value);
return { false }; return { false };
} }
if (a >= ADDR_USER_R && a <= ADDR_USER_R + 5) { // user R0-R5 if (a >= ADDR_USER_R && a <= ADDR_USER_R + 5) { // user R0-R5
int reg = a - ADDR_USER_R; int reg = a - ADDR_USER_R;
TRACE("WRITE-I/O user R%d: %06o", reg, value); TRACE("WRITE-I/O user R%d: %06o", reg, value);
c->setRegister(reg, value); c->set_register(reg, value);
return { false }; return { false };
} }
if (a == ADDR_KERNEL_SP) { // kernel SP if (a == ADDR_KERNEL_SP) { // kernel SP

166
cpu.cpp
View file

@ -143,7 +143,7 @@ void cpu::reset()
init_interrupt_queue(); init_interrupt_queue();
} }
uint16_t cpu::getRegister(const int nr, const rm_selection_t mode_selection) const uint16_t cpu::get_register(const int nr, const rm_selection_t mode_selection) const
{ {
if (nr < 6) { if (nr < 6) {
int set = get_register_set(); int set = get_register_set();
@ -163,7 +163,7 @@ uint16_t cpu::getRegister(const int nr, const rm_selection_t mode_selection) con
return pc; return pc;
} }
void cpu::setRegister(const int nr, const uint16_t value, const rm_selection_t mode_selection) void cpu::set_register(const int nr, const uint16_t value, const rm_selection_t mode_selection)
{ {
if (nr < 6) { if (nr < 6) {
int set = get_register_set(); int set = get_register_set();
@ -182,27 +182,27 @@ void cpu::setRegister(const int nr, const uint16_t value, const rm_selection_t m
} }
} }
void cpu::setRegisterLowByte(const int nr, const word_mode_t word_mode, const uint16_t value) void cpu::set_registerLowByte(const int nr, const word_mode_t word_mode, const uint16_t value)
{ {
if (word_mode == wm_byte) { if (word_mode == wm_byte) {
uint16_t v = getRegister(nr); uint16_t v = get_register(nr);
v &= 0xff00; v &= 0xff00;
assert(value < 256); assert(value < 256);
v |= value; v |= value;
setRegister(nr, v); set_register(nr, v);
} }
else { else {
setRegister(nr, value); set_register(nr, value);
} }
} }
bool cpu::put_result(const gam_rc_t & g, const uint16_t value) bool cpu::put_result(const gam_rc_t & g, const uint16_t value)
{ {
if (g.addr.has_value() == false) { if (g.addr.has_value() == false) {
setRegisterLowByte(g.reg.value(), g.word_mode, value); set_registerLowByte(g.reg.value(), g.word_mode, value);
return true; return true;
} }
@ -491,22 +491,22 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t wo
switch(mode) { switch(mode) {
case 0: // Rn case 0: // Rn
g.reg = reg; g.reg = reg;
g.value = getRegister(reg, rm_cur) & (word_mode == wm_byte ? 0xff : 0xffff); g.value = get_register(reg, rm_cur) & (word_mode == wm_byte ? 0xff : 0xffff);
break; break;
case 1: // (Rn) case 1: // (Rn)
g.addr = getRegister(reg, rm_cur); g.addr = get_register(reg, rm_cur);
if (read_value) if (read_value)
g.value = b->read(g.addr.value(), word_mode, rm_cur, isR7_space); g.value = b->read(g.addr.value(), word_mode, rm_cur, isR7_space);
break; break;
case 2: // (Rn)+ / #n case 2: // (Rn)+ / #n
g.addr = getRegister(reg, rm_cur); g.addr = get_register(reg, rm_cur);
if (read_value) if (read_value)
g.value = b->read(g.addr.value(), word_mode, rm_cur, isR7_space); g.value = b->read(g.addr.value(), word_mode, rm_cur, isR7_space);
addRegister(reg, rm_cur, word_mode == wm_word || reg == 7 || reg == 6 ? 2 : 1); addRegister(reg, rm_cur, word_mode == wm_word || reg == 7 || reg == 6 ? 2 : 1);
g.mmr1_update = { word_mode == wm_word || reg == 7 || reg == 6 ? 2 : 1, reg }; g.mmr1_update = { word_mode == wm_word || reg == 7 || reg == 6 ? 2 : 1, reg };
break; break;
case 3: // @(Rn)+ / @#a case 3: // @(Rn)+ / @#a
g.addr = b->read(getRegister(reg, rm_cur), wm_word, rm_cur, isR7_space); g.addr = b->read(get_register(reg, rm_cur), wm_word, rm_cur, isR7_space);
// might be wrong: the adds should happen when the read is really performed, because of traps // might be wrong: the adds should happen when the read is really performed, because of traps
addRegister(reg, rm_cur, 2); addRegister(reg, rm_cur, 2);
g.mmr1_update = { 2, reg }; g.mmr1_update = { 2, reg };
@ -518,14 +518,14 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t wo
addRegister(reg, rm_cur, word_mode == wm_word || reg == 7 || reg == 6 ? -2 : -1); addRegister(reg, rm_cur, word_mode == wm_word || reg == 7 || reg == 6 ? -2 : -1);
g.mmr1_update = { word_mode == wm_word || reg == 7 || reg == 6 ? -2 : -1, reg }; g.mmr1_update = { word_mode == wm_word || reg == 7 || reg == 6 ? -2 : -1, reg };
g.space = d_space; g.space = d_space;
g.addr = getRegister(reg, rm_cur); g.addr = get_register(reg, rm_cur);
if (read_value) if (read_value)
g.value = b->read(g.addr.value(), word_mode, rm_cur, isR7_space); g.value = b->read(g.addr.value(), word_mode, rm_cur, isR7_space);
break; break;
case 5: // @-(Rn) case 5: // @-(Rn)
addRegister(reg, rm_cur, -2); addRegister(reg, rm_cur, -2);
g.mmr1_update = { -2, reg }; g.mmr1_update = { -2, reg };
g.addr = b->read(getRegister(reg, rm_cur), wm_word, rm_cur, isR7_space); g.addr = b->read(get_register(reg, rm_cur), wm_word, rm_cur, isR7_space);
g.space = d_space; g.space = d_space;
if (read_value) if (read_value)
g.value = b->read(g.addr.value(), word_mode, rm_cur, g.space); g.value = b->read(g.addr.value(), word_mode, rm_cur, g.space);
@ -533,7 +533,7 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t wo
case 6: // x(Rn) / a case 6: // x(Rn) / a
next_word = b->read(getPC(), wm_word, rm_cur, i_space); next_word = b->read(getPC(), wm_word, rm_cur, i_space);
addRegister(7, rm_cur, + 2); addRegister(7, rm_cur, + 2);
g.addr = getRegister(reg, rm_cur) + next_word; g.addr = get_register(reg, rm_cur) + next_word;
g.space = d_space; g.space = d_space;
if (read_value) if (read_value)
g.value = b->read(g.addr.value(), word_mode, rm_cur, g.space); g.value = b->read(g.addr.value(), word_mode, rm_cur, g.space);
@ -541,7 +541,7 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t wo
case 7: // @x(Rn) / @a case 7: // @x(Rn) / @a
next_word = b->read(getPC(), wm_word, rm_cur, i_space); next_word = b->read(getPC(), wm_word, rm_cur, i_space);
addRegister(7, rm_cur, + 2); addRegister(7, rm_cur, + 2);
g.addr = b->read(getRegister(reg, rm_cur) + next_word, wm_word, rm_cur, d_space); g.addr = b->read(get_register(reg, rm_cur) + next_word, wm_word, rm_cur, d_space);
g.space = d_space; g.space = d_space;
if (read_value) if (read_value)
g.value = b->read(g.addr.value(), word_mode, rm_cur, g.space); g.value = b->read(g.addr.value(), word_mode, rm_cur, g.space);
@ -563,7 +563,7 @@ bool cpu::putGAM(const gam_rc_t & g, const uint16_t value)
return rc.is_psw == false; return rc.is_psw == false;
} }
setRegister(g.reg.value(), value, g.mode_selection); set_register(g.reg.value(), value, g.mode_selection);
return true; return true;
} }
@ -604,7 +604,7 @@ bool cpu::double_operand_instructions(const uint16_t instr)
bool set_flags = true; bool set_flags = true;
if (word_mode == wm_byte && dst_mode == 0) if (word_mode == wm_byte && dst_mode == 0)
setRegister(dst_reg, int8_t(g_src.value.value())); // int8_t: sign extension set_register(dst_reg, int8_t(g_src.value.value())); // int8_t: sign extension
else { else {
auto g_dst = getGAMAddress(dst_mode, dst_reg, word_mode); auto g_dst = getGAMAddress(dst_mode, dst_reg, word_mode);
addToMMR1(g_dst); addToMMR1(g_dst);
@ -659,10 +659,10 @@ bool cpu::double_operand_instructions(const uint16_t instr)
if (dst_mode == 0) { if (dst_mode == 0) {
addToMMR1(g_src); // keep here because of order of updates addToMMR1(g_src); // keep here because of order of updates
uint16_t v = getRegister(dst_reg); // need the full word uint16_t v = get_register(dst_reg); // need the full word
uint16_t result = v & ~g_src.value.value(); uint16_t result = v & ~g_src.value.value();
setRegister(dst_reg, result); set_register(dst_reg, result);
setPSW_flags_nzv(result, word_mode); setPSW_flags_nzv(result, word_mode);
} }
@ -687,10 +687,10 @@ bool cpu::double_operand_instructions(const uint16_t instr)
if (dst_mode == 0) { if (dst_mode == 0) {
addToMMR1(g_src); // keep here because of order of updates addToMMR1(g_src); // keep here because of order of updates
uint16_t v = getRegister(dst_reg); // need the full word uint16_t v = get_register(dst_reg); // need the full word
uint16_t result = v | g_src.value.value(); uint16_t result = v | g_src.value.value();
setRegister(dst_reg, result); set_register(dst_reg, result);
setPSW_n(SIGN(result, word_mode)); setPSW_n(SIGN(result, word_mode));
setPSW_z(IS_0(result, word_mode)); setPSW_z(IS_0(result, word_mode));
@ -774,7 +774,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
switch(operation) { switch(operation) {
case 0: { // MUL case 0: { // MUL
int16_t R1 = getRegister(reg); int16_t R1 = get_register(reg);
auto R2g = getGAM(dst_mode, dst_reg, wm_word); auto R2g = getGAM(dst_mode, dst_reg, wm_word);
addToMMR1(R2g); addToMMR1(R2g);
@ -782,8 +782,8 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
int32_t result = R1 * R2; int32_t result = R1 * R2;
setRegister(reg, result >> 16); set_register(reg, result >> 16);
setRegister(reg | 1, result & 65535); set_register(reg | 1, result & 65535);
setPSW_n(result < 0); setPSW_n(result < 0);
setPSW_z(result == 0); setPSW_z(result == 0);
@ -797,7 +797,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
addToMMR1(R2g); addToMMR1(R2g);
int16_t divider = R2g.value.value(); int16_t divider = R2g.value.value();
int32_t R0R1 = (uint32_t(getRegister(reg)) << 16) | getRegister(reg | 1); int32_t R0R1 = (uint32_t(get_register(reg)) << 16) | get_register(reg | 1);
if (divider == 0) { // divide by zero if (divider == 0) { // divide by zero
setPSW_n(false); setPSW_n(false);
@ -829,8 +829,8 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
return true; return true;
} }
setRegister(reg, quot); set_register(reg, quot);
setRegister(reg | 1, rem); set_register(reg | 1, rem);
setPSW_v(false); setPSW_v(false);
@ -838,7 +838,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
} }
case 2: { // ASH case 2: { // ASH
uint32_t R = getRegister(reg), oldR = R; uint32_t R = get_register(reg), oldR = R;
auto g_dst = getGAM(dst_mode, dst_reg, wm_word); auto g_dst = getGAM(dst_mode, dst_reg, wm_word);
addToMMR1(g_dst); addToMMR1(g_dst);
@ -886,13 +886,13 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
setPSW_n(SIGN(R, wm_word)); setPSW_n(SIGN(R, wm_word));
setPSW_z(R == 0); setPSW_z(R == 0);
setRegister(reg, R); set_register(reg, R);
return true; return true;
} }
case 3: { // ASHC case 3: { // ASHC
uint32_t R0R1 = (uint32_t(getRegister(reg)) << 16) | getRegister(reg | 1); uint32_t R0R1 = (uint32_t(get_register(reg)) << 16) | get_register(reg | 1);
auto g_dst = getGAM(dst_mode, dst_reg, wm_word); auto g_dst = getGAM(dst_mode, dst_reg, wm_word);
addToMMR1(g_dst); addToMMR1(g_dst);
@ -939,8 +939,8 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
bool new_sign = R0R1 & 0x80000000; bool new_sign = R0R1 & 0x80000000;
setPSW_v(sign != new_sign); setPSW_v(sign != new_sign);
setRegister(reg, R0R1 >> 16); set_register(reg, R0R1 >> 16);
setRegister(reg | 1, R0R1 & 65535); set_register(reg | 1, R0R1 & 65535);
setPSW_n(R0R1 & 0x80000000); setPSW_n(R0R1 & 0x80000000);
setPSW_z(R0R1 == 0); setPSW_z(R0R1 == 0);
@ -949,7 +949,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
} }
case 4: { // XOR (word only) case 4: { // XOR (word only)
uint16_t reg_v = getRegister(reg); // in case it is R7 uint16_t reg_v = get_register(reg); // in case it is R7
auto g_dst = getGAM(dst_mode, dst_reg, wm_word); auto g_dst = getGAM(dst_mode, dst_reg, wm_word);
addToMMR1(g_dst); addToMMR1(g_dst);
uint16_t vl = g_dst.value.value() ^ reg_v; uint16_t vl = g_dst.value.value() ^ reg_v;
@ -1010,9 +1010,9 @@ bool cpu::single_operand_instructions(const uint16_t instr)
bool set_flags = false; bool set_flags = false;
if (word_mode == wm_byte && dst_mode == 0) { if (word_mode == wm_byte && dst_mode == 0) {
uint16_t v = getRegister(dst_reg) & 0xff00; uint16_t v = get_register(dst_reg) & 0xff00;
setRegister(dst_reg, v); set_register(dst_reg, v);
set_flags = true; set_flags = true;
} }
@ -1038,9 +1038,9 @@ bool cpu::single_operand_instructions(const uint16_t instr)
uint16_t v = 0; uint16_t v = 0;
if (word_mode == wm_byte && dst_mode == 0) { if (word_mode == wm_byte && dst_mode == 0) {
v = getRegister(dst_reg) ^ 0xff; v = get_register(dst_reg) ^ 0xff;
setRegister(dst_reg, v); set_register(dst_reg, v);
set_flags = true; set_flags = true;
} }
@ -1067,7 +1067,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
case 0b000101010: { // INC/INCB case 0b000101010: { // INC/INCB
if (dst_mode == 0) { if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg); uint16_t v = get_register(dst_reg);
uint16_t add = word_mode == wm_byte ? v & 0xff00 : 0; uint16_t add = word_mode == wm_byte ? v & 0xff00 : 0;
v = (v + 1) & (word_mode == wm_byte ? 0xff : 0xffff); v = (v + 1) & (word_mode == wm_byte ? 0xff : 0xffff);
@ -1077,7 +1077,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
setPSW_z(IS_0(v, word_mode)); setPSW_z(IS_0(v, word_mode));
setPSW_v(word_mode == wm_byte ? (v & 0xff) == 0x80 : v == 0x8000); setPSW_v(word_mode == wm_byte ? (v & 0xff) == 0x80 : v == 0x8000);
setRegister(dst_reg, v); set_register(dst_reg, v);
} }
else { else {
auto a = getGAM(dst_mode, dst_reg, word_mode); auto a = getGAM(dst_mode, dst_reg, word_mode);
@ -1099,7 +1099,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
case 0b000101011: { // DEC/DECB case 0b000101011: { // DEC/DECB
// TODO unify // TODO unify
if (dst_mode == 0) { if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg); uint16_t v = get_register(dst_reg);
uint16_t add = word_mode == wm_byte ? v & 0xff00 : 0; uint16_t add = word_mode == wm_byte ? v & 0xff00 : 0;
v = (v - 1) & (word_mode == wm_byte ? 0xff : 0xffff); v = (v - 1) & (word_mode == wm_byte ? 0xff : 0xffff);
@ -1109,7 +1109,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
setPSW_z(IS_0(v, word_mode)); setPSW_z(IS_0(v, word_mode));
setPSW_v(word_mode == wm_byte ? (v & 0xff) == 0x7f : v == 0x7fff); setPSW_v(word_mode == wm_byte ? (v & 0xff) == 0x7f : v == 0x7fff);
setRegister(dst_reg, v); set_register(dst_reg, v);
} }
else { else {
auto a = getGAM(dst_mode, dst_reg, word_mode); auto a = getGAM(dst_mode, dst_reg, word_mode);
@ -1130,7 +1130,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
case 0b000101100: { // NEG/NEGB case 0b000101100: { // NEG/NEGB
if (dst_mode == 0) { if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg); uint16_t v = get_register(dst_reg);
uint16_t add = word_mode == wm_byte ? v & 0xff00 : 0; uint16_t add = word_mode == wm_byte ? v & 0xff00 : 0;
v = (-v) & (word_mode == wm_byte ? 0xff : 0xffff); v = (-v) & (word_mode == wm_byte ? 0xff : 0xffff);
@ -1141,7 +1141,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
setPSW_v(word_mode == wm_byte ? (v & 0xff) == 0x80 : v == 0x8000); setPSW_v(word_mode == wm_byte ? (v & 0xff) == 0x80 : v == 0x8000);
setPSW_c(v); setPSW_c(v);
setRegister(dst_reg, v); set_register(dst_reg, v);
} }
else { else {
auto a = getGAM(dst_mode, dst_reg, word_mode); auto a = getGAM(dst_mode, dst_reg, word_mode);
@ -1163,7 +1163,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
case 0b000101101: { // ADC/ADCB case 0b000101101: { // ADC/ADCB
if (dst_mode == 0) { if (dst_mode == 0) {
const uint16_t vo = getRegister(dst_reg); const uint16_t vo = get_register(dst_reg);
uint16_t v = vo; uint16_t v = vo;
uint16_t add = word_mode == wm_byte ? v & 0xff00 : 0; uint16_t add = word_mode == wm_byte ? v & 0xff00 : 0;
bool org_c = getPSW_c(); bool org_c = getPSW_c();
@ -1176,7 +1176,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
setPSW_v((word_mode == wm_byte ? (vo & 0xff) == 0x7f : vo == 0x7fff) && org_c); setPSW_v((word_mode == wm_byte ? (vo & 0xff) == 0x7f : vo == 0x7fff) && org_c);
setPSW_c((word_mode == wm_byte ? (vo & 0xff) == 0xff : vo == 0xffff) && org_c); setPSW_c((word_mode == wm_byte ? (vo & 0xff) == 0xff : vo == 0xffff) && org_c);
setRegister(dst_reg, v); set_register(dst_reg, v);
} }
else { else {
auto a = getGAM(dst_mode, dst_reg, word_mode); auto a = getGAM(dst_mode, dst_reg, word_mode);
@ -1200,7 +1200,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
case 0b000101110: { // SBC/SBCB case 0b000101110: { // SBC/SBCB
if (dst_mode == 0) { if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg); uint16_t v = get_register(dst_reg);
const uint16_t vo = v; const uint16_t vo = v;
uint16_t add = word_mode == wm_byte ? v & 0xff00 : 0; uint16_t add = word_mode == wm_byte ? v & 0xff00 : 0;
bool org_c = getPSW_c(); bool org_c = getPSW_c();
@ -1213,7 +1213,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
setPSW_v((word_mode == wm_byte ? (vo & 0xff) == 0x80 : vo == 0x8000) && org_c); setPSW_v((word_mode == wm_byte ? (vo & 0xff) == 0x80 : vo == 0x8000) && org_c);
setPSW_c(IS_0(vo, word_mode) && org_c); setPSW_c(IS_0(vo, word_mode) && org_c);
setRegister(dst_reg, v); set_register(dst_reg, v);
} }
else { else {
auto a = getGAM(dst_mode, dst_reg, word_mode); auto a = getGAM(dst_mode, dst_reg, word_mode);
@ -1247,7 +1247,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
case 0b000110000: { // ROR/RORB case 0b000110000: { // ROR/RORB
if (dst_mode == 0) { if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg); uint16_t v = get_register(dst_reg);
bool new_carry = v & 1; bool new_carry = v & 1;
uint16_t temp = 0; uint16_t temp = 0;
@ -1256,7 +1256,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
else else
temp = (v >> 1) | (getPSW_c() << 15); temp = (v >> 1) | (getPSW_c() << 15);
setRegister(dst_reg, temp); set_register(dst_reg, temp);
setPSW_c(new_carry); setPSW_c(new_carry);
setPSW_n(SIGN(temp, word_mode)); setPSW_n(SIGN(temp, word_mode));
@ -1289,7 +1289,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
case 0b000110001: { // ROL/ROLB case 0b000110001: { // ROL/ROLB
if (dst_mode == 0) { if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg); uint16_t v = get_register(dst_reg);
bool new_carry = false; bool new_carry = false;
uint16_t temp = 0; uint16_t temp = 0;
@ -1302,7 +1302,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
temp = (v << 1) | getPSW_c(); temp = (v << 1) | getPSW_c();
} }
setRegister(dst_reg, temp); set_register(dst_reg, temp);
setPSW_c(new_carry); setPSW_c(new_carry);
setPSW_n(SIGN(temp, word_mode)); setPSW_n(SIGN(temp, word_mode));
@ -1339,7 +1339,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
case 0b000110010: { // ASR/ASRB case 0b000110010: { // ASR/ASRB
if (dst_mode == 0) { if (dst_mode == 0) {
uint16_t v = getRegister(dst_reg); uint16_t v = get_register(dst_reg);
uint16_t hb = word_mode == wm_byte ? v & 128 : v & 32768; uint16_t hb = word_mode == wm_byte ? v & 128 : v & 32768;
setPSW_c(v & 1); setPSW_c(v & 1);
@ -1350,7 +1350,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
v >>= 1; v >>= 1;
v |= hb; v |= hb;
setRegister(dst_reg, v); set_register(dst_reg, v);
setPSW_n(SIGN(v, word_mode)); setPSW_n(SIGN(v, word_mode));
setPSW_z(IS_0(v, word_mode)); setPSW_z(IS_0(v, word_mode));
@ -1384,7 +1384,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
case 0b00110011: { // ASL/ASLB case 0b00110011: { // ASL/ASLB
if (dst_mode == 0) { if (dst_mode == 0) {
uint16_t vl = getRegister(dst_reg); uint16_t vl = get_register(dst_reg);
uint16_t v = ((vl << 1) & (word_mode == wm_byte ? 0xff : 0xffff)); uint16_t v = ((vl << 1) & (word_mode == wm_byte ? 0xff : 0xffff));
if (word_mode == wm_byte) if (word_mode == wm_byte)
@ -1395,7 +1395,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
setPSW_c(SIGN(vl, word_mode)); setPSW_c(SIGN(vl, word_mode));
setPSW_v(getPSW_n() ^ getPSW_c()); setPSW_v(getPSW_n() ^ getPSW_c());
setRegister(dst_reg, v); set_register(dst_reg, v);
} }
else { else {
auto a = getGAM(dst_mode, dst_reg, word_mode); auto a = getGAM(dst_mode, dst_reg, word_mode);
@ -1420,7 +1420,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
uint16_t v = 0xffff; uint16_t v = 0xffff;
if (dst_mode == 0) if (dst_mode == 0)
v = getRegister(dst_reg, rm_prev); v = get_register(dst_reg, rm_prev);
else { else {
// calculate address in current address space // calculate address in current address space
auto a = getGAMAddress(dst_mode, dst_reg, wm_word); auto a = getGAMAddress(dst_mode, dst_reg, wm_word);
@ -1445,7 +1445,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
bool set_flags = true; bool set_flags = true;
if (dst_mode == 0) if (dst_mode == 0)
setRegister(dst_reg, v, rm_prev); set_register(dst_reg, v, rm_prev);
else { else {
auto a = getGAMAddress(dst_mode, dst_reg, wm_word); auto a = getGAMAddress(dst_mode, dst_reg, wm_word);
addToMMR1(a); addToMMR1(a);
@ -1473,11 +1473,11 @@ bool cpu::single_operand_instructions(const uint16_t instr)
#endif #endif
} }
else { else {
setRegister(6, getPC() + dst * 2); set_register(6, getPC() + dst * 2);
setPC(getRegister(5)); setPC(get_register(5));
setRegister(5, popStack()); set_register(5, popStack());
} }
break; break;
@ -1643,7 +1643,7 @@ bool cpu::condition_code_operations(const uint16_t instr)
void cpu::pushStack(const uint16_t v) void cpu::pushStack(const uint16_t v)
{ {
if (getRegister(6) == stackLimitRegister) { if (get_register(6) == stackLimitRegister) {
TRACE("stackLimitRegister reached %06o while pushing %06o", stackLimitRegister, v); TRACE("stackLimitRegister reached %06o while pushing %06o", stackLimitRegister, v);
trap(04, 7); trap(04, 7);
@ -1657,7 +1657,7 @@ void cpu::pushStack(const uint16_t v)
uint16_t cpu::popStack() uint16_t cpu::popStack()
{ {
uint16_t a = getRegister(6); uint16_t a = get_register(6);
uint16_t temp = b->read_word(a, d_space); uint16_t temp = b->read_word(a, d_space);
addRegister(6, rm_cur, 2); addRegister(6, rm_cur, 2);
@ -1721,7 +1721,7 @@ bool cpu::misc_operations(const uint16_t instr)
return true; return true;
case 0b0000000000000111: // MFPT case 0b0000000000000111: // MFPT
//setRegister(0, 0); //set_register(0, 0);
trap(010); // does not exist on PDP-11/70 trap(010); // does not exist on PDP-11/70
return true; return true;
@ -1774,7 +1774,7 @@ bool cpu::misc_operations(const uint16_t instr)
int link_reg = (instr >> 6) & 7; int link_reg = (instr >> 6) & 7;
// PUSH link // PUSH link
pushStack(getRegister(link_reg)); pushStack(get_register(link_reg));
if (!b->getMMU()->isMMR1Locked()) { if (!b->getMMU()->isMMR1Locked()) {
b->getMMU()->addToMMR1(-2, 6); b->getMMU()->addToMMR1(-2, 6);
@ -1782,7 +1782,7 @@ bool cpu::misc_operations(const uint16_t instr)
} }
// MOVE PC,link // MOVE PC,link
setRegister(link_reg, getPC()); set_register(link_reg, getPC());
// JMP dst // JMP dst
setPC(dst_value); setPC(dst_value);
@ -1797,12 +1797,12 @@ bool cpu::misc_operations(const uint16_t instr)
const int link_reg = instr & 7; const int link_reg = instr & 7;
// MOVE link, PC // MOVE link, PC
setPC(getRegister(link_reg)); setPC(get_register(link_reg));
// POP link // POP link
uint16_t word_on_stack = b->read_word(getRegister(6), d_space); uint16_t word_on_stack = b->read_word(get_register(6), d_space);
setRegister(link_reg, word_on_stack); set_register(link_reg, word_on_stack);
// do not overwrite SP when it was just set // do not overwrite SP when it was just set
if (link_reg != 6) if (link_reg != 6)
@ -1841,7 +1841,7 @@ void cpu::trap(uint16_t vector, const int new_ipl, const bool is_interrupt)
if (kernel_mode) if (kernel_mode)
vector = 4; vector = 4;
setRegister(6, 04); set_register(6, 04);
} }
else { else {
b->getMMU()->clearMMR1(); b->getMMU()->clearMMR1();
@ -1869,16 +1869,16 @@ void cpu::trap(uint16_t vector, const int new_ipl, const bool is_interrupt)
setPSW(new_psw, false); setPSW(new_psw, false);
if (processing_trap_depth >= 2 && kernel_mode) if (processing_trap_depth >= 2 && kernel_mode)
setRegister(6, 04); set_register(6, 04);
uint16_t prev_sp = getRegister(6); uint16_t prev_sp = get_register(6);
try { try {
pushStack(before_psw); pushStack(before_psw);
pushStack(before_pc); pushStack(before_pc);
} }
catch(const int exception) { catch(const int exception) {
// recover stack // recover stack
setRegister(6, prev_sp); set_register(6, prev_sp);
} }
processing_trap_depth = 0; processing_trap_depth = 0;
@ -1915,40 +1915,40 @@ cpu::operand_parameters cpu::addressing_to_string(const uint8_t mode_register, c
switch(mode_register >> 3) { switch(mode_register >> 3) {
case 0: case 0:
return { reg_name, 2, -1, uint16_t(getRegister(reg) & mask) }; return { reg_name, 2, -1, uint16_t(get_register(reg) & mask) };
case 1: case 1:
return { format("(%s)", reg_name.c_str()), 2, -1, uint16_t(b->peek_word(run_mode, getRegister(reg)) & mask) }; return { format("(%s)", reg_name.c_str()), 2, -1, uint16_t(b->peek_word(run_mode, get_register(reg)) & mask) };
case 2: case 2:
if (reg == 7) if (reg == 7)
return { format("#%06o", next_word), 4, int(next_word), uint16_t(next_word & mask) }; return { format("#%06o", next_word), 4, int(next_word), uint16_t(next_word & mask) };
return { format("(%s)+", reg_name.c_str()), 2, -1, uint16_t(b->peek_word(run_mode, getRegister(reg)) & mask) }; return { format("(%s)+", reg_name.c_str()), 2, -1, uint16_t(b->peek_word(run_mode, get_register(reg)) & mask) };
case 3: case 3:
if (reg == 7) if (reg == 7)
return { format("@#%06o", next_word), 4, int(next_word), uint16_t(b->peek_word(run_mode, next_word) & mask) }; return { format("@#%06o", next_word), 4, int(next_word), uint16_t(b->peek_word(run_mode, next_word) & mask) };
return { format("@(%s)+", reg_name.c_str()), 2, -1, uint16_t(b->peek_word(run_mode, b->peek_word(run_mode, getRegister(reg))) & mask) }; return { format("@(%s)+", reg_name.c_str()), 2, -1, uint16_t(b->peek_word(run_mode, b->peek_word(run_mode, get_register(reg))) & mask) };
case 4: case 4:
return { format("-(%s)", reg_name.c_str()), 2, -1, uint16_t(b->peek_word(run_mode, getRegister(reg) - (word_mode == wm_word || reg >= 6 ? 2 : 1)) & mask) }; return { format("-(%s)", reg_name.c_str()), 2, -1, uint16_t(b->peek_word(run_mode, get_register(reg) - (word_mode == wm_word || reg >= 6 ? 2 : 1)) & mask) };
case 5: case 5:
return { format("@-(%s)", reg_name.c_str()), 2, -1, uint16_t(b->peek_word(run_mode, b->peek_word(run_mode, getRegister(reg) - 2)) & mask) }; return { format("@-(%s)", reg_name.c_str()), 2, -1, uint16_t(b->peek_word(run_mode, b->peek_word(run_mode, get_register(reg) - 2)) & mask) };
case 6: case 6:
if (reg == 7) if (reg == 7)
return { format("%06o", (pc + next_word + 2) & 65535), 4, int(next_word), uint16_t(b->peek_word(run_mode, getRegister(reg) + next_word) & mask) }; return { format("%06o", (pc + next_word + 2) & 65535), 4, int(next_word), uint16_t(b->peek_word(run_mode, get_register(reg) + next_word) & mask) };
return { format("%o(%s)", next_word, reg_name.c_str()), 4, int(next_word), uint16_t(b->peek_word(run_mode, getRegister(reg) + next_word) & mask) }; return { format("%o(%s)", next_word, reg_name.c_str()), 4, int(next_word), uint16_t(b->peek_word(run_mode, get_register(reg) + next_word) & mask) };
case 7: case 7:
if (reg == 7) if (reg == 7)
return { format("@%06o", next_word), 4, int(next_word), uint16_t(b->peek_word(run_mode, b->peek_word(run_mode, getRegister(reg) + next_word)) & mask) }; return { format("@%06o", next_word), 4, int(next_word), uint16_t(b->peek_word(run_mode, b->peek_word(run_mode, get_register(reg) + next_word)) & mask) };
return { format("@%o(%s)", next_word, reg_name.c_str()), 4, int(next_word), uint16_t(b->peek_word(run_mode, b->peek_word(run_mode, getRegister(reg) + next_word)) & mask) }; return { format("@%o(%s)", next_word, reg_name.c_str()), 4, int(next_word), uint16_t(b->peek_word(run_mode, b->peek_word(run_mode, get_register(reg) + next_word)) & mask) };
} }
return { "??", 0, -1, 0123456 }; return { "??", 0, -1, 0123456 };
@ -2352,7 +2352,7 @@ std::map<std::string, std::vector<std::string> > cpu::disassemble(const uint16_t
for(int i=0; i<8; i++) { for(int i=0; i<8; i++) {
if (i < 6) if (i < 6)
registers.push_back(format("%06o", getRegister(i))); registers.push_back(format("%06o", get_register(i)));
else if (i == 6) else if (i == 6)
registers.push_back(format("%06o", sp[psw >> 14])); registers.push_back(format("%06o", sp[psw >> 14]));
else else

6
cpu.h
View file

@ -181,8 +181,8 @@ public:
uint16_t getStackPointer(const int which) const { assert(which >= 0 && which < 4); return sp[which]; } uint16_t getStackPointer(const int which) const { assert(which >= 0 && which < 4); return sp[which]; }
uint16_t getPC() const { return pc; } uint16_t getPC() const { return pc; }
void setRegister(const int nr, const uint16_t value, const rm_selection_t mode_selection = rm_cur); void set_register(const int nr, const uint16_t value, const rm_selection_t mode_selection = rm_cur);
void setRegisterLowByte(const int nr, const word_mode_t word_mode, const uint16_t value); void set_registerLowByte(const int nr, const word_mode_t word_mode, const uint16_t value);
// used by 'main' for json-validation // used by 'main' for json-validation
void lowlevel_register_set(const uint8_t set, const uint8_t reg, const uint16_t value); void lowlevel_register_set(const uint8_t set, const uint8_t reg, const uint16_t value);
void lowlevel_register_sp_set(const uint8_t set, const uint16_t value); void lowlevel_register_sp_set(const uint8_t set, const uint16_t value);
@ -193,7 +193,7 @@ public:
void setStackPointer(const int which, const uint16_t value) { assert(which >= 0 && which < 4); sp[which] = value; } void setStackPointer(const int which, const uint16_t value) { assert(which >= 0 && which < 4); sp[which] = value; }
void setPC(const uint16_t value) { pc = value; } void setPC(const uint16_t value) { pc = value; }
uint16_t getRegister(const int nr, const rm_selection_t mode_selection = rm_cur) const; uint16_t get_register(const int nr, const rm_selection_t mode_selection = rm_cur) const;
bool put_result(const gam_rc_t & g, const uint16_t value); bool put_result(const gam_rc_t & g, const uint16_t value);
}; };

2
debugger.cpp
View file

@ -1310,7 +1310,7 @@ void run_bic(console *const cnsl, bus *const b, std::atomic_uint32_t *const stop
{ {
cpu *const c = b->getCpu(); cpu *const c = b->getCpu();
c->setRegister(7, start_addr); c->set_register(7, start_addr);
*cnsl->get_running_flag() = true; *cnsl->get_running_flag() = true;

4
loaders.cpp
View file

@ -156,7 +156,7 @@ void set_boot_loader(bus *const b, const bootloader_t which)
for(uint16_t i=0; i<size; i++) for(uint16_t i=0; i<size; i++)
b->write_word(uint16_t(offset + i * 2), bl[i]); b->write_word(uint16_t(offset + i * 2), bl[i]);
c->setRegister(7, start); c->set_register(7, start);
} }
std::optional<uint16_t> load_tape(bus *const b, const std::string & file) std::optional<uint16_t> load_tape(bus *const b, const std::string & file)
@ -291,5 +291,5 @@ void load_p11_x11(bus *const b, const std::string & file)
fclose(fh); fclose(fh);
cpu *const c = b->getCpu(); cpu *const c = b->getCpu();
c->setRegister(7, 0); c->set_register(7, 0);
} }

6
main.cpp
View file

@ -633,13 +633,13 @@ int main(int argc, char *argv[])
if (bic_start.has_value() == false) if (bic_start.has_value() == false)
return 1; // fail return 1; // fail
b->getCpu()->setRegister(7, bic_start.value()); b->getCpu()->set_register(7, bic_start.value());
} }
if (sa_set) if (sa_set)
b->getCpu()->setRegister(7, start_addr); b->getCpu()->set_register(7, start_addr);
DOLOG(info, true, "Start running at %06o", b->getCpu()->getRegister(7)); DOLOG(info, true, "Start running at %06o", b->getCpu()->get_register(7));
#if !defined(_WIN32) #if !defined(_WIN32)
struct sigaction sa { }; struct sigaction sa { };