streamlined get/set_Register
This commit is contained in:
parent
1a26532218
commit
c20b9554d8
6 changed files with 81 additions and 2159 deletions
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@ -23,7 +23,6 @@ add_executable(
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rk05.cpp
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rk05.cpp
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rl02.cpp
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rl02.cpp
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terminal.cpp
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terminal.cpp
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tests.cpp
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tm-11.cpp
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tm-11.cpp
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tty.cpp
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tty.cpp
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utils.cpp
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utils.cpp
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12
bus.cpp
12
bus.cpp
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@ -187,11 +187,11 @@ uint16_t bus::read(const uint16_t a, const bool word_mode, const bool use_prev,
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if (a >= 0177700 && a <= 0177705) { // kernel R0-R5
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if (a >= 0177700 && a <= 0177705) { // kernel R0-R5
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DOLOG(debug, !peek_only, "readb kernel R%d", a - 0177700);
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DOLOG(debug, !peek_only, "readb kernel R%d", a - 0177700);
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return c -> getRegister(false, a - 0177700) & 0xff;
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return c -> getRegister(a - 0177700, 0, false) & 0xff;
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}
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}
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if (a >= 0177710 && a <= 0177715) { // user R0-R5
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if (a >= 0177710 && a <= 0177715) { // user R0-R5
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DOLOG(debug, !peek_only, "readb user R%d", a - 0177710);
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DOLOG(debug, !peek_only, "readb user R%d", a - 0177710);
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return c -> getRegister(true, a - 0177710) & 0xff;
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return c -> getRegister(a - 0177710, 3, false) & 0xff;
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}
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}
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if (a == 0177706) { // kernel SP
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if (a == 0177706) { // kernel SP
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DOLOG(debug, !peek_only, "readb kernel sp");
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DOLOG(debug, !peek_only, "readb kernel sp");
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@ -247,11 +247,11 @@ uint16_t bus::read(const uint16_t a, const bool word_mode, const bool use_prev,
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if (a >= 0177700 && a <= 0177705) { // kernel R0-R5
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if (a >= 0177700 && a <= 0177705) { // kernel R0-R5
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DOLOG(debug, !peek_only, "read kernel R%d", a - 0177700);
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DOLOG(debug, !peek_only, "read kernel R%d", a - 0177700);
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return c -> getRegister(false, a - 0177700);
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return c -> getRegister(a - 0177700, 0, false);
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}
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}
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if (a >= 0177710 && a <= 0177715) { // user R0-R5
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if (a >= 0177710 && a <= 0177715) { // user R0-R5
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DOLOG(debug, !peek_only, "read user R%d", a - 0177710);
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DOLOG(debug, !peek_only, "read user R%d", a - 0177710);
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return c -> getRegister(true, a - 0177710);
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return c -> getRegister(a - 0177710, 3, false);
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}
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}
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if (a == 0177706) { // kernel SP
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if (a == 0177706) { // kernel SP
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DOLOG(debug, !peek_only, "read kernel sp");
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DOLOG(debug, !peek_only, "read kernel sp");
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@ -472,12 +472,12 @@ uint16_t bus::write(const uint16_t a, const bool word_mode, uint16_t value, cons
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if (a >= 0177700 && a <= 0177705) { // kernel R0-R5
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if (a >= 0177700 && a <= 0177705) { // kernel R0-R5
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DOLOG(debug, true, "write kernel R%d: %o", a - 01777700, value);
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DOLOG(debug, true, "write kernel R%d: %o", a - 01777700, value);
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c -> setRegister(false, a - 0177700, value);
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c -> setRegister(a - 0177700, false, false, value);
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return value;
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return value;
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}
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}
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if (a >= 0177710 && a <= 0177715) { // user R0-R5
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if (a >= 0177710 && a <= 0177715) { // user R0-R5
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DOLOG(debug, true, "write user R%d: %o", a - 01777710, value);
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DOLOG(debug, true, "write user R%d: %o", a - 01777710, value);
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c -> setRegister(true, a - 0177710, value);
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c -> setRegister(a - 0177710, true, false, value);
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return value;
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return value;
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}
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}
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if (a == 0177706) { // kernel SP
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if (a == 0177706) { // kernel SP
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115
cpu.cpp
115
cpu.cpp
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@ -92,13 +92,13 @@ void cpu::reset()
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init_interrupt_queue();
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init_interrupt_queue();
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}
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}
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uint16_t cpu::getRegister(const int nr, const bool prev_mode) const
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uint16_t cpu::getRegister(const int nr, const int mode, const bool sp_prev_mode) const
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{
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{
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if (nr < 6)
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if (nr < 6)
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return regs0_5[getBitPSW(11)][nr];
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return regs0_5[mode][nr];
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if (nr == 6) {
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if (nr == 6) {
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if (prev_mode)
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if (sp_prev_mode)
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return sp[(getPSW() >> 12) & 3];
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return sp[(getPSW() >> 12) & 3];
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return sp[getPSW() >> 14];
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return sp[getPSW() >> 14];
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@ -107,10 +107,21 @@ uint16_t cpu::getRegister(const int nr, const bool prev_mode) const
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return pc;
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return pc;
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}
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}
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void cpu::setRegister(const int nr, const bool prev_mode, const uint16_t value)
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uint16_t cpu::getRegister(const int nr) const
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{
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{
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if (nr < 6)
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if (nr < 6)
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regs0_5[getBitPSW(11)][nr] = value;
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return regs0_5[getBitPSW(11)][nr];
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if (nr == 6)
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return sp[getPSW() >> 14];
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return pc;
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}
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void cpu::setRegister(const int nr, const bool set, const bool prev_mode, const uint16_t value)
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{
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if (nr < 6)
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regs0_5[set][nr] = value;
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else if (nr == 6) {
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else if (nr == 6) {
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if (prev_mode)
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if (prev_mode)
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sp[(getPSW() >> 12) & 3] = value;
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sp[(getPSW() >> 12) & 3] = value;
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@ -125,17 +136,17 @@ void cpu::setRegister(const int nr, const bool prev_mode, const uint16_t value)
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void cpu::setRegisterLowByte(const int nr, const bool word_mode, const uint16_t value) // prev_mode == false
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void cpu::setRegisterLowByte(const int nr, const bool word_mode, const uint16_t value) // prev_mode == false
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{
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{
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if (word_mode) {
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if (word_mode) {
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uint16_t v = getRegister(nr, false);
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uint16_t v = getRegister(nr);
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v &= 0xff00;
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v &= 0xff00;
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assert(value < 256);
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assert(value < 256);
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v |= value;
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v |= value;
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setRegister(nr, false, v);
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setRegister(nr, v);
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}
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}
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else {
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else {
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setRegister(nr, false, value);
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setRegister(nr, value);
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}
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}
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}
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}
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@ -303,36 +314,39 @@ void cpu::addToMMR1(const uint8_t mode, const uint8_t reg, const bool word_mode)
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// GAM = general addressing modes
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// GAM = general addressing modes
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uint16_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode, const bool prev_mode)
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uint16_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode, const bool prev_mode)
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{
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{
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uint16_t next_word = 0, temp = 0;
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uint16_t next_word = 0;
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uint16_t temp = 0;
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int set = getBitPSW(11);
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switch(mode) {
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switch(mode) {
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case 0: // 000
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case 0: // 000
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return getRegister(reg, prev_mode) & (word_mode ? 0xff : 0xffff);
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return getRegister(reg, set, prev_mode) & (word_mode ? 0xff : 0xffff);
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case 1:
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case 1:
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return b -> read(getRegister(reg, prev_mode), word_mode, prev_mode);
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return b -> read(getRegister(reg, set, prev_mode), word_mode, prev_mode);
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case 2:
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case 2:
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temp = b -> read(getRegister(reg, prev_mode), word_mode, prev_mode);
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temp = b -> read(getRegister(reg, set, prev_mode), word_mode, prev_mode);
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? 2 : 1);
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? 2 : 1);
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return temp;
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return temp;
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case 3:
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case 3:
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temp = b -> read(b -> read(getRegister(reg, prev_mode), false, prev_mode), word_mode, prev_mode);
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temp = b -> read(b -> read(getRegister(reg, set, prev_mode), false, prev_mode), word_mode, prev_mode);
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addRegister(reg, prev_mode, 2);
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addRegister(reg, prev_mode, 2);
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return temp;
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return temp;
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case 4:
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case 4:
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? -2 : -1);
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? -2 : -1);
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return b -> read(getRegister(reg, prev_mode), word_mode, prev_mode);
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return b -> read(getRegister(reg, set, prev_mode), word_mode, prev_mode);
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case 5:
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case 5:
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addRegister(reg, prev_mode, -2);
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addRegister(reg, prev_mode, -2);
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return b -> read(b -> read(getRegister(reg, prev_mode), false, prev_mode), word_mode, prev_mode);
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return b -> read(b -> read(getRegister(reg, set, prev_mode), false, prev_mode), word_mode, prev_mode);
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case 6:
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case 6:
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next_word = b -> read(getPC(), false, prev_mode);
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next_word = b -> read(getPC(), false, prev_mode);
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addRegister(7, prev_mode, + 2);
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addRegister(7, prev_mode, + 2);
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temp = b -> read(getRegister(reg, prev_mode) + next_word, word_mode, prev_mode);
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temp = b -> read(getRegister(reg, set, prev_mode) + next_word, word_mode, prev_mode);
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return temp;
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return temp;
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case 7:
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case 7:
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next_word = b -> read(getPC(), false, prev_mode);
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next_word = b -> read(getPC(), false, prev_mode);
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addRegister(7, prev_mode, + 2);
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addRegister(7, prev_mode, + 2);
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return b -> read(b -> read(getRegister(reg, prev_mode) + next_word, false, prev_mode), word_mode, prev_mode);
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return b -> read(b -> read(getRegister(reg, set, prev_mode) + next_word, false, prev_mode), word_mode, prev_mode);
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}
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}
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return -1;
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return -1;
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@ -343,43 +357,45 @@ bool cpu::putGAM(const uint8_t mode, const int reg, const bool word_mode, const
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uint16_t next_word = 0;
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uint16_t next_word = 0;
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int addr = -1;
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int addr = -1;
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int set = getBitPSW(11);
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switch(mode) {
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switch(mode) {
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case 0:
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case 0:
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setRegister(reg, prev_mode, value);
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setRegister(reg, prev_mode, value);
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break;
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break;
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case 1:
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case 1:
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addr = getRegister(reg, prev_mode);
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addr = getRegister(reg, set, prev_mode);
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b -> write(addr, word_mode, value, false);
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b -> write(addr, word_mode, value, false);
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break;
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break;
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case 2:
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case 2:
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addr = getRegister(reg, prev_mode);
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addr = getRegister(reg, set, prev_mode);
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b -> write(addr, word_mode, value, false);
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b -> write(addr, word_mode, value, false);
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? 2 : 1);
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? 2 : 1);
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break;
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break;
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case 3:
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case 3:
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addr = b -> readWord(getRegister(reg, prev_mode));
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addr = b -> readWord(getRegister(reg, set, prev_mode));
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b -> write(addr, word_mode, value, false);
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b -> write(addr, word_mode, value, false);
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addRegister(reg, prev_mode, 2);
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addRegister(reg, prev_mode, 2);
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break;
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break;
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case 4:
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case 4:
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? -2 : -1);
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addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? -2 : -1);
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b -> write(getRegister(reg, prev_mode), word_mode, value, false);
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b -> write(getRegister(reg, set, prev_mode), word_mode, value, false);
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break;
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break;
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case 5:
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case 5:
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addRegister(reg, prev_mode, -2);
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addRegister(reg, prev_mode, -2);
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addr = b -> readWord(getRegister(reg, prev_mode));
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addr = b -> readWord(getRegister(reg, set, prev_mode));
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b -> write(addr, word_mode, value, false);
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b -> write(addr, word_mode, value, false);
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break;
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break;
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case 6:
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case 6:
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next_word = b -> readWord(getPC());
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next_word = b -> readWord(getPC());
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addRegister(7, prev_mode, 2);
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addRegister(7, prev_mode, 2);
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addr = (getRegister(reg, prev_mode) + next_word) & 0xffff;
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addr = (getRegister(reg, set, prev_mode) + next_word) & 0xffff;
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b -> write(addr, word_mode, value, false);
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b -> write(addr, word_mode, value, false);
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break;
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break;
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case 7:
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case 7:
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next_word = b -> readWord(getPC());
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next_word = b -> readWord(getPC());
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addRegister(7, prev_mode, 2);
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addRegister(7, prev_mode, 2);
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addr = b -> readWord(getRegister(reg, prev_mode) + next_word);
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addr = b -> readWord(getRegister(reg, set, prev_mode) + next_word);
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b -> write(addr, word_mode, value, false);
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b -> write(addr, word_mode, value, false);
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break;
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break;
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@ -393,36 +409,39 @@ bool cpu::putGAM(const uint8_t mode, const int reg, const bool word_mode, const
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uint16_t cpu::getGAMAddress(const uint8_t mode, const int reg, const bool word_mode, const bool prev_mode)
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uint16_t cpu::getGAMAddress(const uint8_t mode, const int reg, const bool word_mode, const bool prev_mode)
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{
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{
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uint16_t next_word = 0, temp = 0;
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uint16_t next_word = 0;
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uint16_t temp = 0;
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int set = getBitPSW(11);
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switch(mode) {
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switch(mode) {
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case 0:
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case 0:
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// registers are also mapped in memory
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// registers are also mapped in memory
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return 0177700 + reg;
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return 0177700 + reg;
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case 1:
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case 1:
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return getRegister(reg, prev_mode);
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return getRegister(reg, set, prev_mode);
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case 2:
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case 2:
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temp = getRegister(reg, prev_mode);
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temp = getRegister(reg, set, prev_mode);
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addRegister(reg, prev_mode, !word_mode || reg == 6 || reg == 7 ? 2 : 1);
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addRegister(reg, prev_mode, !word_mode || reg == 6 || reg == 7 ? 2 : 1);
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return temp;
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return temp;
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case 3:
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case 3:
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temp = b -> readWord(getRegister(reg, prev_mode));
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temp = b -> readWord(getRegister(reg, set, prev_mode));
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addRegister(reg, prev_mode, 2);
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addRegister(reg, prev_mode, 2);
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return temp;
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return temp;
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case 4:
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case 4:
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addRegister(reg, prev_mode, !word_mode || reg == 6 || reg == 7 ? -2 : -1);
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addRegister(reg, prev_mode, !word_mode || reg == 6 || reg == 7 ? -2 : -1);
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return getRegister(reg, prev_mode);
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return getRegister(reg, set, prev_mode);
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case 5:
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case 5:
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addRegister(reg, prev_mode, -2);
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addRegister(reg, prev_mode, -2);
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return b -> readWord(getRegister(reg, prev_mode));
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return b -> readWord(getRegister(reg, set, prev_mode));
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case 6:
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case 6:
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next_word = b -> readWord(getPC());
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next_word = b -> readWord(getPC());
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addRegister(7, prev_mode, 2);
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addRegister(7, prev_mode, 2);
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return getRegister(reg, prev_mode) + next_word;
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return getRegister(reg, set, prev_mode) + next_word;
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case 7:
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case 7:
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next_word = b -> readWord(getPC());
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next_word = b -> readWord(getPC());
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addRegister(7, prev_mode, 2);
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addRegister(7, prev_mode, 2);
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return b -> readWord(getRegister(reg, prev_mode) + next_word);
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return b -> readWord(getRegister(reg, set, prev_mode) + next_word);
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}
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}
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return -1;
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return -1;
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@ -755,7 +774,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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case 7: { // SOB
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case 7: { // SOB
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addRegister(reg, false, -1);
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addRegister(reg, false, -1);
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if (getRegister(reg, false)) {
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if (getRegister(reg)) {
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uint16_t newPC = getPC() - dst * 2;
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uint16_t newPC = getPC() - dst * 2;
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setPC(newPC);
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setPC(newPC);
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@ -785,7 +804,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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uint16_t v = 0;
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uint16_t v = 0;
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if (dst_mode == 0) {
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if (dst_mode == 0) {
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v = getRegister(dst_reg, false);
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v = getRegister(dst_reg);
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v = ((v & 0xff) << 8) | (v >> 8);
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v = ((v & 0xff) << 8) | (v >> 8);
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@ -843,7 +862,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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case 0b000101001: { // COM/COMB
|
case 0b000101001: { // COM/COMB
|
||||||
if (dst_mode == 0) {
|
if (dst_mode == 0) {
|
||||||
uint16_t v = getRegister(dst_reg, false);
|
uint16_t v = getRegister(dst_reg);
|
||||||
|
|
||||||
if (word_mode)
|
if (word_mode)
|
||||||
v ^= 0xff;
|
v ^= 0xff;
|
||||||
|
@ -882,7 +901,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
||||||
|
|
||||||
case 0b000101010: { // INC/INCB
|
case 0b000101010: { // INC/INCB
|
||||||
if (dst_mode == 0) {
|
if (dst_mode == 0) {
|
||||||
uint16_t v = getRegister(dst_reg, false);
|
uint16_t v = getRegister(dst_reg);
|
||||||
uint16_t add = word_mode ? v & 0xff00 : 0;
|
uint16_t add = word_mode ? v & 0xff00 : 0;
|
||||||
|
|
||||||
v = (v + 1) & (word_mode ? 0xff : 0xffff);
|
v = (v + 1) & (word_mode ? 0xff : 0xffff);
|
||||||
|
@ -915,7 +934,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
||||||
|
|
||||||
case 0b000101011: { // DEC/DECB
|
case 0b000101011: { // DEC/DECB
|
||||||
if (dst_mode == 0) {
|
if (dst_mode == 0) {
|
||||||
uint16_t v = getRegister(dst_reg, false);
|
uint16_t v = getRegister(dst_reg);
|
||||||
uint16_t add = word_mode ? v & 0xff00 : 0;
|
uint16_t add = word_mode ? v & 0xff00 : 0;
|
||||||
|
|
||||||
v = (v - 1) & (word_mode ? 0xff : 0xffff);
|
v = (v - 1) & (word_mode ? 0xff : 0xffff);
|
||||||
|
@ -948,7 +967,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
||||||
|
|
||||||
case 0b000101100: { // NEG/NEGB
|
case 0b000101100: { // NEG/NEGB
|
||||||
if (dst_mode == 0) {
|
if (dst_mode == 0) {
|
||||||
uint16_t v = getRegister(dst_reg, false);
|
uint16_t v = getRegister(dst_reg);
|
||||||
uint16_t add = word_mode ? v & 0xff00 : 0;
|
uint16_t add = word_mode ? v & 0xff00 : 0;
|
||||||
|
|
||||||
v = (-v) & (word_mode ? 0xff : 0xffff);
|
v = (-v) & (word_mode ? 0xff : 0xffff);
|
||||||
|
@ -982,7 +1001,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
||||||
|
|
||||||
case 0b000101101: { // ADC/ADCB
|
case 0b000101101: { // ADC/ADCB
|
||||||
if (dst_mode == 0) {
|
if (dst_mode == 0) {
|
||||||
const uint16_t vo = getRegister(dst_reg, false);
|
const uint16_t vo = getRegister(dst_reg);
|
||||||
uint16_t v = vo;
|
uint16_t v = vo;
|
||||||
uint16_t add = word_mode ? v & 0xff00 : 0;
|
uint16_t add = word_mode ? v & 0xff00 : 0;
|
||||||
bool org_c = getPSW_c();
|
bool org_c = getPSW_c();
|
||||||
|
@ -1020,7 +1039,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
||||||
|
|
||||||
case 0b000101110: { // SBC/SBCB
|
case 0b000101110: { // SBC/SBCB
|
||||||
if (dst_mode == 0) {
|
if (dst_mode == 0) {
|
||||||
uint16_t v = getRegister(dst_reg, false);
|
uint16_t v = getRegister(dst_reg);
|
||||||
const uint16_t vo = v;
|
const uint16_t vo = v;
|
||||||
uint16_t add = word_mode ? v & 0xff00 : 0;
|
uint16_t add = word_mode ? v & 0xff00 : 0;
|
||||||
bool org_c = getPSW_c();
|
bool org_c = getPSW_c();
|
||||||
|
@ -1070,7 +1089,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
||||||
|
|
||||||
case 0b000110000: { // ROR/RORB
|
case 0b000110000: { // ROR/RORB
|
||||||
if (dst_mode == 0) {
|
if (dst_mode == 0) {
|
||||||
uint16_t v = getRegister(dst_reg, false);
|
uint16_t v = getRegister(dst_reg);
|
||||||
bool new_carry = v & 1;
|
bool new_carry = v & 1;
|
||||||
|
|
||||||
uint16_t temp = 0;
|
uint16_t temp = 0;
|
||||||
|
@ -1117,7 +1136,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
||||||
|
|
||||||
case 0b000110001: { // ROL/ROLB
|
case 0b000110001: { // ROL/ROLB
|
||||||
if (dst_mode == 0) {
|
if (dst_mode == 0) {
|
||||||
uint16_t v = getRegister(dst_reg, false);
|
uint16_t v = getRegister(dst_reg);
|
||||||
bool new_carry = false;
|
bool new_carry = false;
|
||||||
|
|
||||||
uint16_t temp = 0;
|
uint16_t temp = 0;
|
||||||
|
@ -1168,7 +1187,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
||||||
|
|
||||||
case 0b000110010: { // ASR/ASRB
|
case 0b000110010: { // ASR/ASRB
|
||||||
if (dst_mode == 0) {
|
if (dst_mode == 0) {
|
||||||
uint16_t v = getRegister(dst_reg, false);
|
uint16_t v = getRegister(dst_reg);
|
||||||
|
|
||||||
bool hb = word_mode ? v & 128 : v & 32768;
|
bool hb = word_mode ? v & 128 : v & 32768;
|
||||||
|
|
||||||
|
@ -1226,7 +1245,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
||||||
|
|
||||||
case 0b00110011: { // ASL/ASLB
|
case 0b00110011: { // ASL/ASLB
|
||||||
if (dst_mode == 0) {
|
if (dst_mode == 0) {
|
||||||
uint16_t vl = getRegister(dst_reg, false);
|
uint16_t vl = getRegister(dst_reg);
|
||||||
uint16_t add = word_mode ? vl & 0xff00 : 0;
|
uint16_t add = word_mode ? vl & 0xff00 : 0;
|
||||||
|
|
||||||
uint16_t v = (vl << 1) & (word_mode ? 0xff : 0xffff);
|
uint16_t v = (vl << 1) & (word_mode ? 0xff : 0xffff);
|
||||||
|
@ -1269,7 +1288,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
||||||
uint16_t v = 0xffff;
|
uint16_t v = 0xffff;
|
||||||
|
|
||||||
if (dst_mode == 0)
|
if (dst_mode == 0)
|
||||||
v = getRegister(dst_reg, true);
|
v = getRegister(dst_reg, getBitPSW(11), true);
|
||||||
else {
|
else {
|
||||||
// calculate address in current address space
|
// calculate address in current address space
|
||||||
uint16_t a = getGAMAddress(dst_mode, dst_reg, false, false);
|
uint16_t a = getGAMAddress(dst_mode, dst_reg, false, false);
|
||||||
|
@ -1506,7 +1525,7 @@ void cpu::pushStack(const uint16_t v)
|
||||||
|
|
||||||
uint16_t cpu::popStack()
|
uint16_t cpu::popStack()
|
||||||
{
|
{
|
||||||
uint16_t a = getRegister(6, false);
|
uint16_t a = getRegister(6);
|
||||||
uint16_t temp = b -> readWord(a);
|
uint16_t temp = b -> readWord(a);
|
||||||
|
|
||||||
addRegister(6, false, 2);
|
addRegister(6, false, 2);
|
||||||
|
@ -1585,7 +1604,7 @@ bool cpu::misc_operations(const uint16_t instr)
|
||||||
uint16_t dst_value = getGAMAddress((instr >> 3) & 7, instr & 7, false, false);
|
uint16_t dst_value = getGAMAddress((instr >> 3) & 7, instr & 7, false, false);
|
||||||
|
|
||||||
// PUSH link
|
// PUSH link
|
||||||
pushStack(getRegister(link_reg, false));
|
pushStack(getRegister(link_reg));
|
||||||
|
|
||||||
// MOVE PC,link
|
// MOVE PC,link
|
||||||
setRegister(link_reg, false, getPC());
|
setRegister(link_reg, false, getPC());
|
||||||
|
@ -1602,7 +1621,7 @@ bool cpu::misc_operations(const uint16_t instr)
|
||||||
uint16_t v = popStack();
|
uint16_t v = popStack();
|
||||||
|
|
||||||
// MOVE link, PC
|
// MOVE link, PC
|
||||||
setPC(getRegister(link_reg, false));
|
setPC(getRegister(link_reg));
|
||||||
|
|
||||||
// POP link
|
// POP link
|
||||||
setRegister(link_reg, false, v);
|
setRegister(link_reg, false, v);
|
||||||
|
|
15
cpu.h
15
cpu.h
|
@ -38,9 +38,7 @@ private:
|
||||||
|
|
||||||
bool check_queued_interrupts();
|
bool check_queued_interrupts();
|
||||||
|
|
||||||
uint16_t getRegister(const int nr, const bool MF_MT) const;
|
uint16_t addRegister(const int nr, const bool prev_mode, const uint16_t value);
|
||||||
void setRegister(const int nr, const bool MF_MT, const uint16_t value);
|
|
||||||
uint16_t addRegister(const int nr, const bool MF_MT, const uint16_t value);
|
|
||||||
|
|
||||||
void addToMMR1(const uint8_t mode, const uint8_t reg, const bool word_mode);
|
void addToMMR1(const uint8_t mode, const uint8_t reg, const bool word_mode);
|
||||||
uint16_t getGAMAddress(const uint8_t mode, const int reg, const bool word_mode, const bool MF_MT);
|
uint16_t getGAMAddress(const uint8_t mode, const int reg, const bool word_mode, const bool MF_MT);
|
||||||
|
@ -121,17 +119,20 @@ public:
|
||||||
uint16_t getStackLimitRegister() { return stackLimitRegister; }
|
uint16_t getStackLimitRegister() { return stackLimitRegister; }
|
||||||
void setStackLimitRegister(const uint16_t v) { stackLimitRegister = v; }
|
void setStackLimitRegister(const uint16_t v) { stackLimitRegister = v; }
|
||||||
|
|
||||||
uint16_t getRegister(const bool user, const int nr) const { return regs0_5[user][nr]; }
|
|
||||||
uint16_t getStackPointer(const int which) const { assert(which >= 0 && which < 4); return sp[which]; }
|
uint16_t getStackPointer(const int which) const { assert(which >= 0 && which < 4); return sp[which]; }
|
||||||
uint16_t getPC() const { return pc; }
|
uint16_t getPC() const { return pc; }
|
||||||
|
|
||||||
|
void setRegister(const int nr, const bool reg_set, const bool prev_mode, const uint16_t value);
|
||||||
|
void setRegister(const int nr, const bool prev_mode, const uint16_t v) { setRegister(nr, (getPSW() >> 11) & 1, prev_mode, v); }
|
||||||
|
void setRegister(const int nr, const uint16_t v) { setRegister(nr, (getPSW() >> 11) & 1, false, v); }
|
||||||
|
|
||||||
void setRegisterLowByte(const int nr, const bool prev_mode, const uint16_t value);
|
void setRegisterLowByte(const int nr, const bool prev_mode, const uint16_t value);
|
||||||
void setRegister(const bool user, const int nr, const uint16_t value) { regs0_5[user][nr] = value; }
|
|
||||||
void setStackPointer(const int which, const uint16_t value) { assert(which >= 0 && which < 4); sp[which] = value; }
|
void setStackPointer(const int which, const uint16_t value) { assert(which >= 0 && which < 4); sp[which] = value; }
|
||||||
void setPC(const uint16_t value) { pc = value; }
|
void setPC(const uint16_t value) { pc = value; }
|
||||||
|
|
||||||
uint16_t getRegister(const int nr) const { return getRegister(nr, false); }
|
uint16_t getRegister(const int nr, const int mode, const bool sp_prev_mode) const;
|
||||||
void setRegister(const int nr, const uint16_t v) { setRegister(nr, false, v); }
|
uint16_t getRegister(const int nr) const;
|
||||||
|
|
||||||
bool put_result(const uint16_t a, const uint8_t dst_mode, const uint8_t dst_reg, const bool word_mode, const uint16_t value);
|
bool put_result(const uint16_t a, const uint8_t dst_mode, const uint8_t dst_reg, const bool word_mode, const uint16_t value);
|
||||||
};
|
};
|
||||||
|
|
14
main.cpp
14
main.cpp
|
@ -18,7 +18,6 @@
|
||||||
#include "log.h"
|
#include "log.h"
|
||||||
#include "memory.h"
|
#include "memory.h"
|
||||||
#include "terminal.h"
|
#include "terminal.h"
|
||||||
#include "tests.h"
|
|
||||||
#include "tty.h"
|
#include "tty.h"
|
||||||
#include "utils.h"
|
#include "utils.h"
|
||||||
|
|
||||||
|
@ -43,7 +42,6 @@ void sw_handler(int s)
|
||||||
void help()
|
void help()
|
||||||
{
|
{
|
||||||
printf("-h this help\n");
|
printf("-h this help\n");
|
||||||
printf("-m mode \"tc\": run testcases\n");
|
|
||||||
printf("-T t.bin load file as a binary tape file (like simh \"load\" command)\n");
|
printf("-T t.bin load file as a binary tape file (like simh \"load\" command)\n");
|
||||||
printf("-R d.rk load file as a RK05 disk device\n");
|
printf("-R d.rk load file as a RK05 disk device\n");
|
||||||
printf("-p 123 set CPU start pointer to decimal(!) value\n");
|
printf("-p 123 set CPU start pointer to decimal(!) value\n");
|
||||||
|
@ -111,15 +109,6 @@ int main(int argc, char *argv[])
|
||||||
withUI = true;
|
withUI = true;
|
||||||
break;
|
break;
|
||||||
|
|
||||||
case 'm':
|
|
||||||
if (strcasecmp(optarg, "tc") == 0)
|
|
||||||
testCases = true;
|
|
||||||
else {
|
|
||||||
fprintf(stderr, "\"-m %s\" is not known\n", optarg);
|
|
||||||
return 1;
|
|
||||||
}
|
|
||||||
break;
|
|
||||||
|
|
||||||
case 'T':
|
case 'T':
|
||||||
c->setRegister(7, loadTape(b, optarg));
|
c->setRegister(7, loadTape(b, optarg));
|
||||||
break;
|
break;
|
||||||
|
@ -188,9 +177,6 @@ int main(int argc, char *argv[])
|
||||||
|
|
||||||
b->add_tty(tty_);
|
b->add_tty(tty_);
|
||||||
|
|
||||||
if (testCases)
|
|
||||||
tests(c);
|
|
||||||
|
|
||||||
DOLOG(info, true, "Start running at %o", c->getRegister(7));
|
DOLOG(info, true, "Start running at %o", c->getRegister(7));
|
||||||
|
|
||||||
struct sigaction sa { };
|
struct sigaction sa { };
|
||||||
|
|
Loading…
Add table
Reference in a new issue