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disassembler fix

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folkert van heusden 2022-11-11 21:50:24 +01:00
parent f3e234d9d3
commit c43c6618d9
1 changed files with 10 additions and 6 deletions
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16
cpu.cpp
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@ -359,6 +359,8 @@ bool cpu::putGAM(const uint8_t mode, const int reg, const bool word_mode, const
int set = getBitPSW(11); int set = getBitPSW(11);
uint16_t dummy = 0;
switch(mode) { switch(mode) {
case 0: case 0:
setRegister(reg, prev_mode, value); setRegister(reg, prev_mode, value);
@ -378,8 +380,8 @@ bool cpu::putGAM(const uint8_t mode, const int reg, const bool word_mode, const
addRegister(reg, prev_mode, 2); addRegister(reg, prev_mode, 2);
break; break;
case 4: case 4:
addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? -2 : -1); dummy = addRegister(reg, prev_mode, !word_mode || reg == 7 || reg == 6 ? -2 : -1);
b -> write(getRegister(reg, set, prev_mode), word_mode, value, false); b -> write(dummy, word_mode, value, false);
break; break;
case 5: case 5:
addRegister(reg, prev_mode, -2); addRegister(reg, prev_mode, -2);
@ -1814,8 +1816,6 @@ std::map<std::string, std::vector<std::string> > cpu::disassemble(const uint16_t
auto dst_text { addressing_to_string(dst_register, (addr + 2) & 65535, word_mode) }; auto dst_text { addressing_to_string(dst_register, (addr + 2) & 65535, word_mode) };
auto next_word = dst_text.instruction_part; auto next_word = dst_text.instruction_part;
if (next_word != -1)
instruction_words.push_back(next_word);
work_values.push_back(dst_text.work_value); work_values.push_back(dst_text.work_value);
@ -1897,14 +1897,15 @@ std::map<std::string, std::vector<std::string> > cpu::disassemble(const uint16_t
if (text.empty() && name.empty() == false) if (text.empty() && name.empty() == false)
text = name + word_mode_str + space + dst_text.operand; text = name + word_mode_str + space + dst_text.operand;
if (text.empty() == false && next_word != -1)
instruction_words.push_back(next_word);
} }
else if (do_opcode == 0b111) { else if (do_opcode == 0b111) {
std::string src_text = format("R%d", (instruction >> 6) & 7); std::string src_text = format("R%d", (instruction >> 6) & 7);
auto dst_text { addressing_to_string(dst_register, (addr + 2) & 65535, word_mode) }; auto dst_text { addressing_to_string(dst_register, (addr + 2) & 65535, word_mode) };
auto next_word = dst_text.instruction_part; auto next_word = dst_text.instruction_part;
if (next_word != -1)
instruction_words.push_back(next_word);
work_values.push_back(dst_text.work_value); work_values.push_back(dst_text.work_value);
@ -1936,6 +1937,9 @@ std::map<std::string, std::vector<std::string> > cpu::disassemble(const uint16_t
if (text.empty() && name.empty() == false) if (text.empty() && name.empty() == false)
text = name + space + src_text + comma + dst_text.operand; text = name + space + src_text + comma + dst_text.operand;
if (text.empty() == false && next_word != -1)
instruction_words.push_back(next_word);
} }
else { else {
switch(do_opcode) { switch(do_opcode) {