flag fixes
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parent
afd84445eb
commit
c53ecb2be6
1 changed files with 18 additions and 18 deletions
36
cpu.cpp
36
cpu.cpp
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@ -355,15 +355,15 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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if (operation == 0b111)
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return additional_double_operand_instructions(instr);
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const uint8_t src = (instr >> 6) & 63;
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const uint8_t src_mode = (src >> 3) & 7;
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const uint8_t src_reg = src & 7;
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const uint8_t src = (instr >> 6) & 63;
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const uint8_t src_mode = (src >> 3) & 7;
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const uint8_t src_reg = src & 7;
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uint16_t src_value = operation == 0b110 ? 0 : getGAM(src_mode, src_reg, word_mode, false);
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const uint16_t src_value = operation == 0b110 ? 0 : getGAM(src_mode, src_reg, word_mode, false);
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const uint8_t dst = instr & 63;
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const uint8_t dst_mode = (dst >> 3) & 7;
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const uint8_t dst_reg = dst & 7;
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const uint8_t dst = instr & 63;
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const uint8_t dst_mode = (dst >> 3) & 7;
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const uint8_t dst_reg = dst & 7;
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switch(operation) {
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case 0b001: { // MOV/MOVB Move Word/Byte
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@ -432,21 +432,21 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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}
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case 0b110: { // ADD/SUB Add/Subtract Word
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src_value = getGAM(src_mode, src_reg, false, false);
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int16_t ssrc_value = getGAM(src_mode, src_reg, false, false);
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uint16_t dst_addr = getGAMAddress(dst_mode, dst_reg, false, false);
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int16_t dst_value = b->readWord(dst_addr);
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int16_t result = 0;
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uint16_t dst_addr = getGAMAddress(dst_mode, dst_reg, false, false);
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int16_t dst_value = b->readWord(dst_addr);
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int16_t result = 0;
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if (instr & 0x8000) {
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result = (dst_value - src_value) & 0xffff;
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setPSW_v(sign(src_value) != sign(dst_value) && sign(src_value) == sign(result));
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setPSW_c(uint16_t(dst_value) < uint16_t(src_value));
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result = (dst_value - ssrc_value) & 0xffff;
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setPSW_v(sign(ssrc_value) != sign(dst_value) && sign(ssrc_value) == sign(result));
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setPSW_c(uint16_t(dst_value) < uint16_t(ssrc_value));
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}
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else {
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result = (dst_value + src_value) & 0xffff;
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setPSW_v(sign(src_value) == sign(dst_value) && sign(dst_value) != sign(result));
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setPSW_c(uint16_t(result) < uint16_t(src_value));
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result = (dst_value + ssrc_value) & 0xffff;
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setPSW_v(sign(ssrc_value) == sign(dst_value) && sign(dst_value) != sign(result));
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setPSW_c(uint16_t(result) < uint16_t(ssrc_value));
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}
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setPSW_n(result < 0);
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@ -556,7 +556,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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setPSW_n(R < 0);
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setPSW_z(R == 0);
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setPSW_v(sign(R) != sign(oldR));
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setPSW_v(SIGN(R, false) != SIGN(oldR, false));
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setRegister(reg, R);
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