From c749db63e8d56c61020130c48e52da3d85b69ee8 Mon Sep 17 00:00:00 2001 From: Folkert van Heusden Date: Sat, 5 Apr 2025 15:35:07 +0200 Subject: [PATCH] PSW bit masking for RTI/RTT --- cpu.cpp | 12 ++++-------- 1 file changed, 4 insertions(+), 8 deletions(-) diff --git a/cpu.cpp b/cpu.cpp index 0fa80a4..94ea9cf 100644 --- a/cpu.cpp +++ b/cpu.cpp @@ -316,14 +316,10 @@ int cpu::getPSW_spl() const void cpu::setPSW(const uint16_t v, const bool limited) { - if (limited) { - // cannot replace the run-mode bits nor the set of registers - // psw = (psw & ~0340) | (v & 0174340); - psw = (psw & 0177400) | (v & 037777); - } - else { - psw = v; - } + if (limited) + psw = (psw & 0174340) | (v & 037); + else + psw = v & 0174377; // mask off reserved bits } void cpu::setPSW_flags_nzv(const uint16_t value, const word_mode_t word_mode)