bus: trap(4) when reading from/writing to i/o or ram that does not exists/is not mapped

This commit is contained in:
folkert van heusden 2023-03-20 22:27:04 +01:00
parent 389bc57405
commit c77ae1d617
Signed by untrusted user who does not match committer: folkert
GPG key ID: 6B6455EDFEED3BD1

38
bus.cpp
View file

@ -177,6 +177,17 @@ uint16_t bus::read(const uint16_t a, const bool word_mode, const bool use_prev,
return read_par(a, 3, word_mode, peek_only); return read_par(a, 3, word_mode, peek_only);
/////////// ///////////
if (a >= 0177740 && a <= 0177753) { // cache control register and others
// TODO
return 0;
}
if (a >= 0170200 && a <= 0170377) { // unibus map
DOLOG(debug, !peek_only, "reading unibus map (%06o)", a);
// TODO
return 0;
}
if (word_mode) { if (word_mode) {
if (a == ADDR_PSW) { // PSW if (a == ADDR_PSW) { // PSW
DOLOG(debug, !peek_only, "readb PSW LSB"); DOLOG(debug, !peek_only, "readb PSW LSB");
@ -275,9 +286,13 @@ uint16_t bus::read(const uint16_t a, const bool word_mode, const bool use_prev,
return system_size; return system_size;
} }
if (!peek_only) if (!peek_only) {
DOLOG(debug, true, "UNHANDLED read %o(%c)", a, word_mode ? 'B' : ' '); DOLOG(debug, true, "UNHANDLED read %o(%c)", a, word_mode ? 'B' : ' ');
DOLOG(debug, false, "Read non existing I/O (%06o)", a);
c->schedule_trap(004); // no such i/o
}
return -1; return -1;
} }
@ -291,6 +306,11 @@ uint16_t bus::read(const uint16_t a, const bool word_mode, const bool use_prev,
uint32_t m_offset = calculate_physical_address(run_mode, a, !peek_only, false, peek_only, space == d_space); uint32_t m_offset = calculate_physical_address(run_mode, a, !peek_only, false, peek_only, space == d_space);
if (peek_only == false && m_offset >= n_pages * 8192) {
DOLOG(debug, false, "Read non existing mapped memory (%o >= %o)", m_offset, n_pages * 8192);
c->schedule_trap(004); // no such memory
}
if (word_mode) if (word_mode)
temp = m -> readByte(m_offset); temp = m -> readByte(m_offset);
else else
@ -766,7 +786,13 @@ void bus::write(const uint16_t a, const bool word_mode, uint16_t value, const bo
} }
//// ////
if (a == ADDR_CCR) { // cache control register if (a >= 0177740 && a <= 0177753) { // cache control register and others
// TODO
return;
}
if (a >= 0170200 && a <= 0170377) { // unibus map
DOLOG(debug, false, "writing %06o to unibus map (%06o)", value, a);
// TODO // TODO
return; return;
} }
@ -787,7 +813,8 @@ void bus::write(const uint16_t a, const bool word_mode, uint16_t value, const bo
return; return;
} }
// c -> busError(); DOLOG(debug, false, "Write non existing I/O (%06o, value: %06o)", a, value);
c->schedule_trap(004); // no such i/o
return; return;
} }
@ -801,6 +828,11 @@ void bus::write(const uint16_t a, const bool word_mode, uint16_t value, const bo
uint32_t m_offset = calculate_physical_address(run_mode, a, true, true, false, space == d_space); uint32_t m_offset = calculate_physical_address(run_mode, a, true, true, false, space == d_space);
if (m_offset >= n_pages * 8192) {
DOLOG(debug, false, "Write non existing mapped memory (%06o, value: %06o)", m_offset, value);
c->schedule_trap(004); // no such memory
}
DOLOG(debug, true, "WRITE to %06o/%07o %c %c: %o", a, m_offset, space == d_space ? 'D' : 'I', word_mode ? 'B' : 'W', value); DOLOG(debug, true, "WRITE to %06o/%07o %c %c: %o", a, m_offset, space == d_space ? 'D' : 'I', word_mode ? 'B' : 'W', value);
if (word_mode) if (word_mode)