PSW addressing tweak
This commit is contained in:
folkert van heusden
parent
a80d3b711d
commit
c7f8d83c2b
GPG key ID:
6B6455EDFEED3BD1
3 changed files with 57 additions and 70 deletions
70
bus.cpp
70
bus.cpp
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@ -758,7 +758,7 @@ void bus::write_par(const uint32_t a, const int run_mode, const uint16_t value,
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DOLOG(debug, false, "WRITE-I/O PAR run-mode %d: %c for %d: %o (%07o)", run_mode, is_d ? 'D' : 'I', page, word_mode ? value & 0xff : value, pages[run_mode][is_d][page].par * 64);
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}
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void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t space)
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write_rc_t bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t space)
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{
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int run_mode = mode_selection == rm_cur ? c->getPSW_runmode() : c->getPSW_prev_runmode();
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@ -794,7 +794,7 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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c->setPSW(vtemp, false);
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return;
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return { true };
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}
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if (a == ADDR_STACKLIM || a == ADDR_STACKLIM + 1) { // stack limit register
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@ -811,7 +811,7 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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c->setStackLimitRegister(v);
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return;
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return { false };
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}
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if (a == ADDR_MICROPROG_BREAK_REG || a == ADDR_MICROPROG_BREAK_REG + 1) { // microprogram break register
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@ -822,7 +822,7 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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else
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microprogram_break_register = (microprogram_break_register & 0x00ff) | (value << 8);
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return;
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return { false };
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}
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if (a == ADDR_MMR0 || a == ADDR_MMR0 + 1) { // MMR0
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@ -833,78 +833,78 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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else
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MMR0 = (MMR0 & 0x00ff) | (value << 8);
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return;
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return { false };
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}
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}
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else {
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if (a == ADDR_PSW) { // PSW
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DOLOG(debug, false, "WRITE-I/O PSW: %06o", value);
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c->setPSW(value & ~16, false);
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return;
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return { true };
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}
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if (a == ADDR_STACKLIM) { // stack limit register
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DOLOG(debug, false, "WRITE-I/O stack limit register: %06o", value);
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c->setStackLimitRegister(value & 0xff00);
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return;
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return { false };
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}
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if (a >= ADDR_KERNEL_R && a <= ADDR_KERNEL_R + 5) { // kernel R0-R5
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int reg = a - ADDR_KERNEL_R;
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DOLOG(debug, false, "WRITE-I/O kernel R%d: %06o", reg, value);
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c->setRegister(reg, value);
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return;
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return { false };
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}
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if (a >= ADDR_USER_R && a <= ADDR_USER_R + 5) { // user R0-R5
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int reg = a - ADDR_USER_R;
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DOLOG(debug, false, "WRITE-I/O user R%d: %06o", reg, value);
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c->setRegister(reg, value);
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return;
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return { false };
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}
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if (a == ADDR_KERNEL_SP) { // kernel SP
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DOLOG(debug, false, "WRITE-I/O kernel SP: %06o", value);
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c->setStackPointer(0, value);
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return;
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return { false };
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}
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if (a == ADDR_PC) { // PC
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DOLOG(debug, false, "WRITE-I/O PC: %06o", value);
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c->setPC(value);
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return;
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return { false };
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}
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if (a == ADDR_SV_SP) { // supervisor SP
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DOLOG(debug, false, "WRITE-I/O supervisor sp: %06o", value);
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c->setStackPointer(1, value);
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return;
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return { false };
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}
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if (a == ADDR_USER_SP) { // user SP
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DOLOG(debug, false, "WRITE-I/O user sp: %06o", value);
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c->setStackPointer(3, value);
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return;
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return { false };
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}
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if (a == ADDR_MICROPROG_BREAK_REG) { // microprogram break register
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DOLOG(debug, false, "WRITE-I/O microprogram break register: %06o", value);
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microprogram_break_register = value & 0xff; // only 8b on 11/70?
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return;
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return { false };
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}
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}
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if (a == ADDR_CPU_ERR) { // cpu error register
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DOLOG(debug, false, "WRITE-I/O CPUERR: %06o", value);
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CPUERR = 0;
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return;
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return { false };
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}
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if (a == ADDR_MMR3) { // MMR3
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DOLOG(debug, false, "WRITE-I/O set MMR3: %06o", value);
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MMR3 = value;
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return;
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return { false };
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}
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if (a == ADDR_MMR0) { // MMR0
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DOLOG(debug, false, "WRITE-I/O set MMR0: %06o", value);
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setMMR0(value);
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return;
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return { false };
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}
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if (a == ADDR_PIR) { // PIR
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@ -920,7 +920,7 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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}
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PIR = value;
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return;
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return { false };
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}
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if (a == ADDR_LFC) { // line frequency clock and status register
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@ -935,86 +935,86 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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#if defined(BUILD_FOR_RP2040)
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xSemaphoreGive(lf_csr_lock);
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#endif
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return;
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return { false };
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}
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if (tm11 && a >= TM_11_BASE && a < TM_11_END) {
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DOLOG(debug, false, "WRITE-I/O TM11 register %d: %06o", (a - TM_11_BASE) / 2, value);
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word_mode ? tm11->writeByte(a, value) : tm11->writeWord(a, value);
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return;
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return { false };
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}
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if (rk05_ && a >= RK05_BASE && a < RK05_END) {
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DOLOG(debug, false, "WRITE-I/O RK05 register %d: %06o", (a - RK05_BASE) / 2, value);
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word_mode ? rk05_->writeByte(a, value) : rk05_->writeWord(a, value);
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return;
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return { false };
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}
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if (rl02_ && a >= RL02_BASE && a < RL02_END) {
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DOLOG(debug, false, "WRITE-I/O RL02 register %d: %06o", (a - RL02_BASE) / 2, value);
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word_mode ? rl02_->writeByte(a, value) : rl02_->writeWord(a, value);
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return;
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return { false };
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}
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if (tty_ && a >= PDP11TTY_BASE && a < PDP11TTY_END) {
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DOLOG(debug, false, "WRITE-I/O TTY register %d: %06o", (a - PDP11TTY_BASE) / 2, value);
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word_mode ? tty_->writeByte(a, value) : tty_->writeWord(a, value);
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return;
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return { false };
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}
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/// MMU ///
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// supervisor
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if (a >= ADDR_PDR_SV_START && a < ADDR_PDR_SV_END) {
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write_pdr(a, 1, value, word_mode);
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return;
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return { false };
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}
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if (a >= ADDR_PAR_SV_START && a < ADDR_PAR_SV_END) {
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write_par(a, 1, value, word_mode);
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return;
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return { false };
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}
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// kernel
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if (a >= ADDR_PDR_K_START && a < ADDR_PDR_K_END) {
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write_pdr(a, 0, value, word_mode);
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return;
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return { false };
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}
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if (a >= ADDR_PAR_K_START && a < ADDR_PAR_K_END) {
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write_par(a, 0, value, word_mode);
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return;
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return { false };
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}
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// user
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if (a >= ADDR_PDR_U_START && a < ADDR_PDR_U_END) {
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write_pdr(a, 3, value, word_mode);
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return;
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return { false };
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}
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if (a >= ADDR_PAR_U_START && a < ADDR_PAR_U_END) {
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write_par(a, 3, value, word_mode);
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return;
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return { false };
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}
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////
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if (a >= 0177740 && a <= 0177753) { // cache control register and others
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// TODO
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return;
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return { false };
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}
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if (a >= 0170200 && a <= 0170377) { // unibus map
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DOLOG(debug, false, "writing %06o to unibus map (%06o)", value, a);
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// TODO
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return;
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return { false };
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}
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if (a == ADDR_CONSW) { // switch register
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console_leds = value;
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return;
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return { false };
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}
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if (a == ADDR_SYSSIZE || a == ADDR_SYSSIZE + 2) // system size (is read-only)
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return;
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return { false };
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if (a == ADDR_SYSTEM_ID) // is r/o
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return;
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return { false };
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///////////
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@ -1050,6 +1050,8 @@ void bus::write(const uint16_t addr_in, const word_mode_t word_mode, uint16_t va
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m->writeByte(m_offset, value);
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else
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m->writeWord(m_offset, value);
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return { false };
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}
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void bus::writePhysical(const uint32_t a, const uint16_t value)
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12
bus.h
12
bus.h
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@ -82,6 +82,10 @@ typedef struct {
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uint16_t par, pdr;
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} page_t;
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typedef struct {
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bool is_psw;
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} write_rc_t;
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class bus
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{
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private:
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@ -145,16 +149,16 @@ public:
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void set_lf_crs_b7();
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uint8_t get_lf_crs();
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uint16_t read(const uint16_t a, const word_mode_t word_mode, const rm_selection_t mode_selection, const bool peek_only=false, const d_i_space_t s = i_space);
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uint16_t read (const uint16_t a, const word_mode_t word_mode, const rm_selection_t mode_selection, const bool peek_only=false, const d_i_space_t s = i_space);
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uint16_t readByte(const uint16_t a) { return read(a, wm_byte, rm_cur); }
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uint16_t readWord(const uint16_t a, const d_i_space_t s = i_space);
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uint16_t peekWord(const uint16_t a);
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uint16_t readUnibusByte(const uint16_t a);
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void write(const uint16_t a, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t s = i_space);
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void writeByte(const uint16_t a, const uint8_t value) { return write(a, wm_byte, value, rm_cur); }
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void writeWord(const uint16_t a, const uint16_t value, const d_i_space_t s = i_space);
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write_rc_t write (const uint16_t a, const word_mode_t word_mode, uint16_t value, const rm_selection_t mode_selection, const d_i_space_t s = i_space);
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void writeByte(const uint16_t a, const uint8_t value) { write(a, wm_byte, value, rm_cur); }
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void writeWord(const uint16_t a, const uint16_t value, const d_i_space_t s = i_space);
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uint16_t readPhysical(const uint32_t a);
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void writePhysical(const uint32_t a, const uint16_t value);
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45
cpu.cpp
45
cpu.cpp
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@ -160,9 +160,7 @@ bool cpu::put_result(const gam_rc_t & g, const uint16_t value)
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return true;
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}
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b->write(g.addr.value(), g.word_mode, value, g.mode_selection, g.space);
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return !b->is_psw(g.addr.value(), g.mode_selection, g.space);
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return b->write(g.addr.value(), g.word_mode, value, g.mode_selection, g.space).is_psw == false;
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}
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uint16_t cpu::addRegister(const int nr, const rm_selection_t mode_selection, const uint16_t value)
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@ -453,9 +451,9 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t wo
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bool cpu::putGAM(const gam_rc_t & g, const uint16_t value)
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{
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if (g.addr.has_value()) {
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b->write(g.addr.value(), g.word_mode, value, g.mode_selection, g.space);
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auto rc = b->write(g.addr.value(), g.word_mode, value, g.mode_selection, g.space);
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return !b->is_psw(g.addr.value(), g.mode_selection, g.space);
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return rc.is_psw == false;
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}
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setRegister(g.reg.value(), value, g.mode_selection);
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@ -926,15 +924,14 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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else {
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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int32_t vl = (a.value.value() + 1) & (word_mode == wm_byte ? 0xff : 0xffff);
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bool set_flags = !b->is_psw(a.addr.value(), a.mode_selection, a.space);
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bool set_flags = b->write(a.addr.value(), a.word_mode, vl, a.mode_selection, a.space).is_psw == false;
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if (set_flags) {
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setPSW_n(SIGN(vl, word_mode));
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setPSW_z(IS_0(vl, word_mode));
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setPSW_v(word_mode == wm_byte ? vl == 0x80 : vl == 0x8000);
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}
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b->write(a.addr.value(), a.word_mode, vl, a.mode_selection, a.space);
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}
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break;
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@ -959,15 +956,13 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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int32_t vl = (a.value.value() - 1) & (word_mode == wm_byte ? 0xff : 0xffff);
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bool set_flags = !b->is_psw(a.addr.value(), a.mode_selection, a.space);
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bool set_flags = b->write(a.addr.value(), a.word_mode, vl, a.mode_selection, a.space).is_psw == false;
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if (set_flags) {
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setPSW_n(SIGN(vl, word_mode));
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setPSW_z(IS_0(vl, word_mode));
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setPSW_v(word_mode == wm_byte ? vl == 0x7f : vl == 0x7fff);
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}
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b->write(a.addr.value(), a.word_mode, vl, a.mode_selection, a.space);
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}
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break;
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@ -992,9 +987,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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uint16_t v = -a.value.value();
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b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space);
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bool set_flags = !b->is_psw(a.addr.value(), a.mode_selection, a.space);
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bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space).is_psw == false;
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if (set_flags) {
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setPSW_n(SIGN(v, word_mode));
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@ -1030,9 +1023,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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bool org_c = getPSW_c();
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uint16_t v = (vo + org_c) & (word_mode == wm_byte ? 0x00ff : 0xffff);
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b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space);
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bool set_flags = !b->is_psw(a.addr.value(), a.mode_selection, a.space);
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bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space).is_psw == false;
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if (set_flags) {
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setPSW_n(SIGN(v, word_mode));
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@ -1068,9 +1059,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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bool org_c = getPSW_c();
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uint16_t v = (vo - org_c) & (word_mode == wm_byte ? 0xff : 0xffff);
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b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space);
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bool set_flags = !b->is_psw(a.addr.value(), a.mode_selection, a.space);
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bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space).is_psw == false;
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if (set_flags) {
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setPSW_n(SIGN(v, word_mode));
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@ -1120,9 +1109,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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else
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temp = (t >> 1) | (getPSW_c() << 15);
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b->write(a.addr.value(), a.word_mode, temp, a.mode_selection, a.space);
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bool set_flags = !b->is_psw(a.addr.value(), a.mode_selection, a.space);
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bool set_flags = b->write(a.addr.value(), a.word_mode, temp, a.mode_selection, a.space).is_psw == false;
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if (set_flags) {
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setPSW_c(new_carry);
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@ -1171,9 +1158,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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temp = (t << 1) | getPSW_c();
|
||||
}
|
||||
|
||||
b->write(a.addr.value(), a.word_mode, temp, a.mode_selection, a.space);
|
||||
|
||||
bool set_flags = !b->is_psw(a.addr.value(), a.mode_selection, a.space);
|
||||
bool set_flags = b->write(a.addr.value(), a.word_mode, temp, a.mode_selection, a.space).is_psw == false;
|
||||
|
||||
if (set_flags) {
|
||||
setPSW_c(new_carry);
|
||||
|
|
@ -1218,9 +1203,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
|||
v >>= 1;
|
||||
v |= hb;
|
||||
|
||||
b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space);
|
||||
|
||||
bool set_flags = !b->is_psw(a.addr.value(), a.mode_selection, a.space);
|
||||
bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space).is_psw == false;
|
||||
|
||||
if (set_flags) {
|
||||
setPSW_n(SIGN(v, word_mode));
|
||||
|
|
@ -1251,7 +1234,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
|||
uint16_t vl = a.value.value();
|
||||
uint16_t v = (vl << 1) & (word_mode == wm_byte ? 0xff : 0xffff);
|
||||
|
||||
bool set_flags = !b->is_psw(a.addr.value(), a.mode_selection, a.space);
|
||||
bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space).is_psw == false;
|
||||
|
||||
if (set_flags) {
|
||||
setPSW_n(SIGN(v, word_mode));
|
||||
|
|
@ -1259,8 +1242,6 @@ bool cpu::single_operand_instructions(const uint16_t instr)
|
|||
setPSW_c(SIGN(vl, word_mode));
|
||||
setPSW_v(getPSW_n() ^ getPSW_c());
|
||||
}
|
||||
|
||||
b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space);
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
|
|
|||
Loading…
Add table
Reference in a new issue