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ASHC: set V flag, correction for shift value

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folkert van heusden 2022-06-09 08:48:30 +02:00
parent 23a87309e3
commit d243364743
1 changed files with 7 additions and 3 deletions
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10
cpu.cpp
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@ -686,8 +686,8 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
case 3: { // ASHC case 3: { // ASHC
uint32_t R0R1 = (getRegister(reg) << 16) | getRegister(reg + 1); uint32_t R0R1 = (getRegister(reg) << 16) | getRegister(reg + 1);
uint16_t a = getGAMAddress(dst_mode, dst_reg, false, false); uint16_t shift = getGAM(dst_mode, dst_reg, false, false) & 077;
int16_t shift = b->read(a, false, false) & 077; // mask of lower 6 bit bool sign = R0R1 >> 31;
if (shift == 0) { if (shift == 0) {
setPSW_c(false); setPSW_c(false);
@ -711,10 +711,14 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
R0R1 >>= 1; R0R1 >>= 1;
} }
bool new_sign = R0R1 >> 31;
setPSW_v(sign != new_sign);
setRegister(reg, R0R1 >> 16); setRegister(reg, R0R1 >> 16);
setRegister(reg + 1, R0R1 & 65535); setRegister(reg + 1, R0R1 & 65535);
setPSW_n(R0R1 >> 31); setPSW_n(R0R1 & 0x80000000);
setPSW_z(R0R1 == 0); setPSW_z(R0R1 == 0);
return true; return true;