writePhysical
This commit is contained in:
parent
e643952a2f
commit
d68a5af55e
4 changed files with 65 additions and 6 deletions
6
bus.cpp
6
bus.cpp
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@ -864,6 +864,12 @@ void bus::write(const uint16_t a, const bool word_mode, uint16_t value, const bo
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m->writeWord(m_offset, value);
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m->writeWord(m_offset, value);
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}
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}
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void bus::writePhysical(const uint32_t a, const uint16_t value)
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{
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DOLOG(debug, true, "physicalWRITE %06o to %o", value, a);
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m->writeWord(a, value);
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}
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uint16_t bus::readWord(const uint16_t a, const d_i_space_t s)
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uint16_t bus::readWord(const uint16_t a, const d_i_space_t s)
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{
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{
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return read(a, false, false, false, s);
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return read(a, false, false, false, s);
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2
bus.h
2
bus.h
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@ -130,6 +130,8 @@ public:
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void writeByte(const uint16_t a, const uint8_t value) { return write(a, true, value, false); }
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void writeByte(const uint16_t a, const uint8_t value) { return write(a, true, value, false); }
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void writeWord(const uint16_t a, const uint16_t value);
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void writeWord(const uint16_t a, const uint16_t value);
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void writePhysical(const uint32_t a, const uint16_t value);
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void writeUnibusByte(const uint16_t a, const uint8_t value);
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void writeUnibusByte(const uint16_t a, const uint8_t value);
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uint16_t getMMR0() { return MMR0; }
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uint16_t getMMR0() { return MMR0; }
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57
cpu.cpp
57
cpu.cpp
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@ -90,7 +90,6 @@ void cpu::reset()
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pc = 0;
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pc = 0;
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psw = 7 << 5;
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psw = 7 << 5;
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fpsr = 0;
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fpsr = 0;
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runMode = false;
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init_interrupt_queue();
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init_interrupt_queue();
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}
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}
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@ -449,6 +448,50 @@ uint16_t cpu::getGAMAddress(const uint8_t mode, const int reg, const bool word_m
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return -1;
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return -1;
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}
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}
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uint16_t cpu::getGAMAddressDI(const uint8_t mode, const int reg, const bool word_mode, const bool prev_mode)
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{
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uint16_t next_word = 0;
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uint16_t temp = 0;
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int set = getBitPSW(11);
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switch(mode) {
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case 0:
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// registers are also mapped in memory
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return 0177700 + reg;
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case 1:
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return getRegister(reg, set, prev_mode);
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case 2:
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temp = getRegister(reg, set, prev_mode);
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addRegister(reg, prev_mode, !word_mode || reg == 6 || reg == 7 ? 2 : 1);
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return temp;
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case 3:
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printf("hier001\n");
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temp = b -> readWord(getRegister(reg, set, prev_mode));
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addRegister(reg, prev_mode, 2);
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return temp;
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case 4:
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addRegister(reg, prev_mode, !word_mode || reg == 6 || reg == 7 ? -2 : -1);
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return getRegister(reg, set, prev_mode);
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case 5:
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addRegister(reg, prev_mode, -2);
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printf("hier002\n");
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return b -> readWord(getRegister(reg, set, prev_mode));
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case 6:
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printf("hier003\n");
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next_word = b -> readWord(getPC());
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addRegister(7, prev_mode, 2);
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return getRegister(reg, set, prev_mode) + next_word;
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case 7:
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printf("hier004\n");
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next_word = b -> readWord(getPC());
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addRegister(7, prev_mode, 2);
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return b -> readWord(getRegister(reg, set, prev_mode) + next_word);
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}
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return -1;
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}
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bool cpu::double_operand_instructions(const uint16_t instr)
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bool cpu::double_operand_instructions(const uint16_t instr)
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{
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{
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const bool word_mode = !!(instr & 0x8000);
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const bool word_mode = !!(instr & 0x8000);
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@ -1334,11 +1377,21 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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if (dst_mode == 0)
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if (dst_mode == 0)
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setRegister(dst_reg, true, v);
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setRegister(dst_reg, true, v);
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else {
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else {
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uint16_t a = getGAMAddress(dst_mode, dst_reg, false, false);
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uint16_t a = getGAMAddressDI(dst_mode, dst_reg, false, false);
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set_flags = a != ADDR_PSW;
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set_flags = a != ADDR_PSW;
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if (a >= 0160000)
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b->write(a, false, v, true); // put in '13/12' address space
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b->write(a, false, v, true); // put in '13/12' address space
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else {
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auto phys = b->calculate_physical_address((getPSW() >> 12) & 3, a);
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DOLOG(debug, true, "MTPI/D %06o -> %o / %o", a, phys.physical_instruction, phys.physical_data);
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b->check_address(true, true, phys, false, word_mode, (getPSW() >> 12) & 3);
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b->writePhysical(word_mode ? phys.physical_data : phys.physical_instruction, v);
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}
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}
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}
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if (set_flags) {
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if (set_flags) {
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4
cpu.h
4
cpu.h
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@ -21,7 +21,6 @@ private:
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uint16_t fpsr { 0 };
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uint16_t fpsr { 0 };
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uint16_t stackLimitRegister { 0 };
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uint16_t stackLimitRegister { 0 };
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uint8_t scheduled_trap { 0 };
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uint8_t scheduled_trap { 0 };
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bool runMode { false };
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bool emulateMFPT { false };
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bool emulateMFPT { false };
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uint64_t instruction_count { 0 };
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uint64_t instruction_count { 0 };
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uint64_t running_since { 0 };
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uint64_t running_since { 0 };
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@ -43,6 +42,7 @@ private:
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void addToMMR1(const uint8_t mode, const uint8_t reg, const bool word_mode);
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void addToMMR1(const uint8_t mode, const uint8_t reg, const bool word_mode);
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uint16_t getGAMAddress(const uint8_t mode, const int reg, const bool word_mode, const bool MF_MT);
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uint16_t getGAMAddress(const uint8_t mode, const int reg, const bool word_mode, const bool MF_MT);
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uint16_t getGAMAddressDI(const uint8_t mode, const int reg, const bool word_mode, const bool MF_MT);
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uint16_t getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode, const bool MF_MT);
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uint16_t getGAM(const uint8_t mode, const uint8_t reg, const bool word_mode, const bool MF_MT);
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// returns false when flag registers should not be updated
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// returns false when flag registers should not be updated
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bool putGAM(const uint8_t mode, const int reg, const bool word_mode, const uint16_t value, const bool MF_FT);
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bool putGAM(const uint8_t mode, const int reg, const bool word_mode, const uint16_t value, const bool MF_FT);
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@ -100,8 +100,6 @@ public:
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void setEmulateMFPT(const bool v) { emulateMFPT = v; }
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void setEmulateMFPT(const bool v) { emulateMFPT = v; }
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bool getRunMode() { return runMode; }
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bool getPSW_c() const;
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bool getPSW_c() const;
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bool getPSW_v() const;
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bool getPSW_v() const;
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bool getPSW_z() const;
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bool getPSW_z() const;
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