34 versus 70 pdr bits masking
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a000df36b8
commit
e7c50e9380
1 changed files with 6 additions and 6 deletions
12
bus.cpp
12
bus.cpp
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@ -552,8 +552,8 @@ uint16_t bus::write(const uint16_t a, const bool word_mode, uint16_t value, cons
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if (c->get_34()) // 11/34 has no cache bit
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pages[001][is_d][page].pdr &= 077516;
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pages[001][is_d][page].pdr &= ~(128 + 64 + 32 + 16); // set bit 4 & 5 to 0 as they are unused and A/W are set to 0 by writes
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else
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pages[001][is_d][page].pdr &= ~(128 + 64 + 32 + 16); // set bit 4 & 5 to 0 as they are unused and A/W are set to 0 by writes
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DOLOG(debug, true, "write supervisor %c PDR for %d: %o [%d]", is_d ? 'D' : 'I', page, value, word_mode);
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@ -594,8 +594,8 @@ uint16_t bus::write(const uint16_t a, const bool word_mode, uint16_t value, cons
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if (c->get_34()) // 11/34 has no cache bit
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pages[000][is_d][page].pdr &= 077516;
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pages[000][is_d][page].pdr &= ~(128 + 64 + 32 + 16); // set bit 4 & 5 to 0 as they are unused and A/W are set to 0 by writes
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else
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pages[000][is_d][page].pdr &= ~(128 + 64 + 32 + 16); // set bit 4 & 5 to 0 as they are unused and A/W are set to 0 by writes
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DOLOG(debug, true, "write kernel %c PDR for %d: %o [%d]", is_d ? 'D' : 'I', page, value, word_mode);
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@ -636,8 +636,8 @@ uint16_t bus::write(const uint16_t a, const bool word_mode, uint16_t value, cons
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if (c->get_34()) // 11/34 has no cache bit
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pages[003][is_d][page].pdr &= 077516;
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pages[003][is_d][page].pdr &= ~(128 + 64 + 32 + 16); // set bit 4 & 5 to 0 as they are unused and A/W are set to 0 by writes
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else
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pages[003][is_d][page].pdr &= ~(128 + 64 + 32 + 16); // set bit 4 & 5 to 0 as they are unused and A/W are set to 0 by writes
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DOLOG(debug, true, "write user %c PDR for %d: %o [%d]", is_d ? 'D' : 'I', page, value, word_mode);
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