more MMR1 rework
This commit is contained in:
folkert van heusden
parent
92642c0e17
commit
f2d8c7d5f9
GPG key ID:
6B6455EDFEED3BD1
2 changed files with 62 additions and 23 deletions
75
cpu.cpp
75
cpu.cpp
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@ -363,20 +363,16 @@ void cpu::queue_interrupt(const uint8_t level, const uint8_t vector)
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DOLOG(debug, false, "Queueing interrupt vector %o (IPL %d, current: %d), n: %zu", vector, level, getPSW_spl(), it->second.size());
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}
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void cpu::addToMMR1(const uint8_t mode, const uint8_t reg, const word_mode_t word_mode)
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void cpu::addToMMR1(const gam_rc_t & g)
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{
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bool neg = mode == 4 || mode == 5;
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if (word_mode == wm_word || reg >= 6 || mode == 6 || mode == 7)
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b->addToMMR1(neg ? -2 : 2, reg);
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else
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b->addToMMR1(neg ? -1 : 1, reg);
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if (g.mmr1_update.has_value())
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b->addToMMR1(g.mmr1_update.value().delta, g.mmr1_update.value().reg);
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}
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// GAM = general addressing modes
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gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t word_mode, const rm_selection_t mode_selection, const bool read_value)
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{
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gam_rc_t g { word_mode, mode_selection, i_space, mode, { }, { }, { } };
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gam_rc_t g { word_mode, mode_selection, i_space, mode, { }, { }, { }, { } };
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d_i_space_t isR7_space = reg == 7 ? i_space : (b->get_use_data_space(getPSW_runmode()) ? d_space : i_space);
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// ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ always d_space here? TODO
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@ -400,20 +396,20 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t wo
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if (read_value)
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g.value = b->read(g.addr.value(), word_mode, mode_selection, false, isR7_space);
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addRegister(reg, mode_selection, word_mode == wm_word || reg == 7 || reg == 6 ? 2 : 1);
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addToMMR1(mode, reg, word_mode == wm_word || reg == 7 || reg == 6 ? wm_word : wm_byte);
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g.mmr1_update = { word_mode == wm_word || reg == 7 || reg == 6 ? 2 : 1, reg };
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break;
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case 3: // @(Rn)+ / @#a
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g.addr = b->read(getRegister(reg, mode_selection), wm_word, mode_selection, false, isR7_space);
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// might be wrong: the adds should happen when the read is really performed, because of traps
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addRegister(reg, mode_selection, 2);
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addToMMR1(mode, reg, wm_word);
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g.mmr1_update = { 2, reg };
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g.space = d_space;
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if (read_value)
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g.value = b->read(g.addr.value(), word_mode, mode_selection, false, g.space);
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break;
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case 4: // -(Rn)
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addRegister(reg, mode_selection, word_mode == wm_word || reg == 7 || reg == 6 ? -2 : -1);
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addToMMR1(mode, reg, word_mode == wm_word || reg == 7 || reg == 6 ? wm_word : wm_byte);
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g.mmr1_update = { word_mode == wm_word || reg == 7 || reg == 6 ? -2 : -1, reg };
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g.space = d_space;
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g.addr = getRegister(reg, mode_selection);
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if (read_value)
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@ -421,7 +417,7 @@ gam_rc_t cpu::getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t wo
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break;
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case 5: // @-(Rn)
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addRegister(reg, mode_selection, -2);
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addToMMR1(mode, reg, wm_word);
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g.mmr1_update = { -2, reg };
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g.addr = b->read(getRegister(reg, mode_selection), wm_word, mode_selection, false, isR7_space);
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g.space = d_space;
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if (read_value)
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@ -494,21 +490,19 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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switch(operation) {
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case 0b001: { // MOV/MOVB Move Word/Byte
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gam_rc_t g_src;
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if (word_mode == wm_byte && dst_mode == 0) {
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g_src = getGAM(src_mode, src_reg, word_mode, rm_cur);
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gam_rc_t g_src = getGAM(src_mode, src_reg, word_mode, rm_cur);
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if (word_mode == wm_byte && dst_mode == 0)
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setRegister(dst_reg, int8_t(g_src.value.value())); // int8_t: sign extension
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}
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else {
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auto g_dst = getGAM(dst_mode, dst_reg, word_mode, rm_cur, false);
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g_src = getGAM(src_mode, src_reg, word_mode, rm_cur);
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addToMMR1(g_dst);
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set_flags = putGAM(g_dst, g_src.value.value());
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}
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addToMMR1(g_src);
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if (set_flags)
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setPSW_flags_nzv(g_src.value.value(), word_mode);
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@ -517,8 +511,10 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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case 0b010: { // CMP/CMPB Compare Word/Byte
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auto g_dst = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(g_dst);
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gam_rc_t g_src = getGAM(src_mode, src_reg, word_mode, rm_cur);
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addToMMR1(g_src);
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uint16_t temp = (g_src.value.value() - g_dst.value.value()) & (word_mode == wm_byte ? 0xff : 0xffff);
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@ -532,8 +528,10 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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case 0b011: { // BIT/BITB Bit Test Word/Byte
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auto g_dst = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(g_dst);
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gam_rc_t g_src = getGAM(src_mode, src_reg, word_mode, rm_cur);
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addToMMR1(g_src);
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uint16_t result = (g_dst.value.value() & g_src.value.value()) & (word_mode == wm_byte ? 0xff : 0xffff);
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@ -544,8 +542,10 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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case 0b100: { // BIC/BICB Bit Clear Word/Byte
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auto g_dst = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(g_dst);
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gam_rc_t g_src = getGAM(src_mode, src_reg, word_mode, rm_cur);
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addToMMR1(g_src);
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uint16_t result = g_dst.value.value() & ~g_src.value.value();
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@ -558,8 +558,10 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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case 0b101: { // BIS/BISB Bit Set Word/Byte
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// TODO: retain MSB for register operations?
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auto g_dst = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(g_dst);
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gam_rc_t g_src = getGAM(src_mode, src_reg, word_mode, rm_cur);
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addToMMR1(g_src);
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uint16_t result = g_dst.value.value() | g_src.value.value();
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@ -574,8 +576,10 @@ bool cpu::double_operand_instructions(const uint16_t instr)
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case 0b110: { // ADD/SUB Add/Subtract Word
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auto g_dst = getGAM(dst_mode, dst_reg, wm_word, rm_cur);
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addToMMR1(g_dst);
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auto g_ssrc = getGAM(src_mode, src_reg, wm_word, rm_cur);
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addToMMR1(g_ssrc);
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int16_t result = 0;
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@ -632,6 +636,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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int16_t R1 = getRegister(reg);
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auto R2g = getGAM(dst_mode, dst_reg, wm_word, rm_cur);
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addToMMR1(R2g);
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int16_t R2 = R2g.value.value();
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int32_t result = R1 * R2;
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@ -648,6 +653,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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case 1: { // DIV
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auto R2g = getGAM(dst_mode, dst_reg, wm_word, rm_cur);
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addToMMR1(R2g);
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int16_t divider = R2g.value.value();
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int32_t R0R1 = (uint32_t(getRegister(reg)) << 16) | getRegister(reg | 1);
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@ -694,6 +700,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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uint32_t R = getRegister(reg), oldR = R;
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auto g_dst = getGAM(dst_mode, dst_reg, wm_word, rm_cur);
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addToMMR1(g_dst);
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uint16_t shift = g_dst.value.value() & 077;
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bool sign = SIGN(R, wm_word);
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@ -745,6 +752,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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uint32_t R0R1 = (uint32_t(getRegister(reg)) << 16) | getRegister(reg | 1);
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auto g_dst = getGAM(dst_mode, dst_reg, wm_word, rm_cur);
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addToMMR1(g_dst);
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uint16_t shift = g_dst.value.value() & 077;
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bool sign = R0R1 & 0x80000000;
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@ -801,6 +809,7 @@ bool cpu::additional_double_operand_instructions(const uint16_t instr)
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case 4: { // XOR (word only)
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uint16_t reg_v = getRegister(reg); // in case it is R7
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auto g_dst = getGAM(dst_mode, dst_reg, wm_word, rm_cur);
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addToMMR1(g_dst);
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uint16_t vl = g_dst.value.value() ^ reg_v;
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bool set_flags = putGAM(g_dst, vl);
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@ -840,6 +849,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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return false;
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auto g_dst = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(g_dst);
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uint16_t v = g_dst.value.value();
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@ -867,6 +877,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else {
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auto g_dst = getGAM(dst_mode, dst_reg, word_mode, rm_cur, false);
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addToMMR1(g_dst);
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set_flags = putGAM(g_dst, 0);
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}
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@ -894,6 +905,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else {
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(a);
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v = a.value.value();
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if (word_mode == wm_byte)
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@ -928,6 +940,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else {
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(a);
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int32_t vl = (a.value.value() + 1) & (word_mode == wm_byte ? 0xff : 0xffff);
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bool set_flags = b->write(a.addr.value(), a.word_mode, vl, a.mode_selection, a.space).is_psw == false;
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@ -959,6 +972,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else {
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(a);
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int32_t vl = (a.value.value() - 1) & (word_mode == wm_byte ? 0xff : 0xffff);
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bool set_flags = b->write(a.addr.value(), a.word_mode, vl, a.mode_selection, a.space).is_psw == false;
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@ -990,6 +1004,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else {
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(a);
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uint16_t v = -a.value.value();
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bool set_flags = b->write(a.addr.value(), a.word_mode, v, a.mode_selection, a.space).is_psw == false;
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@ -1024,6 +1039,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else {
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(a);
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const uint16_t vo = a.value.value();
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bool org_c = getPSW_c();
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uint16_t v = (vo + org_c) & (word_mode == wm_byte ? 0x00ff : 0xffff);
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@ -1060,6 +1076,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else {
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(a);
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const uint16_t vo = a.value.value();
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bool org_c = getPSW_c();
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uint16_t v = (vo - org_c) & (word_mode == wm_byte ? 0xff : 0xffff);
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@ -1077,7 +1094,9 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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case 0b000101111: { // TST/TSTB
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uint16_t v = getGAM(dst_mode, dst_reg, word_mode, rm_cur).value.value();
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auto g = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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uint16_t v = g.value.value();
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addToMMR1(g);
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setPSW_flags_nzv(v, word_mode);
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setPSW_c(false);
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@ -1105,6 +1124,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else {
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(a);
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uint16_t t = a.value.value();
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bool new_carry = t & 1;
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@ -1150,6 +1170,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else {
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(a);
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uint16_t t = a.value.value();
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bool new_carry = false;
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@ -1196,6 +1217,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else {
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(a);
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uint16_t v = a.value.value();
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uint16_t hb = word_mode == wm_byte ? v & 128 : v & 32768;
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@ -1236,6 +1258,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else {
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auto a = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(a);
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uint16_t vl = a.value.value();
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uint16_t v = (vl << 1) & (word_mode == wm_byte ? 0xff : 0xffff);
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@ -1262,6 +1285,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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else {
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// calculate address in current address space
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auto a = getGAMAddress(dst_mode, dst_reg, wm_word);
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addToMMR1(a);
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int prev_run_mode = getPSW_prev_runmode();
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bool is_d = word_mode == wm_byte;
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@ -1308,6 +1332,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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setRegister(dst_reg, v, rm_prev);
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else {
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auto a = getGAMAddress(dst_mode, dst_reg, wm_word);
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addToMMR1(a);
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b->mmudebug(a.addr.value());
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@ -1363,6 +1388,7 @@ bool cpu::single_operand_instructions(const uint16_t instr)
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}
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else { // SXT
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auto g_dst = getGAM(dst_mode, dst_reg, word_mode, rm_cur);
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addToMMR1(g_dst);
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uint16_t vl = -getPSW_n();
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@ -1593,7 +1619,9 @@ bool cpu::misc_operations(const uint16_t instr)
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int dst_reg = instr & 7;
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setPC(getGAMAddress(dst_mode, dst_reg, wm_word).addr.value());
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auto g = getGAMAddress(dst_mode, dst_reg, wm_word);
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addToMMR1(g);
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setPC(g.addr.value());
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return true;
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}
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@ -1605,7 +1633,8 @@ bool cpu::misc_operations(const uint16_t instr)
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int dst_reg = instr & 7;
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auto dst_value = getGAMAddress(dst_mode, dst_reg, wm_word).addr.value();
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auto a = getGAMAddress(dst_mode, dst_reg, wm_word);
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auto dst_value = a.addr.value();
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int link_reg = (instr >> 6) & 7;
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@ -1613,6 +1642,8 @@ bool cpu::misc_operations(const uint16_t instr)
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pushStack(getRegister(link_reg));
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b->addToMMR1(-2, 6);
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addToMMR1(a);
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// MOVE PC,link
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setRegister(link_reg, getPC());
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10
cpu.h
10
cpu.h
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@ -15,12 +15,20 @@
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#include "bus.h"
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typedef struct {
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int delta;
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unsigned reg;
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} mmr1_delta_t;
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typedef struct {
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word_mode_t word_mode;
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rm_selection_t mode_selection;
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d_i_space_t space;
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int access_mode;
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// for MMR1 register
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std::optional<mmr1_delta_t> mmr1_update;
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std::optional<uint16_t> addr;
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std::optional<int> reg;
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@ -64,7 +72,7 @@ private:
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uint16_t addRegister(const int nr, const rm_selection_t mode_selection, const uint16_t value);
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void addToMMR1(const uint8_t mode, const uint8_t reg, const word_mode_t word_mode);
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void addToMMR1(const gam_rc_t & g);
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||||
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gam_rc_t getGAM(const uint8_t mode, const uint8_t reg, const word_mode_t word_mode, const rm_selection_t mode_selection, const bool read_value = true);
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gam_rc_t getGAMAddress(const uint8_t mode, const int reg, const word_mode_t word_mode);
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|
|
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Loading…
Add table
Reference in a new issue