Commit graph

1152 commits

Author SHA1 Message Date
folkert van heusden
9040a2b075
ESP32: configure network & NBD disk backend 2023-03-22 11:26:13 +01:00
folkert van heusden
89a9fbead0
NBD: implemented read/write 2023-03-22 10:24:23 +01:00
folkert van heusden
f61d49c98f
connect 2023-03-22 07:33:08 +01:00
folkert van heusden
52df10587d
Merge branch 'master' into nbd 2023-03-21 22:39:26 +01:00
folkert van heusden
68a7c8376e
override 2023-03-21 22:39:19 +01:00
folkert van heusden
06d4373fc7
resolve hostname 2023-03-21 22:38:28 +01:00
folkert van heusden
cd55079217
Merge branch 'master' into nbd 2023-03-21 22:32:20 +01:00
folkert van heusden
4a4448e7b0
disk_backend::begin() 2023-03-21 22:28:43 +01:00
folkert van heusden
553688a983
wip 2023-03-21 22:15:27 +01:00
folkert van heusden
8278c8d308
ESP32 2023-03-21 22:02:15 +01:00
folkert van heusden
6236d96b83
disk backend 2023-03-21 21:45:25 +01:00
folkert van heusden
a672841865
clean-up 2023-03-21 21:16:41 +01:00
folkert van heusden
cf420ca726
d/i index 0 for i is more logical? because it is default mode. 2023-03-21 21:07:36 +01:00
folkert van heusden
a9b42ff1d7
MFPT is no longer switchable 2023-03-21 20:31:55 +01:00
folkert van heusden
5bad90a820
lock MMR2 when upper 3 bits of MMR0 are set (any of them) 2023-03-21 19:40:32 +01:00
folkert van heusden
253d8437eb
throw exception when scheduling trap 004 for non existing pages 2023-03-21 19:34:58 +01:00
folkert van heusden
7ea2fa0033
only execute trap when MRR0_bit_9 AND MMR0_&_0xf000 == 0 2023-03-21 18:09:36 +01:00
folkert van heusden
10ce535813
explicit logging of schedule_trap 2023-03-21 16:20:06 +01:00
folkert van heusden
06b5c027d3
do not run trap when 4 upper bits of MMR0 are set (any of them), also set bit 12 when there is a case for traping 2023-03-21 15:07:51 +01:00
folkert van heusden
d876a23eee
wip 2023-03-21 14:52:51 +01:00
folkert van heusden
2afa705209
MMR2 tracking 2023-03-21 14:26:58 +01:00
folkert van heusden
48abb8509f
TRAP logging 2023-03-21 14:09:11 +01:00
folkert van heusden
69118435c4
A/W flags of PDR are reset when PAR is written to 2023-03-21 14:02:51 +01:00
folkert van heusden
406c2a5a09
i/o logging: handle peek_only-flag correct 2023-03-21 13:45:17 +01:00
folkert van heusden
470919e85d
If bit 9 of MMR0 is not set, abort an instruction but do not trap 2023-03-21 11:04:04 +01:00
folkert van heusden
49d16a72e6
ACF logic clean-up 2023-03-21 10:59:53 +01:00
folkert van heusden
ff40cdc82c
11/34 mode removed 2023-03-21 10:32:46 +01:00
folkert van heusden
fa9f57caa0
Bit 8 of MMR0 enables relocation only for 'destination'. Implemented by
checking for bit 8 when doing a write.

https://retrocomputing.stackexchange.com/questions/24664/pdp-11-34-bit-8-in-mmr0-maintenance-mode-what-does-it-do
2023-03-21 09:00:40 +01:00
folkert van heusden
6ac4a9ecb6
odd address check in i/o when in !word_mode 2023-03-21 08:49:49 +01:00
folkert van heusden
c77ae1d617
bus: trap(4) when reading from/writing to i/o or ram that does not exists/is not mapped 2023-03-20 22:27:04 +01:00
folkert van heusden
389bc57405
cpu::schedule_trap logs a message 2023-03-20 22:26:59 +01:00
folkert van heusden
0336c0c66c
source layout 2023-03-20 21:16:11 +01:00
folkert van heusden
d8912d66f4
always clear MMR3 bit 5 as unibus mapping is not implemented yet 2023-03-20 21:10:16 +01:00
folkert van heusden
9930dd6fc8
jump into debugger when no bootloader or test is selected 2023-03-20 20:53:17 +01:00
folkert van heusden
e7e236fd81
use basic loader / tm_11 clean-up 2023-03-20 20:47:45 +01:00
folkert van heusden
6cbb5c3faa
11/70 has only 8 bits for "microprogram break register"? 2023-03-20 19:39:31 +01:00
folkert van heusden
5bc706d979
11/70 has no MFPT instruction 2023-03-20 19:07:52 +01:00
folkert van heusden
3df5d20152
ADDR_MICROPROG_BREAK_REG read access 2023-03-20 18:16:29 +01:00
folkert van heusden
84fd36f771
odd addressing trap in i/o space 2023-03-20 18:01:50 +01:00
folkert van heusden
831a01a5b1
fix for CLR & odd addressing-trap 2023-03-20 16:02:27 +01:00
folkert van heusden
da79c357c2
v-flag for SUB was incorrect sometimes (address 017172 of EQKCE1.BIC) 2023-03-20 15:24:48 +01:00
folkert van heusden
e85e204179
setBitPSW without conditional 2023-03-20 15:11:20 +01:00
folkert van heusden
ce730c6ea1
microprogram break register 2023-03-20 14:23:32 +01:00
folkert van heusden
3761b177af
ASH etc flags 2023-03-20 14:00:49 +01:00
folkert van heusden
a57d89a045
Fix for XOR R7/PC,... 2023-03-20 10:33:45 +01:00
folkert van heusden
d81f7eec66
additional instructions are only ^0111 and not ^1111 (2) 2023-03-20 10:07:51 +01:00
folkert van heusden
e6d89c425e
additional instructions are only ^0111 and not ^1111 2023-03-20 09:59:22 +01:00
folkert van heusden
2bf8b92217
0177764: system id 2023-03-20 09:58:56 +01:00
folkert van heusden
7e916a652e
11/70 has no MFPS instruction 2023-03-19 22:19:31 +01:00
folkert van heusden
8b82095d49
11/70 has no MFPS instruction 2023-03-19 22:07:27 +01:00