folkert van heusden
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a74dbe5bd1
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flag fixes
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2022-03-31 13:58:36 +02:00 |
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folkert van heusden
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4774d23d1b
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16b where possible
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2022-03-31 13:41:53 +02:00 |
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folkert van heusden
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bf452aede1
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fixes for re-adding upper byte for single-byte instructions
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2022-03-31 13:22:58 +02:00 |
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folkert van heusden
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1ea4658257
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SIGN
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2022-03-31 13:19:48 +02:00 |
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folkert van heusden
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5e9bcf8785
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fixes & !put_result
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2022-03-31 13:01:26 +02:00 |
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folkert van heusden
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dd437e65db
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ASL: do not extend sign
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2022-03-31 10:21:27 +02:00 |
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folkert van heusden
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1b155473d2
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byte mode instructions: fixes for mode == 0
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2022-03-31 09:49:52 +02:00 |
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folkert van heusden
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40d22393db
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CLRB fix
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2022-03-30 23:21:01 +02:00 |
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folkert van heusden
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493f295efc
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MUL: fix for odd register number
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2022-03-27 22:49:58 +02:00 |
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folkert van heusden
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fd95246f2f
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restructured
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2022-03-27 13:17:28 +02:00 |
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folkert van heusden
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9226f63eda
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JSR disassembly
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2022-03-27 12:51:47 +02:00 |
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folkert van heusden
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ca39aafe0b
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clean-up & throw exception during invalid memory/bus access
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2022-03-27 12:40:29 +02:00 |
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folkert van heusden
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7ad20f2705
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make sure only the trap/interrupt vectors are retrieved from kernel space, not general reads
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2022-03-27 04:29:36 +02:00 |
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folkert van heusden
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fa8d6d9f9d
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illegal instruction trap no longer stops emulation
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2022-03-26 20:44:09 +01:00 |
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folkert van heusden
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ebaf6393c3
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allow bus to trap for an invalid address
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2022-03-26 12:20:18 +01:00 |
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folkert van heusden
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e3213c49d7
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debug
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2022-03-26 11:57:29 +01:00 |
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folkert van heusden
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8612d99d36
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code clean-up
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2022-03-25 22:35:26 +01:00 |
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folkert van heusden
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73027de4d2
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cleaner
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2022-03-25 17:35:45 +01:00 |
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folkert van heusden
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3248df3e87
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RESET
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2022-03-25 09:59:40 +01:00 |
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folkert van heusden
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21221e1635
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made sure SWAB implementation no longer confuses programmer
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2022-03-24 22:29:04 +01:00 |
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folkert van heusden
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1443b62fcc
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Some 8bit commands *do* only update the lower 8 bit while not changing
the 8 upper bits.
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2022-03-24 21:43:14 +01:00 |
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folkert van heusden
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ac96e9afe5
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ASH/ASHC fix (another)
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2022-03-24 21:03:27 +01:00 |
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folkert van heusden
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1095e4823b
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another ASH/ASHC fix
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2022-03-24 18:54:24 +01:00 |
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folkert van heusden
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6951e1b520
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register access fix
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2022-03-24 18:31:26 +01:00 |
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folkert van heusden
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15fd3411a5
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code clean-up
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2022-03-24 16:47:18 +01:00 |
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folkert van heusden
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b9ec3ec77f
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BIT fix
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2022-03-24 16:35:31 +01:00 |
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folkert van heusden
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85327f0d6b
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DIV, JMP & RTS fix
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2022-03-24 16:17:35 +01:00 |
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folkert van heusden
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449817aa52
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DIV fix
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2022-03-24 13:34:40 +01:00 |
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folkert van heusden
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42fe341091
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micro opt for div
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2022-03-23 17:52:59 +01:00 |
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folkert van heusden
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e021604099
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tweaks
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2022-03-23 11:37:58 +01:00 |
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folkert van heusden
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4d98f6557e
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interrupt priority levels
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2022-03-23 09:50:03 +01:00 |
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folkert van heusden
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899af8e5d5
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MFPS flags & extend sign
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2022-03-22 21:42:47 +01:00 |
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folkert van heusden
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468983b0b5
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MFPS flags
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2022-03-22 21:40:27 +01:00 |
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folkert van heusden
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86e225215a
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sign => SIGN for unsigned signedness check
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2022-03-22 21:32:12 +01:00 |
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folkert van heusden
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04eb498f88
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use from previous-addresspace was not implemented
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2022-03-22 13:15:59 +01:00 |
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folkert van heusden
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42c065056c
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disassembler
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2022-03-22 12:16:35 +01:00 |
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folkert van heusden
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e318f2d4f6
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debug log
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2022-03-22 11:44:42 +01:00 |
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folkert van heusden
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a4648d8434
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MTPI/MTPD fix
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2022-03-21 20:42:06 +01:00 |
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folkert van heusden
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f59fb51b38
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less shifting & orring in get/setRegister
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2022-03-21 14:41:22 +01:00 |
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folkert van heusden
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ee6f4904c3
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unused variable
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2022-03-21 12:20:50 +01:00 |
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folkert van heusden
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1fbb3cbd14
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SPL causes only on the 11/60 a trap, not on the 11/70
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2022-03-20 23:24:38 +01:00 |
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folkert van heusden
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6ff0e6a0f3
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testcases fixes
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2022-03-20 22:52:10 +01:00 |
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folkert van heusden
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3178ec4cd2
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ASH modifies the register
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2022-03-20 22:37:54 +01:00 |
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folkert van heusden
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9a24625b35
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micro-opt, helpful comments, trap 10 when unknown instruction
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2022-03-20 21:52:22 +01:00 |
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folkert van heusden
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e4432448f1
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sign extend during shift
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2022-03-20 21:39:22 +01:00 |
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folkert van heusden
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e12e97341b
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restructured ASHC & limit to -32...31
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2022-03-20 21:28:12 +01:00 |
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folkert van heusden
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2ac02d91c2
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restructured ASH & limit to -32...31
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2022-03-20 21:20:15 +01:00 |
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folkert van heusden
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ca213298bb
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does ASHC clear carry when shift number is 0?
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2022-03-20 20:58:32 +01:00 |
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folkert van heusden
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9c8a9f349d
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cleanup of cpu::double_operand_instructions
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2022-03-20 20:55:28 +01:00 |
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folkert van heusden
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1ad1b9aa0a
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cleanup of cpu::single_operand_instructions
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2022-03-20 20:52:43 +01:00 |
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