From c4f9423a4c1f53522c808db68ea032bed7088e9d Mon Sep 17 00:00:00 2001
From: Neil Webber <neil@webber.com>
Date: Fri, 3 May 2024 07:48:18 -0500
Subject: [PATCH] clean up

---
 unibus.py | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/unibus.py b/unibus.py
index a82d104..e65c241 100644
--- a/unibus.py
+++ b/unibus.py
@@ -139,7 +139,7 @@ class UNIBUS:
     # ignore them). Devices can, of course, just raise the traps themselves.
     def illegal_cycle(self, addr, /, *, cycle=BusCycle.WRITE16, msg=None):
         if msg is None:
-            msg =f"Illegal cycle ({cycle}) at {oct(addr)}"
+            msg = f"Illegal cycle ({cycle}) at {oct(addr)}"
         self.cpu.logger.info(msg)
         raise PDPTraps.AddressError(cpuerr=self.cpu.CPUERR_BITS.UNIBUS_TIMEOUT)