more cleanup
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5b55a5b206
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1 changed files with 32 additions and 30 deletions
62
pdptests.py
62
pdptests.py
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@ -681,15 +681,17 @@ class TestMethods(unittest.TestCase):
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#
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#
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# For UP:
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# For UP:
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# using ED=0 (segments grow upwards), create a user DSPACE mapping
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# using ED=0 (segments grow upwards), create a user DSPACE mapping
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# where segment zero has length 0, segment 1 has 16 words,
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# where segment zero has length ("PLF") 0, segment 1 has length 1,
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# segment 2 has 32 ... etc and then check that valid addresses
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# etc... and then check that valid addresses map correctly and
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# map correctly and invalid ones fault correctly.
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# invalid ones fault correctly. Note a subtle semantic of the PDP
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# page length field: to be invalid (in an upward growing segment)
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# the address has to be GREATER than the computed block number.
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# Thus a length of "zero" still has 1 valid block of words.
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#
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#
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# For DOWN:
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# For DOWN:
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# using ED=1 ("dirbit" = 0o10) segments grow downwards, with the
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# using ED=1 ("dirbit" = 0o10) segments grow downwards, with the
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# same 0, 16, 32, .. progression. So segment 0 still has 0
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# same 0, 1, 2 .. progression (of valid "blocks") but they
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# valid words, segment 1 ENDS with 16 valid words, segment 2
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# are at the end of the segments.
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# ENDS with 32 valid words, etc.
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# this programs the MMU as above, according to dirbit (0 = up)
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# this programs the MMU as above, according to dirbit (0 = up)
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# NOTE: the physical memory is filled in elsewhere
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# NOTE: the physical memory is filled in elsewhere
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@ -745,21 +747,23 @@ class TestMethods(unittest.TestCase):
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for dirbit in (0o00, 0o10):
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for dirbit in (0o00, 0o10):
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p = self.make_pdp()
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p = self.make_pdp()
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# trap handler for MMU faults; puts 0o666 into r5 and halts
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# trap handler for MMU faults; puts 0o666 into r5 aand halts
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trap_h_location = 0o3000
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trap_h_location = 0o3000
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with ASM() as th:
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with ASM() as th:
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th.mov(0o666, 'r5')
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th.mov(0o666, 'r5')
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trap0_offs = th.label('Trap0')
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th.halt()
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th.halt()
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th.clr('(sp)') # just know the loop starts at zero
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th.rtt()
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self.loadphysmem(p, th.instructions(), trap_h_location)
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self.loadphysmem(p, th.instructions(), trap_h_location)
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# poke the trap handler vector (250)
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# poke the trap handler vector (250)
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self.loadphysmem(p, [trap_h_location, 0], 0o250)
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pcps = [trap_h_location, 0]
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# the trap handler for "trap 0" is just a halt (which is a zero)
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self.loadphysmem(p, pcps, 0o250)
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# it resides at 0o3100
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# same for the "trap 0" handler but skip to trap0_offs
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self.loadphysmem(p, [0], 0o3100)
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pcps[0] += (trap0_offs*2)
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self.loadphysmem(p, [0o3100, 0], 0o34)
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self.loadphysmem(p, pcps, 0o34)
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# set the physical memory that will be mapped to user D
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# set the physical memory that will be mapped to user D
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# space to this pattern so the test can verify the mapping
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# space to this pattern so the test can verify the mapping
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@ -778,36 +782,35 @@ class TestMethods(unittest.TestCase):
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# mapping is correct)
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# mapping is correct)
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user_phys_ISPACEaddr = 0o20000
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user_phys_ISPACEaddr = 0o20000
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with ASM() as u:
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with ASM() as u:
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# this value never occurs in user DSPACE (because every
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# word location has been written with an even value)
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# so this is a sentinel for whether the read happened
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user_noval = 1
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u.mov(user_noval, 'r1')
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u.clr('r5') # sentinel becomes 0o42 or 0o666
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u.mov('(r0)+', 'r1')
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u.mov('(r0)+', 'r1')
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u.mov(0o42, 'r5')
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u.mov(0o42, 'r5')
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u.trap(0)
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u.trap(0)
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u.halt() # never get here, this is illegal
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self.loadphysmem(p, u.instructions(), user_phys_ISPACEaddr)
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self.loadphysmem(p, u.instructions(), user_phys_ISPACEaddr)
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a = mmusetup(dirbit)
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a = mmusetup(dirbit)
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a.bis(1, a.ptr(cn.MMR3)) # enable I/D sep just for USER
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a.bis(1, a.ptr(cn.MMR3)) # enable I/D sep just for USER
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a.mov(1, a.ptr(cn.MMR0)) # turn on MMU
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a.mov(1, a.ptr(cn.MMR0)) # turn on MMU
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a.halt()
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a.mov(0o20000, 'sp') # establish kernel stack
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testcase_offs = a.label('TESTCASE') * 2
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# this is the kernel code that will be run per-test case
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a.mov(0o20000, 'sp') # reestablish stack each time
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a.clr('r5') # sentinel becomes 0o42 or 0o666
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# this value never occurs in user DSPACE (because every
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# word location has been written with an even value)
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# so this is a sentinel for whethe the read happened
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user_noval = 1
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a.mov(user_noval, 'r1')
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a.mov(0o140340, '-(sp)') # push user-ish PSW to K stack
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a.mov(0o140340, '-(sp)') # push user-ish PSW to K stack
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a.clr('-(sp)') # new user PC = 0
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a.clr('-(sp)') # new user PC = 0
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a.clr('r0') # user test expects r0 to start zero
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a.halt()
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rtt_offs = a.label('RTT') * 2
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a.rtt()
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a.rtt()
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addr = 0o4000
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addr = 0o4000
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self.loadphysmem(p, a.instructions(), addr)
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self.loadphysmem(p, a.instructions(), addr)
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p.run(pc=addr) # note HALT prior to testcase_offs
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p.run(pc=addr) # note HALT prior to RTT
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def good(dirbit, segno, o):
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def good(dirbit, segno, o):
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if dirbit:
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if dirbit:
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@ -818,9 +821,8 @@ class TestMethods(unittest.TestCase):
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return o <= maxvalidoffset
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return o <= maxvalidoffset
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for segno in range(8):
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for segno in range(8):
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p.r[0] = segno * 8192
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for o in range(4096):
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for o in range(4096):
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p.run(pc=addr + testcase_offs)
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p.run() # picks up at rtt pc
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physval = (checksum -
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physval = (checksum -
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((segno * 8192) + (o * 2))) & 0o177777
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((segno * 8192) + (o * 2))) & 0o177777
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if good(dirbit, segno, o*2):
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if good(dirbit, segno, o*2):
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