From fbc66608dca7ee5fe7c05d81fcba30881a6e3582 Mon Sep 17 00:00:00 2001
From: Neil Webber <neil@webber.com>
Date: Wed, 1 Nov 2023 09:19:09 -0500
Subject: [PATCH] comment cleanups

---
 machine.py | 5 ++---
 mmu.py     | 1 -
 2 files changed, 2 insertions(+), 4 deletions(-)

diff --git a/machine.py b/machine.py
index 07c114a..bb0dcf1 100644
--- a/machine.py
+++ b/machine.py
@@ -930,14 +930,13 @@ class PDP1170(PDP11):
         # could test if necessary but it's just easier to do this every time
         self._syncregs()           # in case any mode/regset changes
 
-        # prevent UNDEFINED_MODE from entering the PSW
+        # prevent UNDEFINED_MODE from entering the PSW (current mode)
         m = (value >> 14) & 3
         if m == self.UNDEFINED_MODE:
             raise PDPTraps.ReservedInstruction
-
         self.psw_curmode = m
 
-        # prevent UNDEFINED_MODE from entering the PSW
+        # prevent UNDEFINED_MODE from entering the PSW (previous mode)
         m = (value >> 12) & 3
         if m == self.UNDEFINED_MODE:
             raise PDPTraps.ReservedInstruction
diff --git a/mmu.py b/mmu.py
index 0f71a93..2a49c3a 100644
--- a/mmu.py
+++ b/mmu.py
@@ -266,7 +266,6 @@ class MemoryMgmt:
 
         NOTE: raises PDPTraps.MMU for untranslatable addresses
         NOTE: If not invis, updates A/W bits & sets straps as needed.
-                * Raises traps, updates A/W bits, & sets straps as needed.
         NOTE: 'reading' MUST be True or False, not anything else.
         """