From 0195bbda4b552531de527873734fe8b11f50c193 Mon Sep 17 00:00:00 2001
From: Mark Pizzolato <mark@infocomm.com>
Date: Thu, 30 May 2019 01:51:52 -0700
Subject: [PATCH] TIMER: Fix missing catchup ticks for VAX simulators when
 idling

- MicroVAX I, II and 3900 don't have a DONE bit in the clock status
  register, so sim_rtcn_tick_ack() wasn't being called to acknowledge
  clock ticks.
- Timer catchup tick criteria didn't work unless the host had a slow
  clock tick.

As discussed in #705
---
 VAX/vax610_stddev.c | 2 +-
 VAX/vax630_stddev.c | 2 +-
 VAX/vax_stddev.c    | 2 +-
 sim_timer.c         | 8 +++++---
 4 files changed, 8 insertions(+), 6 deletions(-)

diff --git a/VAX/vax610_stddev.c b/VAX/vax610_stddev.c
index cf0d119e..7cd8c71c 100644
--- a/VAX/vax610_stddev.c
+++ b/VAX/vax610_stddev.c
@@ -248,7 +248,7 @@ void iccs_wr (int32 data)
 {
 if ((data & CSR_IE) == 0)
     CLR_INT (CLK);
-if ((clk_csr & CSR_DONE) && (data & CSR_DONE))          /* Interrupt Acked? */
+if (data & CSR_DONE)                                    /* Interrupt Acked? */
     sim_rtcn_tick_ack (20, TMR_CLK);                    /* Let timers know */
 clk_csr = (clk_csr & ~CLKCSR_RW) | (data & CLKCSR_RW);
 return;
diff --git a/VAX/vax630_stddev.c b/VAX/vax630_stddev.c
index b0601a6a..25f70c1c 100644
--- a/VAX/vax630_stddev.c
+++ b/VAX/vax630_stddev.c
@@ -226,7 +226,7 @@ void iccs_wr (int32 data)
 {
 if ((data & CSR_IE) == 0)
     CLR_INT (CLK);
-if ((clk_csr & CSR_DONE) && (data & CSR_DONE))          /* Interrupt Acked? */
+if (data & CSR_DONE)                                    /* Interrupt Acked? */
     sim_rtcn_tick_ack (20, TMR_CLK);                    /* Let timers know */
 clk_csr = (clk_csr & ~CLKCSR_RW) | (data & CLKCSR_RW);
 return;
diff --git a/VAX/vax_stddev.c b/VAX/vax_stddev.c
index 3a840a40..aeabd9bf 100644
--- a/VAX/vax_stddev.c
+++ b/VAX/vax_stddev.c
@@ -300,7 +300,7 @@ void iccs_wr (int32 data)
 {
 if ((data & CSR_IE) == 0)
     CLR_INT (CLK);
-if ((clk_csr & CSR_DONE) && (data & CSR_DONE))                                    /* Interrupt Acked? */
+if (data & CSR_DONE)                                    /* Interrupt Acked? */
     sim_rtcn_tick_ack (20, TMR_CLK);                    /* Let timers know */
 clk_csr = (clk_csr & ~CLKCSR_RW) | (data & CLKCSR_RW);
 return;
diff --git a/sim_timer.c b/sim_timer.c
index 39d9f617..4b8e4afd 100644
--- a/sim_timer.c
+++ b/sim_timer.c
@@ -1548,7 +1548,7 @@ if ((!sim_idle_enab)                             ||     /* idling disabled */
     sim_interval -= sin_cyc;
     return FALSE;
     }
-if (_rtcn_tick_catchup_check(tmr, 0)) {
+if (_rtcn_tick_catchup_check (tmr, -1)) {
     sim_debug (DBG_CAL, &sim_timer_dev, "sim_idle(tmr=%d, sin_cyc=%d) - rescheduling catchup tick for %s\n", tmr, sin_cyc, sim_uname (sim_clock_unit[tmr]));
     sim_interval -= sin_cyc;
     return FALSE;
@@ -2104,6 +2104,9 @@ clock_gettime (CLOCK_REALTIME, now);
  *
  * catchup ticks are only scheduled (eligible to happen) under these 
  * conditions after at least one tick has been acknowledged.
+ *
+ * The clock tick UNIT that will be scheduled to run for catchup ticks
+ * must be specified with sim_rtcn_init_unit().
  */
 
 /* _rtcn_tick_catchup_check - idle simulator until next event or for specified interval
@@ -2120,8 +2123,7 @@ static t_bool _rtcn_tick_catchup_check (int32 tmr, int32 time)
 if ((!sim_catchup_ticks) || 
     ((tmr < 0) || (tmr >= SIM_NTIMERS)))
     return FALSE;
-if ((rtc_hz[tmr] > sim_os_tick_hz) &&           /* faster than host tick */
-    (!rtc_clock_catchup_eligible[tmr]) &&       /* not eligible yet? */
+if ((!rtc_clock_catchup_eligible[tmr]) &&       /* not eligible yet? */
     (time != -1)) {                             /* called from ack? */
     rtc_clock_catchup_base_time[tmr] = sim_timenow_double();
     rtc_clock_ticks_tot[tmr] += rtc_clock_ticks[tmr];