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IMLAC: Add breakpoints for memory reads and writes.

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This commit is contained in:
Lars Brinkhoff 2023-04-26 19:29:25 +02:00 • committed by Paul Koning
parent 1ea82bd127
commit 021413a2d7
3 changed files with 16 additions and 8 deletions
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20
imlac/imlac_cpu.c
View file

@ -57,7 +57,7 @@ static uint16 ION;
/* ROM state. */ /* ROM state. */
static int rom_type = ROM_NONE; static int rom_type = ROM_NONE;
static int halt; static t_stat stop_reason;
uint16 memmask = 017777; uint16 memmask = 017777;
typedef struct { typedef struct {
@ -175,12 +175,17 @@ static void memaddr (uint16 addr)
static void memrd (void) static void memrd (void)
{ {
MB = M[MA]; MB = M[MA];
if (sim_brk_summ && sim_brk_test(MA, SWMASK('R')))
stop_reason = STOP_DBKPT;
} }
static void memwr (void) static void memwr (void)
{ {
if (rom_type == ROM_NONE || (MA & 0177740) != 040) if (rom_type == ROM_NONE || (MA & 0177740) != 040) {
M[MA] = MB; M[MA] = MB;
if (sim_brk_summ && sim_brk_test(MA, SWMASK('W')))
stop_reason = STOP_DBKPT;
}
} }
static void cpu_class1 (uint16 insn) static void cpu_class1 (uint16 insn)
@ -200,7 +205,8 @@ static void cpu_class1 (uint16 insn)
AC |= DS; AC |= DS;
} }
halt = !(insn & 0100000); if ((insn & 0100000) == 0)
stop_reason = STOP_HALT;
} }
static void cpu_ral (int n) static void cpu_ral (int n)
@ -443,7 +449,7 @@ t_stat sim_instr (void)
if ((reason = build_dev_tab ()) != SCPE_OK) if ((reason = build_dev_tab ()) != SCPE_OK)
return reason; return reason;
halt = 0; stop_reason = 0;
for (;;) { for (;;) {
AIO_CHECK_EVENT; AIO_CHECK_EVENT;
@ -470,8 +476,8 @@ t_stat sim_instr (void)
return SCPE_STEP; return SCPE_STEP;
} }
if (halt) if (stop_reason)
return STOP_HALT; return stop_reason;
if (ion_delay && --ion_delay == 0) { if (ion_delay && --ion_delay == 0) {
sim_debug (DBG_IRQ, &irq_dev, "Interrupts on\n"); sim_debug (DBG_IRQ, &irq_dev, "Interrupts on\n");
@ -569,7 +575,7 @@ static t_bool cpu_is_pc_a_subroutine_call (t_addr **ret_addrs)
static t_stat static t_stat
cpu_reset (DEVICE *dptr) cpu_reset (DEVICE *dptr)
{ {
sim_brk_types = SWMASK('D') | SWMASK('E'); sim_brk_types = SWMASK('D') | SWMASK('E') | SWMASK('R') | SWMASK('W');
sim_brk_dflt = SWMASK ('E'); sim_brk_dflt = SWMASK ('E');
sim_vm_is_subroutine_call = &cpu_is_pc_a_subroutine_call; sim_vm_is_subroutine_call = &cpu_is_pc_a_subroutine_call;
return SCPE_OK; return SCPE_OK;

3
imlac/imlac_defs.h
View file

@ -33,7 +33,8 @@
#define STOP_HALT 1 #define STOP_HALT 1
#define STOP_IBKPT 2 #define STOP_IBKPT 2
#define STOP_ACCESS 3 #define STOP_DBKPT 3
#define STOP_ACCESS 4
#define FLAG_PTR 010000 #define FLAG_PTR 010000
#define FLAG_PTP 000400 #define FLAG_PTP 000400

1
imlac/imlac_sys.c
View file

@ -57,6 +57,7 @@ const char *sim_stop_messages[SCPE_BASE] = {
"Unknown error", "Unknown error",
"HALT instruction", "HALT instruction",
"Breakpoint", "Breakpoint",
"Watchpoint",
"Invalid access", "Invalid access",
}; };