All VAX: Lower overhead when idling.
The original idling model called sim_idle() within the context of a scheduled event running on the CPU unit. The overhead of scheduling and the related dispatch serve no specific purpose. Meanwhile, the 'work' involved in determing if idling is possible is about equivalent to the work of executing an additional instruction. Therefore sim_idle is invoked with an argument which causes the sim_interval to be adjusted by 1 on each call that doesn't actually perform an idle sleep. This adjustment keeps the calibrated instruction execution rate consistent with other purely non-idle instruction mixes.
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1 changed files with 3 additions and 13 deletions
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@ -319,7 +319,6 @@ static SIM_INLINE int32 get_istr (int32 lnt, int32 acc);
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int32 ReadOcta (int32 va, int32 *opnd, int32 j, int32 acc);
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t_bool cpu_show_opnd (FILE *st, InstHistory *h, int32 line);
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t_stat cpu_show_hist_records (FILE *st, t_bool do_header, int32 start, int32 count);
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t_stat cpu_idle_svc (UNIT *uptr);
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void cpu_idle (void);
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/* CPU data structures
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@ -331,7 +330,7 @@ void cpu_idle (void);
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*/
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UNIT cpu_unit = {
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UDATA (&cpu_idle_svc, UNIT_FIX|UNIT_BINK, INITMEMSIZE)
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UDATA (NULL, UNIT_FIX|UNIT_BINK, INITMEMSIZE)
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};
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const char *psl_modes[] = {"K", "E", "S", "U"};
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@ -3176,20 +3175,11 @@ opnd[j++] = Read (va + 12, L_LONG, acc);
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return j;
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}
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/* Schedule idle before the next instruction */
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/* Idle before the next instruction */
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void cpu_idle (void)
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{
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sim_activate (&cpu_unit, 0);
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return;
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}
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/* Idle service */
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t_stat cpu_idle_svc (UNIT *uptr)
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{
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sim_idle (TMR_CLK, TRUE);
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return SCPE_OK;
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sim_idle (TMR_CLK, 1);
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}
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/* Reset */
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