diff --git a/VAX/vax730_stddev.c b/VAX/vax730_stddev.c
index 0f30c54e..62946f17 100644
--- a/VAX/vax730_stddev.c
+++ b/VAX/vax730_stddev.c
@@ -666,7 +666,8 @@ if ((val & TMR_CSR_RUN) == 0) {                         /* clearing run? */
         }
     sim_cancel (&tmr_unit);                             /* cancel timer */
     }
-if ((tmr_iccs & CSR_DONE) && (val & CSR_DONE))          /* Interrupt Acked? */
+if ((tmr_iccs & CSR_DONE) && (val & CSR_DONE) &&        /* Interrupt Acked? */
+    (10000 == (tmr_nicr) ? (~tmr_nicr + 1) : 0xFFFFFFFF))/* of 10ms tick */
     sim_rtcn_tick_ack (20, TMR_CLK);                    /* Let timers know */
 tmr_iccs = tmr_iccs & ~(val & TMR_CSR_W1C);             /* W1C csr */
 tmr_iccs = (tmr_iccs & ~TMR_CSR_WR) |                   /* new r/w */
@@ -762,7 +763,10 @@ void tmr_sched (uint32 nicr)
 uint32 usecs = (nicr) ? (~nicr + 1) : 0xFFFFFFFF;
 
 sim_debug (TMR_DB_SCHED, &tmr_dev, "tmr_sched(nicr=0x%08X-usecs=0x%08X) - tps=%d\n", nicr, usecs, clk_tps);
-sim_activate_after (&tmr_unit, usecs);
+if (usecs == 10000)
+    sim_clock_coschedule_tmr (&tmr_unit, TMR_CLK, 1);
+else
+    sim_activate_after (&tmr_unit, usecs);
 }
 
 /* 100Hz TODR reset */
diff --git a/VAX/vax750_stddev.c b/VAX/vax750_stddev.c
index 824a551a..2bb994de 100644
--- a/VAX/vax750_stddev.c
+++ b/VAX/vax750_stddev.c
@@ -662,7 +662,8 @@ if ((val & TMR_CSR_RUN) == 0) {                         /* clearing run? */
         }
     sim_cancel (&tmr_unit);                             /* cancel timer */
     }
-if ((tmr_iccs & CSR_DONE) && (val & CSR_DONE))          /* Interrupt Acked? */
+if ((tmr_iccs & CSR_DONE) && (val & CSR_DONE) &&        /* Interrupt Acked? */
+    (10000 == (tmr_nicr) ? (~tmr_nicr + 1) : 0xFFFFFFFF))/* of 10ms tick */
     sim_rtcn_tick_ack (20, TMR_CLK);                    /* Let timers know */
 tmr_iccs = tmr_iccs & ~(val & TMR_CSR_W1C);             /* W1C csr */
 tmr_iccs = (tmr_iccs & ~TMR_CSR_WR) |                   /* new r/w */
@@ -758,7 +759,10 @@ void tmr_sched (uint32 nicr)
 uint32 usecs = (nicr) ? (~nicr + 1) : 0xFFFFFFFF;
 
 sim_debug (TMR_DB_SCHED, &tmr_dev, "tmr_sched(nicr=0x%08X-usecs=0x%08X) - tps=%d\n", nicr, usecs, clk_tps);
-sim_activate_after (&tmr_unit, usecs);
+if (usecs == 10000)
+    sim_clock_coschedule_tmr (&tmr_unit, TMR_CLK, 1);
+else
+    sim_activate_after (&tmr_unit, usecs);
 }
 
 /* 100Hz TODR reset */
diff --git a/VAX/vax780_stddev.c b/VAX/vax780_stddev.c
index 8a4ea5cf..28fde828 100644
--- a/VAX/vax780_stddev.c
+++ b/VAX/vax780_stddev.c
@@ -632,7 +632,8 @@ if ((val & TMR_CSR_RUN) == 0) {                         /* clearing run? */
         }
     sim_cancel (&tmr_unit);                             /* cancel timer */
     }
-if ((tmr_iccs & CSR_DONE) && (val & CSR_DONE))          /* Interrupt Acked? */
+if ((tmr_iccs & CSR_DONE) && (val & CSR_DONE) &&        /* Interrupt Acked? */
+    (10000 == (tmr_nicr) ? (~tmr_nicr + 1) : 0xFFFFFFFF))/* of 10ms tick */
     sim_rtcn_tick_ack (20, TMR_CLK);                    /* Let timers know */
 tmr_iccs = tmr_iccs & ~(val & TMR_CSR_W1C);             /* W1C csr */
 tmr_iccs = (tmr_iccs & ~TMR_CSR_WR) |                   /* new r/w */
@@ -728,7 +729,10 @@ void tmr_sched (uint32 nicr)
 double usecs = (nicr) ? (double)(~nicr + 1) : (double)0x100000000LL;
 
 sim_debug (TMR_DB_SCHED, &tmr_dev, "tmr_sched(nicr=0x%08X-usecs=%.0f) - tps=%d\n", nicr, usecs, clk_tps);
-sim_activate_after_d (&tmr_unit, usecs);
+if (usecs == 10000.0)
+    sim_clock_coschedule_tmr (&tmr_unit, TMR_CLK, 1);
+else
+    sim_activate_after_d (&tmr_unit, usecs);
 }
 
 /* 100Hz TODR reset */
diff --git a/VAX/vax820_stddev.c b/VAX/vax820_stddev.c
index 7d1839b4..1a94f0db 100644
--- a/VAX/vax820_stddev.c
+++ b/VAX/vax820_stddev.c
@@ -661,7 +661,8 @@ if ((val & TMR_CSR_RUN) == 0) {                         /* clearing run? */
         tmr_icr = icr_rd ();                            /* update itr */
     sim_cancel (&tmr_unit);                             /* cancel timer */
     }
-if (val & CSR_DONE)                                     /* Interrupt Acked? */
+if ((val & CSR_DONE) &&                                 /* Interrupt Acked? */
+    (10000 == (tmr_nicr) ? (~tmr_nicr + 1) : 0xFFFFFFFF))/* of 10ms tick */
     sim_rtcn_tick_ack (20, TMR_CLK);                    /* Let timers know */
 tmr_iccs = tmr_iccs & ~(val & TMR_CSR_W1C);             /* W1C csr */
 tmr_iccs = (tmr_iccs & ~TMR_CSR_WR) |                   /* new r/w */
@@ -757,7 +758,10 @@ void tmr_sched (uint32 nicr)
 uint32 usecs = (nicr) ? (~nicr + 1) : 0xFFFFFFFF;
 
 sim_debug (TMR_DB_SCHED, &tmr_dev, "tmr_sched(nicr=0x%08X-usecs=0x%08X) - tps=%d\n", nicr, usecs, clk_tps);
-sim_activate_after (&tmr_unit, usecs);
+if (usecs == 10000)
+    sim_clock_coschedule_tmr (&tmr_unit, TMR_CLK, 1);
+else
+    sim_activate_after (&tmr_unit, usecs);
 }
 
 /* 100Hz TODR reset */
diff --git a/VAX/vax860_stddev.c b/VAX/vax860_stddev.c
index 713fcd9f..f4962167 100644
--- a/VAX/vax860_stddev.c
+++ b/VAX/vax860_stddev.c
@@ -768,7 +768,8 @@ if ((val & TMR_CSR_RUN) == 0) {                         /* clearing run? */
         }
     sim_cancel (&tmr_unit);                             /* cancel timer */
     }
-if ((tmr_iccs & CSR_DONE) && (val & CSR_DONE))          /* Interrupt Acked? */
+if ((tmr_iccs & CSR_DONE) && (val & CSR_DONE) &&        /* Interrupt Acked? */
+    (10000 == (tmr_nicr) ? (~tmr_nicr + 1) : 0xFFFFFFFF))/* of 10ms tick */
     sim_rtcn_tick_ack (20, TMR_CLK);                    /* Let timers know */
 tmr_iccs = tmr_iccs & ~(val & TMR_CSR_W1C);             /* W1C csr */
 tmr_iccs = (tmr_iccs & ~TMR_CSR_WR) |                   /* new r/w */
@@ -864,7 +865,10 @@ void tmr_sched (uint32 nicr)
 uint32 usecs = (nicr) ? (~nicr + 1) : 0xFFFFFFFF;
 
 sim_debug (TMR_DB_SCHED, &tmr_dev, "tmr_sched(nicr=0x%08X-usecs=0x%08X) - tps=%d\n", nicr, usecs, clk_tps);
-sim_activate_after (&tmr_unit, usecs);
+if (usecs == 10000)
+    sim_clock_coschedule_tmr (&tmr_unit, TMR_CLK, 1);
+else
+    sim_activate_after (&tmr_unit, usecs);
 }
 
 /* 100Hz TODR reset */