folkert/simh-testsetgenerator
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Compiler suggested cleanups.

Browse source 
Mostly silencing noise warnings, but bugs were found in sim_console.c and pdp11_dmc.c
This commit is contained in:
Mark Pizzolato 2014-02-14 17:07:45 -08:00
parent dcbb89499e
commit 02cb5c2d88
44 changed files with 520 additions and 515 deletions
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8
PDP10/pdp10_lp20.c
View file

@ -450,7 +450,7 @@ switch ((pa >> 1) & 07) { /* case on PA<3:1> */
case 05: /* LPRDAT */ case 05: /* LPRDAT */
*data = lprdat & RDAT_MASK; *data = lprdat & RDAT_MASK;
if (evenbits(*data)) if (evenbits((int16)*data))
*data |= TX_PARITY; *data |= TX_PARITY;
if (((lprdat & TX_PARITY) == 0) && (lpcsa & CSA_PAR)) /* Data invalid & parity checked? */ if (((lprdat & TX_PARITY) == 0) && (lpcsa & CSA_PAR)) /* Data invalid & parity checked? */
*data ^= TX_PARITY; /* Invalid: Provide bad parity */ *data ^= TX_PARITY; /* Invalid: Provide bad parity */
@ -531,7 +531,7 @@ switch ((pa >> 1) & 07) { /* case on PA<3:1> */
if (access == WRITEB) if (access == WRITEB)
data = (pa & 1)? (lprdat & 0377) | (data << 8): (lprdat & ~0377) | data; data = (pa & 1)? (lprdat & 0377) | (data << 8): (lprdat & ~0377) | data;
lprdat = data & RDAT_MASK; lprdat = data & RDAT_MASK;
txram[lpcbuf & TX_AMASK] = lprdat | TX_PARITY; /* load RAM and mark valid */ txram[lpcbuf & TX_AMASK] = (int16)(lprdat | TX_PARITY);/* load RAM and mark valid */
break; break;
case 06: /* LPCOLC/LPCBUF */ case 06: /* LPCOLC/LPCBUF */
@ -671,7 +671,7 @@ for (i = 0, cont = TRUE; (i < tbc) && cont; ba++, i++) {
} }
else if (dvld == 3) { /* odd state? */ else if (dvld == 3) { /* odd state? */
if (dvlnt < DV_SIZE) { if (dvlnt < DV_SIZE) {
davfu[dvlnt++] = dvld_hold | ((lpcbuf & DV_DMASK) << 6); davfu[dvlnt++] = (int16)(dvld_hold | ((lpcbuf & DV_DMASK) << 6));
dvld = 2; dvld = 2;
} }
else { else {
@ -1036,7 +1036,7 @@ if (fname)
*fname++ = '\0'; *fname++ = '\0';
for (cp = cptr; *cp; cp++) for (cp = cptr; *cp; cp++)
*cp = toupper (*cp); *cp = (char)toupper (*cp);
if (strncmp (cptr, "DAVFU", strlen(cptr)) == 0) { /* set lp20 vfutype=davfu: Switch to DAVFU, empty */ if (strncmp (cptr, "DAVFU", strlen(cptr)) == 0) { /* set lp20 vfutype=davfu: Switch to DAVFU, empty */
if (fname && *fname) if (fname && *fname)

2
PDP10/pdp10_mdfp.c
View file

@ -728,7 +728,7 @@ if (r->sign) {
r->fhi = r->fhi | FP_UCRY; r->fhi = r->fhi | FP_UCRY;
else { else {
r->exp = r->exp + 1; r->exp = r->exp + 1;
r->fhi = FP_UCRY | FP_UNORM; r->fhi = (t_uint64)(FP_UCRY | FP_UNORM);
} }
} }
else { /* abs frac */ else { /* abs frac */

22
PDP10/pdp10_rp.c
View file

@ -372,7 +372,7 @@ t_stat rp_reset (DEVICE *dptr);
t_stat rp_boot (int32 unitno, DEVICE *dptr); t_stat rp_boot (int32 unitno, DEVICE *dptr);
t_stat rp_attach (UNIT *uptr, char *cptr); t_stat rp_attach (UNIT *uptr, char *cptr);
t_stat rp_detach (UNIT *uptr); t_stat rp_detach (UNIT *uptr);
void set_rper (int32 flag, int32 drv); void set_rper (int16 flag, int32 drv);
void update_rpcs (int32 flags, int32 drv); void update_rpcs (int32 flags, int32 drv);
void rp_go (int32 drv, int32 fnc); void rp_go (int32 drv, int32 fnc);
t_stat rp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc); t_stat rp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
@ -633,7 +633,7 @@ if (reg_in_drive[j] && sim_is_active (uptr) && (uptr->flags & UNIT_UTS)) { /* un
update_rpcs (0, drv); update_rpcs (0, drv);
return SCPE_OK; return SCPE_OK;
} }
rmhr[drv] = data; rmhr[drv] = (uint16)data;
switch (j) { /* decode PA<5:1> */ switch (j) { /* decode PA<5:1> */
@ -685,7 +685,7 @@ switch (j) { /* decode PA<5:1> */
case 003: /* RPDA */ case 003: /* RPDA */
if ((access == WRITEB) && (PA & 1)) if ((access == WRITEB) && (PA & 1))
data = data << 8; data = data << 8;
rpda[drv] = data & ~DA_MBZ; rpda[drv] = (uint16)(data & ~DA_MBZ);
break; break;
case 004: /* RPCS2 */ case 004: /* RPCS2 */
@ -706,7 +706,7 @@ switch (j) { /* decode PA<5:1> */
case 006: /* RPER1 */ case 006: /* RPER1 */
if ((access == WRITEB) && (PA & 1)) if ((access == WRITEB) && (PA & 1))
data = data << 8; data = data << 8;
rper1[drv] = data; rper1[drv] = (uint16)data;
break; break;
case 007: /* RPAS */ case 007: /* RPAS */
@ -727,17 +727,17 @@ switch (j) { /* decode PA<5:1> */
case 012: /* RPMR */ case 012: /* RPMR */
if ((access == WRITEB) && (PA & 1)) if ((access == WRITEB) && (PA & 1))
data = data << 8; data = data << 8;
rpmr[drv] = data; rpmr[drv] = (uint16)data;
break; break;
case 015: /* RPOF */ case 015: /* RPOF */
rpof[drv] = data & ~OF_MBZ; rpof[drv] = (uint16)(data & ~OF_MBZ);
break; break;
case 016: /* RPDC */ case 016: /* RPDC */
if ((access == WRITEB) && (PA & 1)) if ((access == WRITEB) && (PA & 1))
data = data << 8; data = data << 8;
rpdc[drv] = data & ~DC_MBZ; rpdc[drv] = (uint16)(data & ~DC_MBZ);
break; break;
case 005: /* RPDS */ case 005: /* RPDS */
@ -1017,10 +1017,10 @@ switch (uptr->FUNC) { /* case on function */
if (da >= drv_tab[dtype].size) if (da >= drv_tab[dtype].size)
rpds[drv] = rpds[drv] | DS_LST; rpds[drv] = rpds[drv] | DS_LST;
da = da / RP_NUMWD; da = da / RP_NUMWD;
rpda[drv] = da % drv_tab[dtype].sect; rpda[drv] = (uint16)(da % drv_tab[dtype].sect);
da = da / drv_tab[dtype].sect; da = da / drv_tab[dtype].sect;
rpda[drv] = rpda[drv] | ((da % drv_tab[dtype].surf) << DA_V_SF); rpda[drv] = (uint16)(rpda[drv] | ((da % drv_tab[dtype].surf) << DA_V_SF));
rpdc[drv] = da / drv_tab[dtype].surf; rpdc[drv] = (uint16)(da / drv_tab[dtype].surf);
if (err != 0) { /* error? */ if (err != 0) { /* error? */
set_rper (ER1_PAR, drv); /* set drive error */ set_rper (ER1_PAR, drv); /* set drive error */
@ -1040,7 +1040,7 @@ return SCPE_OK;
/* Set drive error */ /* Set drive error */
void set_rper (int32 flag, int32 drv) void set_rper (int16 flag, int32 drv)
{ {
rper1[drv] = rper1[drv] | flag; rper1[drv] = rper1[drv] | flag;
rpds[drv] = rpds[drv] | DS_ATA; rpds[drv] = rpds[drv] | DS_ATA;

2
PDP11/pdp11_cis.c
View file

@ -1174,7 +1174,7 @@ return SCPE_OK;
int32 ReadDstr (int32 *dscr, DSTR *src, int32 flag) int32 ReadDstr (int32 *dscr, DSTR *src, int32 flag)
{ {
int32 c, i, end, lnt, type, t; int32 c, i, end, lnt, type, t = 0;
*src = Dstr0; /* clear result */ *src = Dstr0; /* clear result */
type = GET_DTYP (dscr[0]); /* get type */ type = GET_DTYP (dscr[0]); /* get type */

20
PDP11/pdp11_cr.c
View file

@ -622,7 +622,7 @@ static t_bool fileEOF ( UNIT *uptr,
/* Generate EOD card, which empties the hopper */ /* Generate EOD card, which empties the hopper */
for (col = 1; col <= 8; col++) { for (col = 1; col <= 8; col++) {
hcard[col] = PUNCH_EOD; hcard[col] = PUNCH_EOD;
ccard[col] = h2c_code[PUNCH_EOD]; ccard[col] = (char)h2c_code[PUNCH_EOD];
acard[col] = ' '; acard[col] = ' ';
} }
while (col <= colEnd) { while (col <= colEnd) {
@ -705,13 +705,13 @@ static t_bool readCardImage ( UNIT *uptr,
/* convert to 2 columns */ /* convert to 2 columns */
i = ((c1 << 4) | ( c2 >> 4)) & 0xFFF; i = ((c1 << 4) | ( c2 >> 4)) & 0xFFF;
hcard[col] = i; hcard[col] = i;
ccard[col] = h2c_code[i]; ccard[col] = (char)h2c_code[i];
acard[col] = ascii_code[i]; acard[col] = ascii_code[i];
col++; col++;
i = (((c2 & 017) << 8) | c3) & 0xFFF; i = (((c2 & 017) << 8) | c3) & 0xFFF;
hcard[col] = i; hcard[col] = i;
ccard[col] = h2c_code[i]; ccard[col] = (char)h2c_code[i];
acard[col] = ascii_code[i]; acard[col] = ascii_code[i];
col++; col++;
} }
@ -742,7 +742,7 @@ static t_bool readColumnBinary ( UNIT *uptr,
return fileEOF (uptr, hcard, ccard, acard, CDDB_READ); return fileEOF (uptr, hcard, ccard, acard, CDDB_READ);
i = (c1 & 077) | ((c2 & 077) << 6); i = (c1 & 077) | ((c2 & 077) << 6);
hcard[col] = i; hcard[col] = i;
ccard[col] = h2c_code[i]; ccard[col] = (char)h2c_code[i];
acard[col] = ascii_code[i]; acard[col] = ascii_code[i];
} }
return (TRUE); return (TRUE);
@ -810,7 +810,7 @@ static t_bool readCardASCII ( UNIT *uptr,
} while (((col & 07) != 1) && (col <= colEnd)); } while (((col & 07) != 1) && (col <= colEnd));
break; break;
default: default:
hcard[col] = codeTbl[c & 0177]; hcard[col] = (uint16)codeTbl[c & 0177];
/* check for unrepresentable ASCII characters */ /* check for unrepresentable ASCII characters */
if (hcard[col] == ERROR) { if (hcard[col] == ERROR) {
cdst |= CDCSR_DATAERR; cdst |= CDCSR_DATAERR;
@ -819,8 +819,8 @@ static t_bool readCardASCII ( UNIT *uptr,
"error character at column %d (%c)\n", "error character at column %d (%c)\n",
col, c & 0177); col, c & 0177);
} }
ccard[col] = h2c_code[hcard[col]]; ccard[col] = (char)h2c_code[hcard[col]];
acard[col] = c; acard[col] = (char)c;
col++; col++;
break; break;
} }
@ -861,7 +861,7 @@ static void initTranslation (void)
memset (ascii_code, '~', sizeof (ascii_code)); memset (ascii_code, '~', sizeof (ascii_code));
for (i = 0; i < 0177; i++) for (i = 0; i < 0177; i++)
ascii_code[codeTbl[i]] = i; ascii_code[codeTbl[i]] = (char)i;
} }
/* /*
@ -1305,9 +1305,9 @@ subsequent memory writes, thus insuring the address registers are
incremented properly. If this causes problems, I'll fix it. incremented properly. If this causes problems, I'll fix it.
*/ */
if (cdst & CDCSR_PACK) if (cdst & CDCSR_PACK)
c = cddb = ccard[currCol] & 0377; cddb = c = ccard[currCol] & 0377;
else else
w = cddb = hcard[currCol] & 07777; /* Punched zones: <12><11><0><1><2><3><4><5><6><7><8><9> */ cddb = w = hcard[currCol] & 07777; /* Punched zones: <12><11><0><1><2><3><4><5><6><7><8><9> */
if (cdcc == 0) /* Transfer requires CC non-zero */ if (cdcc == 0) /* Transfer requires CC non-zero */
cdst |= CDCSR_LATE; cdst |= CDCSR_LATE;

2
PDP11/pdp11_dc.c
View file

@ -415,7 +415,7 @@ for (ln = 0; ln < DCX_LINES; ln++) { /* loop thru lines */
c = (c & 0177) | odd_par[c & 0177]; c = (c & 0177) | odd_par[c & 0177];
else if (dco_unit[ln].flags & DCX_EPAR) /* even parity */ else if (dco_unit[ln].flags & DCX_EPAR) /* even parity */
c = (c & 0177) | (odd_par[c & 0177] ^ 0200); c = (c & 0177) | (odd_par[c & 0177] ^ 0200);
dci_buf[ln] = c; dci_buf[ln] = (uint8)c;
if ((c & 0200) == odd_par[c & 0177]) /* odd par? */ if ((c & 0200) == odd_par[c & 0177]) /* odd par? */
dci_csr[ln] |= DCICSR_PAR; dci_csr[ln] |= DCICSR_PAR;
else dci_csr[ln] &= ~DCICSR_PAR; else dci_csr[ln] &= ~DCICSR_PAR;

4
PDP11/pdp11_ddcmp.h
View file

@ -277,7 +277,7 @@ while (TMXR_VALID & (c = tmxr_getc_ln (lp))) {
lp->rxpbsize += 512; lp->rxpbsize += 512;
lp->rxpb = (uint8 *)realloc (lp->rxpb, lp->rxpbsize); lp->rxpb = (uint8 *)realloc (lp->rxpb, lp->rxpbsize);
} }
lp->rxpb[lp->rxpboffset] = c; lp->rxpb[lp->rxpboffset] = (uint8)c;
if ((lp->rxpboffset == 0) && ((c == DDCMP_SYN) || (c == DDCMP_DEL))) { if ((lp->rxpboffset == 0) && ((c == DDCMP_SYN) || (c == DDCMP_DEL))) {
tmxr_debug (DDCMP_DBG_PRCV, lp, "Ignoring Interframe Sync Character", (char *)&lp->rxpb[0], 1); tmxr_debug (DDCMP_DBG_PRCV, lp, "Ignoring Interframe Sync Character", (char *)&lp->rxpb[0], 1);
continue; continue;
@ -313,7 +313,7 @@ while (TMXR_VALID & (c = tmxr_getc_ln (lp))) {
if (lp->rxpboffset >= 10 + payloadsize) { if (lp->rxpboffset >= 10 + payloadsize) {
++lp->rxpcnt; ++lp->rxpcnt;
*pbuf = lp->rxpb; *pbuf = lp->rxpb;
*psize = 10 + payloadsize; *psize = (uint16)(10 + payloadsize);
if (lp->mp->lines > 1) if (lp->mp->lines > 1)
sprintf (msg, "Line%d: <<< RCV Packet", (int)(lp-lp->mp->ldsc)); sprintf (msg, "Line%d: <<< RCV Packet", (int)(lp-lp->mp->ldsc));
else else

2
PDP11/pdp11_dl.c
View file

@ -366,7 +366,7 @@ for (ln = 0; ln < DLX_LINES; ln++) { /* loop thru lines */
else dli_csr[ln] |= CSR_DONE; else dli_csr[ln] |= CSR_DONE;
if (dli_csr[ln] & CSR_IE) if (dli_csr[ln] & CSR_IE)
dli_set_int (ln, DLI_RCI); dli_set_int (ln, DLI_RCI);
dli_buf[ln] = c; dli_buf[ln] = (uint16)c;
} }
} }
else if (dlo_unit[ln].flags & DLX_MDM) { /* discpnn & modem? */ else if (dlo_unit[ln].flags & DLX_MDM) { /* discpnn & modem? */

73
PDP11/pdp11_dmc.c
View file

@ -1227,7 +1227,6 @@ int32 dmc = (int32)(uptr-dptr->units);
char *peer = ((dptr == &dmc_dev)? &dmc_peer[dmc][0] : &dmp_peer[dmc][0]); char *peer = ((dptr == &dmc_dev)? &dmc_peer[dmc][0] : &dmp_peer[dmc][0]);
t_stat status = SCPE_OK; t_stat status = SCPE_OK;
char host[CBUFSIZE], port[CBUFSIZE]; char host[CBUFSIZE], port[CBUFSIZE];
CTLR *controller = dmc_get_controller_from_unit(uptr);
if ((!cptr) || (!*cptr)) if ((!cptr) || (!*cptr))
return SCPE_ARG; return SCPE_ARG;
@ -1258,7 +1257,6 @@ return SCPE_OK;
t_stat dmc_setspeed (UNIT* uptr, int32 val, char* cptr, void* desc) t_stat dmc_setspeed (UNIT* uptr, int32 val, char* cptr, void* desc)
{ {
t_stat status = SCPE_OK;
DEVICE *dptr = (UNIBUS) ? ((&dmc_dev == find_dev_from_unit(uptr)) ? &dmc_dev : &dmp_dev) : &dmv_dev; DEVICE *dptr = (UNIBUS) ? ((&dmc_dev == find_dev_from_unit(uptr)) ? &dmc_dev : &dmp_dev) : &dmv_dev;
int32 dmc = (int32)(uptr-dptr->units); int32 dmc = (int32)(uptr-dptr->units);
uint32 *speeds = ((dptr == &dmc_dev)? dmc_speed : dmp_speed); uint32 *speeds = ((dptr == &dmc_dev)? dmc_speed : dmp_speed);
@ -1343,8 +1341,6 @@ return SCPE_OK;
t_stat dmc_showtype (FILE* st, UNIT* uptr, int32 val, void* desc) t_stat dmc_showtype (FILE* st, UNIT* uptr, int32 val, void* desc)
{ {
DEVICE *dptr = (UNIBUS) ? ((&dmc_dev == find_dev_from_unit(uptr)) ? &dmc_dev : &dmp_dev) : &dmv_dev;
int32 dmc = (int32)(uptr-dptr->units);
CTLR *controller = dmc_get_controller_from_unit(uptr); CTLR *controller = dmc_get_controller_from_unit(uptr);
switch (controller->dev_type) { switch (controller->dev_type) {
@ -1572,7 +1568,7 @@ for (i=0; i<dptr->numunits; i++)
if (cptr == NULL) if (cptr == NULL)
return SCPE_ARG; return SCPE_ARG;
newln = (int32) get_uint (cptr, 10, maxunits, &r); newln = (int32) get_uint (cptr, 10, maxunits, &r);
if ((r != SCPE_OK) || (newln == (dptr->numunits - 2))) if ((r != SCPE_OK) || (newln == (int32)(dptr->numunits - 2)))
return r; return r;
if (newln == 0) if (newln == 0)
return SCPE_ARG; return SCPE_ARG;
@ -1884,7 +1880,7 @@ return (addr >> 1) & ((UNIBUS) ? 03 : 07);
uint16 dmc_bitfld(int data, int start_bit, int length) uint16 dmc_bitfld(int data, int start_bit, int length)
{ {
uint16 ans = data >> start_bit; uint16 ans = (uint16)(data >> start_bit);
uint32 mask = (1 << (length))-1; uint32 mask = (1 << (length))-1;
ans &= mask; ans &= mask;
return ans; return ans;
@ -2207,7 +2203,7 @@ void dmc_set_addr(CTLR *controller, uint32 addr)
{ {
if (dmc_is_dmc(controller) || (!(*controller->csrs->sel2 & DMP_SEL2_M_22BIT))) { if (dmc_is_dmc(controller) || (!(*controller->csrs->sel2 & DMP_SEL2_M_22BIT))) {
dmc_setreg(controller, 4, addr & 0xFFFF, DBG_RGC); dmc_setreg(controller, 4, addr & 0xFFFF, DBG_RGC);
dmc_setreg(controller, 6, ((addr >> 2) << 14) | (*controller->csrs->sel6 & 0x3FFF) , DBG_RGC); dmc_setreg(controller, 6, (uint16)(((addr >> 2) << 14) | (*controller->csrs->sel6 & 0x3FFF)) , DBG_RGC);
} }
else { else {
dmc_setreg(controller, 4, addr & 0xFFFF, DBG_RGC); dmc_setreg(controller, 4, addr & 0xFFFF, DBG_RGC);
@ -2438,9 +2434,6 @@ t_stat dmc_poll_svc (UNIT *uptr)
{ {
DEVICE *dptr = ((CTLR *)uptr->ctlr)->device; DEVICE *dptr = ((CTLR *)uptr->ctlr)->device;
CTLR *controller; CTLR *controller;
int maxunits = (&dmc_dev == dptr) ? DMC_NUMDEVICE : DMP_NUMDEVICE;
DIB *dibptr = (DIB *)dptr->ctxt;
int addrlnt = (UNIBUS) ? IOLN_DMC : IOLN_DMV;
TMXR *mp = (dptr == &dmc_dev) ? &dmc_desc : &dmp_desc; TMXR *mp = (dptr == &dmc_dev) ? &dmc_desc : &dmp_desc;
int32 dmc, active, attached; int32 dmc, active, attached;
@ -2659,7 +2652,7 @@ if ((!head) ||
(controller->transfer_state != Idle) || (controller->transfer_state != Idle) ||
(dmc_is_rdyo_set(controller))) (dmc_is_rdyo_set(controller)))
return; return;
count = head->actual_bytes_transferred; count = (uint16)head->actual_bytes_transferred;
switch (head->type) { switch (head->type) {
case Receive: case Receive:
sim_debug(DBG_INF, controller->device, "%s%d: Starting data output transfer for receive, address=0x%08x, count=%d\n", controller->device->name, controller->index, head->address, count); sim_debug(DBG_INF, controller->device, "%s%d: Starting data output transfer for receive, address=0x%08x, count=%d\n", controller->device->name, controller->index, head->address, count);
@ -2716,7 +2709,6 @@ if (dmc_is_dmc(controller)) {
if (dmc_is_run_set(controller) && if (dmc_is_run_set(controller) &&
(!dmc_is_rqi_set(controller))) { (!dmc_is_rqi_set(controller))) {
/* Time to decode input command arguments */ /* Time to decode input command arguments */
uint16 sel4 = *controller->csrs->sel4;
uint16 sel6 = *controller->csrs->sel6; uint16 sel6 = *controller->csrs->sel6;
uint32 addr = dmc_get_addr(controller); uint32 addr = dmc_get_addr(controller);
uint16 count = dmc_get_count(controller); uint16 count = dmc_get_count(controller);
@ -3510,7 +3502,7 @@ if (access == WRITE) {
if (PA & 1) { if (PA & 1) {
sim_debug(DBG_WRN, controller->device, "dmc_wr(%s%d), Unexpected non-16-bit write access to SEL%d\n", controller->device->name, controller->index, reg); sim_debug(DBG_WRN, controller->device, "dmc_wr(%s%d), Unexpected non-16-bit write access to SEL%d\n", controller->device->name, controller->index, reg);
} }
dmc_setreg(controller, PA, data, DBG_REG); dmc_setreg(controller, PA, (uint16)data, DBG_REG);
} }
else { else {
uint16 mask; uint16 mask;
@ -3678,41 +3670,40 @@ if (0 == dmc_units[0].flags) { /* First Time Initializations */
dmp_desc.dptr = &dmp_dev; /* Connect appropriate device */ dmp_desc.dptr = &dmp_dev; /* Connect appropriate device */
dmp_desc.uptr = dmp_units+dmp_desc.lines; /* Identify polling unit */ dmp_desc.uptr = dmp_units+dmp_desc.lines; /* Identify polling unit */
} }
else {
BUFFER *buffer;
/* Avoid memory leaks by moving all buffers back to the free queue
and then freeing any allocated transfer buffers for each buffer
on the free queue */
while (controller->ack_wait_queue->count) {
buffer = (BUFFER *)remqueue (controller->ack_wait_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
}
while (controller->completion_queue->count) {
buffer = (BUFFER *)remqueue (controller->completion_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
}
while (controller->rcv_queue->count) {
buffer = (BUFFER *)remqueue (controller->rcv_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
}
while (controller->xmt_queue->count) {
buffer = (BUFFER *)remqueue (controller->xmt_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
}
for (i = 0; i < controller->free_queue->size; i++) {
buffer = (BUFFER *)remqueue (controller->free_queue->hdr.next);
free (buffer->transfer_buffer);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
}
}
ans = auto_config (dptr->name, (dptr->flags & DEV_DIS) ? 0 : dptr->numunits - 2); ans = auto_config (dptr->name, (dptr->flags & DEV_DIS) ? 0 : dptr->numunits - 2);
if (!(dptr->flags & DEV_DIS)) { if (!(dptr->flags & DEV_DIS)) {
for (i = 0; i < DMC_NUMDEVICE + DMP_NUMDEVICE; i++) { for (i = 0; i < DMC_NUMDEVICE + DMP_NUMDEVICE; i++) {
if (dmc_ctrls[i].device == dptr) { if (dmc_ctrls[i].device == dptr) {
BUFFER *buffer;
controller = &dmc_ctrls[i]; controller = &dmc_ctrls[i];
/* Avoid memory leaks by moving all buffers back to the free queue
and then freeing any allocated transfer buffers for each buffer
on the free queue */
while (controller->ack_wait_queue->count) {
buffer = (BUFFER *)remqueue (controller->ack_wait_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
}
while (controller->completion_queue->count) {
buffer = (BUFFER *)remqueue (controller->completion_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
}
while (controller->rcv_queue->count) {
buffer = (BUFFER *)remqueue (controller->rcv_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
}
while (controller->xmt_queue->count) {
buffer = (BUFFER *)remqueue (controller->xmt_queue->hdr.next);
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
}
for (j = 0; j < controller->free_queue->size; j++) {
buffer = (BUFFER *)remqueue (controller->free_queue->hdr.next);
free (buffer->transfer_buffer);
buffer->transfer_buffer = NULL;
assert (insqueue (&buffer->hdr, controller->free_queue->hdr.prev));
}
dmc_buffer_queue_init_all(controller); dmc_buffer_queue_init_all(controller);
dmc_clrinint(controller); dmc_clrinint(controller);
dmc_clroutint(controller); dmc_clroutint(controller);

11
PDP11/pdp11_dup.c
View file

@ -70,9 +70,9 @@ static uint16 dup_rxdbuf[DUP_LINES];
static uint16 dup_parcsr[DUP_LINES]; static uint16 dup_parcsr[DUP_LINES];
static uint16 dup_txcsr[DUP_LINES]; static uint16 dup_txcsr[DUP_LINES];
static uint16 dup_txdbuf[DUP_LINES]; static uint16 dup_txdbuf[DUP_LINES];
static uint16 dup_W3[DUP_LINES]; static t_bool dup_W3[DUP_LINES];
static uint16 dup_W5[DUP_LINES]; static t_bool dup_W5[DUP_LINES];
static uint16 dup_W6[DUP_LINES]; static t_bool dup_W6[DUP_LINES];
static uint32 dup_rxi = 0; /* rcv interrupts */ static uint32 dup_rxi = 0; /* rcv interrupts */
static uint32 dup_txi = 0; /* xmt interrupts */ static uint32 dup_txi = 0; /* xmt interrupts */
static uint32 dup_wait[DUP_LINES]; /* rcv/xmt byte delay */ static uint32 dup_wait[DUP_LINES]; /* rcv/xmt byte delay */
@ -495,7 +495,6 @@ static t_stat dup_rd (int32 *data, int32 PA, int32 access)
static BITFIELD* bitdefs[] = {dup_rxcsr_bits, dup_rxdbuf_bits, dup_txcsr_bits, dup_txdbuf_bits}; static BITFIELD* bitdefs[] = {dup_rxcsr_bits, dup_rxdbuf_bits, dup_txcsr_bits, dup_txdbuf_bits};
static uint16 *regs[] = {dup_rxcsr, dup_rxdbuf, dup_txcsr, dup_txdbuf}; static uint16 *regs[] = {dup_rxcsr, dup_rxdbuf, dup_txcsr, dup_txdbuf};
int32 dup = ((PA - dup_dib.ba) >> 3); /* get line num */ int32 dup = ((PA - dup_dib.ba) >> 3); /* get line num */
TMLN *lp = &dup_desc.ldsc[dup];
int32 orig_val; int32 orig_val;
if (dup >= dup_desc.lines) /* validate line number */ if (dup >= dup_desc.lines) /* validate line number */
@ -892,7 +891,7 @@ if (!tmxr_tpbusyln(&dup_ldsc[dup])) { /* Not Busy sending? */
dup_xmtpkstart[dup] = sim_grtime(); dup_xmtpkstart[dup] = sim_grtime();
} }
if (dup_xmtpkoffset[dup] + 2 + len > dup_xmtpksize[dup]) { if (dup_xmtpkoffset[dup] + 2 + len > dup_xmtpksize[dup]) {
dup_xmtpksize[dup] += 2 + len; dup_xmtpksize[dup] += 2 + (uint16)len;
dup_xmtpacket[dup] = (uint8 *)realloc (dup_xmtpacket[dup], dup_xmtpksize[dup]); dup_xmtpacket[dup] = (uint8 *)realloc (dup_xmtpacket[dup], dup_xmtpksize[dup]);
} }
/* Strip sync bytes at the beginning of a message */ /* Strip sync bytes at the beginning of a message */
@ -903,7 +902,7 @@ if (!tmxr_tpbusyln(&dup_ldsc[dup])) { /* Not Busy sending? */
/* Insert remaining bytes into transmit buffer */ /* Insert remaining bytes into transmit buffer */
if (len) { if (len) {
memcpy (&dup_xmtpacket[dup][dup_xmtpkoffset[dup]], bytes, len); memcpy (&dup_xmtpacket[dup][dup_xmtpkoffset[dup]], bytes, len);
dup_xmtpkoffset[dup] += len; dup_xmtpkoffset[dup] += (uint16)len;
} }
dup_txcsr[dup] |= TXCSR_M_TXDONE; dup_txcsr[dup] |= TXCSR_M_TXDONE;
if (dup_txcsr[dup] & TXCSR_M_TXIE) if (dup_txcsr[dup] & TXCSR_M_TXIE)

9
PDP11/pdp11_dz.c
View file

@ -267,7 +267,7 @@ t_stat dz_reset (DEVICE *dptr);
t_stat dz_attach (UNIT *uptr, char *cptr); t_stat dz_attach (UNIT *uptr, char *cptr);
t_stat dz_detach (UNIT *uptr); t_stat dz_detach (UNIT *uptr);
t_stat dz_clear (int32 dz, t_bool flag); t_stat dz_clear (int32 dz, t_bool flag);
int32 dz_getc (int32 dz); uint16 dz_getc (int32 dz);
void dz_update_rcvi (void); void dz_update_rcvi (void);
void dz_update_xmti (void); void dz_update_xmti (void);
void dz_clr_rxint (int32 dz); void dz_clr_rxint (int32 dz);
@ -426,13 +426,14 @@ sim_debug_bits(DBG_REG, &dz_dev, bitdefs[(PA >> 1) & 03], (uint32)(*data), (uint
return SCPE_OK; return SCPE_OK;
} }
t_stat dz_wr (int32 data, int32 PA, int32 access) t_stat dz_wr (int32 ldata, int32 PA, int32 access)
{ {
int32 dz = ((PA - dz_dib.ba) >> 3); /* get mux num */ int32 dz = ((PA - dz_dib.ba) >> 3); /* get mux num */
static BITFIELD* bitdefs[] = {dz_csr_bits, dz_lpr_bits, dz_tcr_bits, dz_tdr_bits}; static BITFIELD* bitdefs[] = {dz_csr_bits, dz_lpr_bits, dz_tcr_bits, dz_tdr_bits};
int32 i, c, line; int32 i, c, line;
char lineconfig[16]; char lineconfig[16];
TMLN *lp; TMLN *lp;
uint16 data = (uint16)ldata;
if (dz > DZ_MAXMUX) if (dz > DZ_MAXMUX)
return SCPE_IERR; return SCPE_IERR;
@ -567,7 +568,7 @@ return SCPE_OK;
/* Get first available character for mux, if any */ /* Get first available character for mux, if any */
int32 dz_getc (int32 dz) uint16 dz_getc (int32 dz)
{ {
uint32 i, line, c; uint32 i, line, c;
@ -579,7 +580,7 @@ for (i = c = 0; (i < DZ_LINES) && (c == 0); i++) { /* loop thru lines */
if (c) /* or in line # */ if (c) /* or in line # */
c = c | (i << RBUF_V_RLINE); c = c | (i << RBUF_V_RLINE);
} /* end for */ } /* end for */
return c; return (uint16)c;
} }
/* Update receive interrupts */ /* Update receive interrupts */

8
PDP11/pdp11_hk.c
View file

@ -881,7 +881,7 @@ switch (j) { /* decode PA<4:1> */
case 012: /* HKDB */ case 012: /* HKDB */
old_val = hkdb[0]; old_val = hkdb[0];
new_val = hkdb[0] = data; new_val = hkdb[0] = (int16)data;
break; break;
case 013: /* HKMR */ case 013: /* HKMR */
@ -1036,7 +1036,7 @@ switch (fnc) { /* case on function */
hk_err (CS1_ERR|CS1_DONE, 0, ER_OPI, drv); /* set err, no op */ hk_err (CS1_ERR|CS1_DONE, 0, ER_OPI, drv); /* set err, no op */
return; return;
} }
hk_dif[drv] = hkdc - uptr->CYL; /* cyl diff */ hk_dif[drv] = (int16)(hkdc - uptr->CYL); /* cyl diff */
t = abs (hk_dif[drv]); /* |cyl diff| */ t = abs (hk_dif[drv]); /* |cyl diff| */
uptr->FNC = fnc; /* save function */ uptr->FNC = fnc; /* save function */
sim_activate (uptr, hk_rwait + (hk_swait * t)); /* schedule */ sim_activate (uptr, hk_rwait + (hk_swait * t)); /* schedule */
@ -1104,7 +1104,7 @@ switch (fnc) { /* case on function */
uptr->FNC = uptr->FNC | FNC_2ND; /* second state */ uptr->FNC = uptr->FNC | FNC_2ND; /* second state */
hk_off[drv] = 0; /* clr offset */ hk_off[drv] = 0; /* clr offset */
dc = (fnc == FNC_SEEK)? hkdc: 0; /* get cyl */ dc = (fnc == FNC_SEEK)? hkdc: 0; /* get cyl */
hk_dif[drv] = dc - uptr->CYL; /* cyl diff */ hk_dif[drv] = (int16)(dc - uptr->CYL); /* cyl diff */
t = abs (hk_dif[drv]) * hk_swait; /* |cyl diff| */ t = abs (hk_dif[drv]) * hk_swait; /* |cyl diff| */
if (t < hk_min2wait) /* min time */ if (t < hk_min2wait) /* min time */
t = hk_min2wait; t = hk_min2wait;
@ -1117,7 +1117,7 @@ switch (fnc) { /* case on function */
/* Data transfer commands only generate one interrupt */ /* Data transfer commands only generate one interrupt */
case FNC_READH: case FNC_READH:
hkdb[0] = uptr->CYL << RDH1_V_CYL; /* first word */ hkdb[0] = (int16)(uptr->CYL << RDH1_V_CYL); /* first word */
hkdb[1] = (GET_SC (hkda) << RDH2_V_SEC) | /* second word */ hkdb[1] = (GET_SC (hkda) << RDH2_V_SEC) | /* second word */
(1 << (GET_SF (hkda) + RDH2_V_DHA)) | RDH2_GOOD; (1 << (GET_SF (hkda) + RDH2_V_DHA)) | RDH2_GOOD;
hkdb[2] = hkdb[0] ^ hkdb[1]; /* checksum */ hkdb[2] = hkdb[0] ^ hkdb[1]; /* checksum */

2
PDP11/pdp11_kg.c
View file

@ -440,7 +440,7 @@ static void do_poly (int unit, t_bool step)
static t_stat set_units (UNIT *u, int32 val, char *s, void *desc) static t_stat set_units (UNIT *u, int32 val, char *s, void *desc)
{ {
int32 i, units; uint32 i, units;
t_stat stat; t_stat stat;
if (s == NULL) if (s == NULL)

60
PDP11/pdp11_kmc.c
View file

@ -258,7 +258,7 @@ typedef struct buffer_list BDL;
struct dupstate { struct dupstate {
int32 kmc; /* Controlling KMC */ int32 kmc; /* Controlling KMC */
int32 line; /* OS-assigned line number */ uint8 line; /* OS-assigned line number */
int32 dupidx; /* DUP API Number amongst all DUP11's on Unibus (-1 == unassigned) */ int32 dupidx; /* DUP API Number amongst all DUP11's on Unibus (-1 == unassigned) */
int32 linkstate; /* Line Link Status (i.e. 1 when DCD/DSR is on, 0 otherwise */ int32 linkstate; /* Line Link Status (i.e. 1 when DCD/DSR is on, 0 otherwise */
#define LINK_DSR 1 #define LINK_DSR 1
@ -499,6 +499,7 @@ static char *kmc_description (DEVICE *dptr);
/* Global data */ /* Global data */
extern int32 IREQ (HLVL); extern int32 IREQ (HLVL);
extern int32 tmxr_poll; /* calibrated delay */
static int32 kmc_AintAck (void); static int32 kmc_AintAck (void);
static int32 kmc_BintAck (void); static int32 kmc_BintAck (void);
@ -629,15 +630,15 @@ static void kmc_startUcode (int32 k);
static void kmc_dispatchInputCmd(int32 k); static void kmc_dispatchInputCmd(int32 k);
/* Control functions */ /* Control functions */
static void kmc_baseIn (int32 k, dupstate *d, uint16 cmdsel2, int line); static void kmc_baseIn (int32 k, dupstate *d, uint16 cmdsel2, uint8 line);
static void kmc_ctrlIn (int32 k, dupstate *d, int line); static void kmc_ctrlIn (int32 k, dupstate *d, int line);
/* Receive functions */ /* Receive functions */
void kmc_rxBufferIn(dupstate *d, int32 ba, uint32 sel6v); void kmc_rxBufferIn(dupstate *d, int32 ba, uint16 sel6v);
static void kdp_receive(int32 dupidx, int count); static void kdp_receive(int32 dupidx, int count);
/* Transmit functions */ /* Transmit functions */
static void kmc_txBufferIn(dupstate *d, int32 ba, uint32 sel6v); static void kmc_txBufferIn(dupstate *d, int32 ba, uint16 sel6v);
static void kmc_txComplete (int32 dupidx, int status); static void kmc_txComplete (int32 dupidx, int status);
static t_bool kmc_txNewBdl(dupstate *d); static t_bool kmc_txNewBdl(dupstate *d);
static t_bool kmc_txNewBd(dupstate *d); static t_bool kmc_txNewBd(dupstate *d);
@ -666,7 +667,7 @@ static int32 kmc_BintAck (void);
/* DUP access */ /* DUP access */
/* Debug support */ /* Debug support */
static t_bool kmc_printBufferIn (int32 k, DEVICE *dev, int32 line, t_bool rx, static t_bool kmc_printBufferIn (int32 k, DEVICE *dev, uint8 line, t_bool rx,
int32 count, int32 ba, uint16 sel6v); int32 count, int32 ba, uint16 sel6v);
static t_bool kmc_printBDL(int32 k, uint32 dbits, DEVICE *dev, uint8 line, int32 ba, int prbuf); static t_bool kmc_printBDL(int32 k, uint32 dbits, DEVICE *dev, uint8 line, int32 ba, int prbuf);
@ -812,7 +813,7 @@ static t_stat kmc_writeCsr (int32 data, int32 PA, int32 access) {
: ((data & 0377) | (sel0 & 0177400)); : ((data & 0377) | (sel0 & 0177400));
} }
changed = sel0 ^ data; changed = sel0 ^ data;
sel0 = data; sel0 = (uint16)data;
if (sel0 & SEL0_MRC) { if (sel0 & SEL0_MRC) {
if (((sel0 & SEL0_RUN) == 0) && (changed & SEL0_RUN)) { if (((sel0 & SEL0_RUN) == 0) && (changed & SEL0_RUN)) {
kmc_halt (k, HALT_MRC); kmc_halt (k, HALT_MRC);
@ -871,7 +872,7 @@ static t_stat kmc_writeCsr (int32 data, int32 PA, int32 access) {
* if another output command is ready. * if another output command is ready.
*/ */
if ((sel2 & SEL2_RDO) && (!(data & SEL2_RDO))) { if ((sel2 & SEL2_RDO) && (!(data & SEL2_RDO))) {
sel2 = data; /* RDO clearing, RDI can't be set */ sel2 = (uint16)data; /* RDO clearing, RDI can't be set */
if (sel0 & SEL0_RQI) { if (sel0 & SEL0_RQI) {
sel2 = (sel2 & 0xFF00) | SEL2_RDI; sel2 = (sel2 & 0xFF00) | SEL2_RDI;
kmc_updints(k); kmc_updints(k);
@ -879,28 +880,28 @@ static t_stat kmc_writeCsr (int32 data, int32 PA, int32 access) {
kmc_processCompletions(k); kmc_processCompletions(k);
} else { } else {
if ((sel2 & SEL2_RDI) && (!(data & SEL2_RDI))) { if ((sel2 & SEL2_RDI) && (!(data & SEL2_RDI))) {
sel2 = data; /* RDI clearing, RDO can't be set */ sel2 = (uint16)data; /* RDI clearing, RDO can't be set */
kmc_dispatchInputCmd(k); /* Can set RDO */ kmc_dispatchInputCmd(k); /* Can set RDO */
if ((sel0 & SEL0_RQI) && !(sel2 & SEL2_RDO)) if ((sel0 & SEL0_RQI) && !(sel2 & SEL2_RDO))
sel2 = (sel2 & 0xFF00) | SEL2_RDI; sel2 = (sel2 & 0xFF00) | SEL2_RDI;
kmc_updints(k); kmc_updints(k);
} else { } else {
sel2 = data; sel2 = (uint16)data;
} }
} }
} else { } else {
sel2 = data; sel2 = (uint16)data;
} }
break; break;
case 02: /* SEL4 */ case 02: /* SEL4 */
mna = data & (KMC_CRAMSIZE -1); mna = data & (KMC_CRAMSIZE -1);
sel4 = data; sel4 = (uint16)data;
break; break;
case 03: /* SEL6 */ case 03: /* SEL6 */
if (sel0 & SEL0_RMI) { if (sel0 & SEL0_RMI) {
mni = data; mni = (uint16)data;
} }
sel6 = data; sel6 = (uint16)data;
break; break;
} }
@ -1266,7 +1267,7 @@ static t_stat kmc_rxService (UNIT *rxup) {
dupstate *d = line2dup[rxup->unit_line]; dupstate *d = line2dup[rxup->unit_line];
BDL *bdl; BDL *bdl;
t_stat r; t_stat r;
int32 xrem, seglen; uint16 xrem, seglen;
assert ((k >= 0) && (k < (int32) kmc_dev.numunits) && (d->kmc == k) && assert ((k >= 0) && (k < (int32) kmc_dev.numunits) && (d->kmc == k) &&
(d->line == rxup->unit_line)); (d->line == rxup->unit_line));
@ -1295,7 +1296,8 @@ static t_stat kmc_rxService (UNIT *rxup) {
kmc_updateDSR (d); kmc_updateDSR (d);
break; break;
} }
if ((r != SCPE_OK) || (d->rxmsg == NULL)) { if ((r != SCPE_OK) || (d->rxmsg == NULL)) { /* No packet? */
rxup->wait = tmxr_poll;
break; break;
} }
@ -1386,7 +1388,7 @@ static t_stat kmc_rxService (UNIT *rxup) {
} }
assert (seglen > 0); assert (seglen > 0);
xrem = Map_WriteB (d->rx.ba, seglen, d->rxmsg + d->rxused); xrem = (uint16)Map_WriteB (d->rx.ba, seglen, d->rxmsg + d->rxused);
if (xrem != 0) { if (xrem != 0) {
uint16 bd[3]; uint16 bd[3];
memcpy (bd, &d->rx.bd, sizeof bd); memcpy (bd, &d->rx.bd, sizeof bd);
@ -1513,7 +1515,10 @@ static t_stat kmc_rxService (UNIT *rxup) {
} }
if ((d->rxstate != RXIDLE) || d->rxavail) { if ((d->rxstate != RXIDLE) || d->rxavail) {
sim_activate_after(rxup, rxup->wait); if (rxup->wait == tmxr_poll)
sim_clock_coschedule(rxup, tmxr_poll);
else
sim_activate_after(rxup, rxup->wait);
} }
return SCPE_OK; return SCPE_OK;
@ -1678,7 +1683,7 @@ static void kmc_startUcode (int32 k) {
*/ */
static void kmc_dispatchInputCmd(int32 k) { static void kmc_dispatchInputCmd(int32 k) {
int line; uint8 line;
int32 ba; int32 ba;
int16 cmdsel2 = sel2; int16 cmdsel2 = sel2;
dupstate* d; dupstate* d;
@ -1734,7 +1739,7 @@ static void kmc_dispatchInputCmd(int32 k) {
* There is no way to release a line, short of re-starting the microcode. * There is no way to release a line, short of re-starting the microcode.
* *
*/ */
static void kmc_baseIn (int32 k, dupstate *d, uint16 cmdsel2, int line) { static void kmc_baseIn (int32 k, dupstate *d, uint16 cmdsel2, uint8 line) {
uint32 csraddress; uint32 csraddress;
int32 dupidx; int32 dupidx;
@ -1901,7 +1906,7 @@ static void kmc_ctrlIn (int32 k, dupstate *d, int line) {
* *
*/ */
void kmc_rxBufferIn(dupstate *d, int32 ba, uint32 sel6v) { void kmc_rxBufferIn(dupstate *d, int32 ba, uint16 sel6v) {
int32 k = d->kmc; int32 k = d->kmc;
BDL *qe; BDL *qe;
uint32 bda = 0; uint32 bda = 0;
@ -1998,7 +2003,8 @@ static void kdp_receive(int32 dupidx, int count) {
k = d->kmc; k = d->kmc;
rxup = &rx_units[d->line][k]; rxup = &rx_units[d->line][k];
if ((d->rxstate == RXIDLE) && !sim_is_active (rxup)) { if (d->rxstate == RXIDLE){
sim_cancel (rxup);
sim_activate_after (rxup, RXNEWBD_DELAY); sim_activate_after (rxup, RXNEWBD_DELAY);
} }
return; return;
@ -2023,7 +2029,7 @@ static void kdp_receive(int32 dupidx, int count) {
* *
*/ */
void kmc_txBufferIn(dupstate *d, int32 ba, uint32 sel6v) { void kmc_txBufferIn(dupstate *d, int32 ba, uint16 sel6v) {
int32 k = d->kmc; int32 k = d->kmc;
BDL *qe; BDL *qe;
@ -2186,16 +2192,16 @@ static t_bool kmc_txNewBd(dupstate *d) {
static t_bool kmc_txAppendBuffer(dupstate *d) { static t_bool kmc_txAppendBuffer(dupstate *d) {
int32 k = d->kmc; int32 k = d->kmc;
int32 rem; uint16 rem;
if (!d->txmsg || (d->txmsize < d->txmlen+d->tx.bd[1])) { if (!d->txmsg || (d->txmsize < d->txmlen+d->tx.bd[1])) {
d->txmsize = d->txmlen+d->tx.bd[1]; d->txmsize = d->txmlen+d->tx.bd[1];
d->txmsg = (uint8 *)realloc(d->txmsg, d->txmsize); d->txmsg = (uint8 *)realloc(d->txmsg, d->txmsize);
assert (d->txmsg); assert (d->txmsg);
} }
rem = Map_ReadB (d->tx.ba, d->tx.bd[1], d->txmsg+d->txmlen); rem = (uint16)Map_ReadB (d->tx.ba, d->tx.bd[1], d->txmsg+d->txmlen);
d->tx.bd[1] -= rem; d->tx.bd[1] -= rem;
rem += kmc_updateBDCount (d->tx.bda, d->tx.bd); rem += (uint16)kmc_updateBDCount (d->tx.bda, d->tx.bd);
if (rem) { if (rem) {
kmc_ctrlOut (k, SEL6_CO_NXM, 0, d->line, d->tx.bda); kmc_ctrlOut (k, SEL6_CO_NXM, 0, d->line, d->tx.bda);
return FALSE; return FALSE;
@ -2558,7 +2564,7 @@ static int32 kmc_BintAck (void) {
* (b) only one completion per bdl. * (b) only one completion per bdl.
*/ */
static t_bool kmc_printBufferIn (int32 k, DEVICE *dev, int32 line, t_bool rx, static t_bool kmc_printBufferIn (int32 k, DEVICE *dev, uint8 line, t_bool rx,
int32 count, int32 ba, uint16 sel6v) { int32 count, int32 ba, uint16 sel6v) {
t_bool kill = ((sel6v & (SEL6_BI_KILL|SEL6_BI_ENABLE)) == SEL6_BI_KILL); t_bool kill = ((sel6v & (SEL6_BI_KILL|SEL6_BI_ENABLE)) == SEL6_BI_KILL);
const char *dir = rx? "RX": "TX"; const char *dir = rx? "RX": "TX";
@ -2773,7 +2779,7 @@ static t_stat kmc_setDeviceCount (UNIT *txup, int32 val, char *cptr, void *desc)
} }
} }
newln = (int32) get_uint (cptr, 10, KMC_UNITS, &r); newln = (int32) get_uint (cptr, 10, KMC_UNITS, &r);
if ((r != SCPE_OK) || (newln == dptr->numunits)) if ((r != SCPE_OK) || (newln == (int32)dptr->numunits))
return r; return r;
if (newln == 0) if (newln == 0)
return SCPE_ARG; return SCPE_ARG;

4
PDP11/pdp11_rh.c
View file

@ -178,7 +178,7 @@ void mba_set_int (uint32 mb);
void mba_clr_int (uint32 mb); void mba_clr_int (uint32 mb);
void mba_upd_cs1 (uint32 set, uint32 clr, uint32 mb); void mba_upd_cs1 (uint32 set, uint32 clr, uint32 mb);
void mba_set_cs2 (uint32 flg, uint32 mb); void mba_set_cs2 (uint32 flg, uint32 mb);
uint32 mba_map_pa (int32 pa, int32 *ofs); int32 mba_map_pa (int32 pa, int32 *ofs);
t_stat rh_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr); t_stat rh_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
char *rh_description (DEVICE *dptr); char *rh_description (DEVICE *dptr);
@ -794,7 +794,7 @@ return mba2_dib.vec; /* acknowledge */
/* Map physical address to Massbus number, offset */ /* Map physical address to Massbus number, offset */
uint32 mba_map_pa (int32 pa, int32 *ofs) int32 mba_map_pa (int32 pa, int32 *ofs)
{ {
int32 i, uo, ba, lnt; int32 i, uo, ba, lnt;
DIB *dibp; DIB *dibp;

4
PDP11/pdp11_rk.c
View file

@ -475,7 +475,7 @@ return SCPE_OK;
t_stat rk_wr (int32 data, int32 PA, int32 access) t_stat rk_wr (int32 data, int32 PA, int32 access)
{ {
int32 old_val = *rk_regs[(PA >> 1) & 07], new_val = 0; int32 old_val = *rk_regs[(PA >> 1) & 07];
switch ((PA >> 1) & 07) { /* decode PA<3:1> */ switch ((PA >> 1) & 07) { /* decode PA<3:1> */
@ -677,7 +677,7 @@ if (wc && (err == 0)) { /* seek ok? */
wc = i; /* trim transfer */ wc = i; /* trim transfer */
break; break;
} }
rkxb[i] = ((cda / RK_NUMWD) / (RK_NUMSF * RK_NUMSC)) << RKDA_V_CYL; rkxb[i] = (uint16)(((cda / RK_NUMWD) / (RK_NUMSF * RK_NUMSC)) << RKDA_V_CYL);
cda = cda + RK_NUMWD; /* next sector */ cda = cda + RK_NUMWD; /* next sector */
} /* end for wc */ } /* end for wc */
} /* end if format */ } /* end if format */

14
PDP11/pdp11_rl.c
View file

@ -234,7 +234,7 @@ int32 rlcs = 0; /* control/status */
int32 rlba = 0; /* memory address */ int32 rlba = 0; /* memory address */
int32 rlbae = 0; /* mem addr extension */ int32 rlbae = 0; /* mem addr extension */
int32 rlda = 0; /* disk addr */ int32 rlda = 0; /* disk addr */
int32 rlmp = 0, rlmp1 = 0, rlmp2 = 0; /* mp register queue */ uint16 rlmp = 0, rlmp1 = 0, rlmp2 = 0; /* mp register queue */
int32 rl_swait = 10; /* seek wait */ int32 rl_swait = 10; /* seek wait */
int32 rl_rwait = 10; /* rotate wait */ int32 rl_rwait = 10; /* rotate wait */
int32 rl_stopioe = 1; /* stop on error */ int32 rl_stopioe = 1; /* stop on error */
@ -542,7 +542,7 @@ max 17ms for 1 track seek w/head switch
if (rlda & RLDA_GS_CLR) /* reset errors? */ if (rlda & RLDA_GS_CLR) /* reset errors? */
uptr->STAT &= ~RLDS_ERR; uptr->STAT &= ~RLDS_ERR;
/* develop drive state */ /* develop drive state */
rlmp = uptr->STAT | (uptr->TRK & RLDS_HD); rlmp = (uint16)(uptr->STAT | (uptr->TRK & RLDS_HD));
if (uptr->flags & UNIT_RL02) if (uptr->flags & UNIT_RL02)
rlmp |= RLDS_RL02; rlmp |= RLDS_RL02;
if (uptr->flags & UNIT_WPRT) if (uptr->flags & UNIT_WPRT)
@ -605,7 +605,7 @@ says, bit 0 can be written and read (as 1) on an RLV12 (verified
case 3: /* RLMP */ case 3: /* RLMP */
if (access == WRITEB) if (access == WRITEB)
data = (PA & 1)? (rlmp & 0377) | (data << 8): (rlmp & ~0377) | data; data = (PA & 1)? (rlmp & 0377) | (data << 8): (rlmp & ~0377) | data;
rlmp = rlmp1 = rlmp2 = data; rlmp = rlmp1 = rlmp2 = (uint16)data;
if (DEBUG_PRS (rl_dev)) if (DEBUG_PRS (rl_dev))
fprintf (sim_deb, ">>RL wr: RLMP %06o\n", rlmp); fprintf (sim_deb, ">>RL wr: RLMP %06o\n", rlmp);
break; break;
@ -628,7 +628,7 @@ return SCPE_OK;
} }
/* CRC16 as implemented by the DEC 9401 chip */ /* CRC16 as implemented by the DEC 9401 chip */
static uint32 calcCRC (const int wc, const uint16 *data) static uint16 calcCRC (const int wc, const uint16 *data)
{ {
uint32 crc, j, d; uint32 crc, j, d;
int32 i; int32 i;
@ -643,7 +643,7 @@ static uint32 calcCRC (const int wc, const uint16 *data)
d >>= 1; d >>= 1;
} }
} }
return (crc); return (uint16)crc;
} }
/* /*
@ -697,12 +697,12 @@ static void rlv_maint (void)
rlba = ma & RLBA_IMP; /* lower 16b */ rlba = ma & RLBA_IMP; /* lower 16b */
/* 4: check the CRC of (DAR + 3) */ /* 4: check the CRC of (DAR + 3) */
w = rlda; w = (uint16)rlda;
rlxb[0] = calcCRC (1, &w); /* calculate CRC */ rlxb[0] = calcCRC (1, &w); /* calculate CRC */
rlda = (rlda & ~0377) | ((rlda + 1) & 0377); rlda = (rlda & ~0377) | ((rlda + 1) & 0377);
/* 5: check the CRC of (DAR + 4) */ /* 5: check the CRC of (DAR + 4) */
w = rlda; w = (uint16)rlda;
rlxb[1] = calcCRC (1, &w); /* calculate CRC */ rlxb[1] = calcCRC (1, &w); /* calculate CRC */
rlda = (rlda & ~0377) | ((rlda + 1) & 0377); rlda = (rlda & ~0377) | ((rlda + 1) & 0377);

28
PDP11/pdp11_rp.c
View file

@ -576,9 +576,9 @@ t_stat rp_reset (DEVICE *dptr);
t_stat rp_attach (UNIT *uptr, char *cptr); t_stat rp_attach (UNIT *uptr, char *cptr);
t_stat rp_detach (UNIT *uptr); t_stat rp_detach (UNIT *uptr);
t_stat rp_boot (int32 unitno, DEVICE *dptr); t_stat rp_boot (int32 unitno, DEVICE *dptr);
void rp_set_er (int32 flg, int32 drv); void rp_set_er (int16 flg, int32 drv);
void rp_clr_as (int32 mask); void rp_clr_as (int32 mask);
void rp_update_ds (int32 flg, int32 drv); void rp_update_ds (int16 flg, int32 drv);
t_stat rp_go (int32 drv); t_stat rp_go (int32 drv);
t_stat rp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc); t_stat rp_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat rp_set_bad (UNIT *uptr, int32 val, char *cptr, void *desc); t_stat rp_set_bad (UNIT *uptr, int32 val, char *cptr, void *desc);
@ -909,7 +909,7 @@ if ((ofs != RP_AS_OF) && sim_is_active (uptr)) { /* unit busy? */
rp_update_ds (0, drv); rp_update_ds (0, drv);
return SCPE_OK; return SCPE_OK;
} }
rmhr[drv] = data; /* save write */ rmhr[drv] = (uint16)data; /* save write */
ofs = ofs & MBA_RMASK; /* mask offset */ ofs = ofs & MBA_RMASK; /* mask offset */
if (drv_tab[dtype].ctrl == RM_CTRL) /* RM? convert */ if (drv_tab[dtype].ctrl == RM_CTRL) /* RM? convert */
ofs = ofs + RM_OF; ofs = ofs + RM_OF;
@ -926,7 +926,7 @@ switch (ofs) { /* decode PA<5:1> */
case RP_DA_OF: case RM_DA_OF: /* RPDA */ case RP_DA_OF: case RM_DA_OF: /* RPDA */
old_reg = rpds[drv]; old_reg = rpds[drv];
rpda[drv] = data & ~DA_MBZ; rpda[drv] = (uint16)(data & ~DA_MBZ);
sim_debug_bits(DBG_REG, &rp_dev, rp_reg_bits[ofs], old_reg, rpds[drv], 1); sim_debug_bits(DBG_REG, &rp_dev, rp_reg_bits[ofs], old_reg, rpds[drv], 1);
break; break;
@ -937,25 +937,25 @@ switch (ofs) { /* decode PA<5:1> */
case RP_MR_OF: case RM_MR_OF: /* RPMR */ case RP_MR_OF: case RM_MR_OF: /* RPMR */
old_reg = rpmr[drv]; old_reg = rpmr[drv];
rpmr[drv] = data; rpmr[drv] = (uint16)data;
sim_debug_bits(DBG_REG, &rp_dev, rp_reg_bits[ofs], old_reg, rpmr[drv], 1); sim_debug_bits(DBG_REG, &rp_dev, rp_reg_bits[ofs], old_reg, rpmr[drv], 1);
break; break;
case RP_OF_OF: case RM_OF_OF: /* RPOF */ case RP_OF_OF: case RM_OF_OF: /* RPOF */
old_reg = rpof[drv]; old_reg = rpof[drv];
rpof[drv] = data & ~OF_MBZ; rpof[drv] = (uint16)(data & ~OF_MBZ);
sim_debug_bits(DBG_REG, &rp_dev, rp_reg_bits[ofs], old_reg, rpof[drv], 1); sim_debug_bits(DBG_REG, &rp_dev, rp_reg_bits[ofs], old_reg, rpof[drv], 1);
break; break;
case RP_DC_OF: case RM_DC_OF: /* RPDC */ case RP_DC_OF: case RM_DC_OF: /* RPDC */
old_reg = rpdc[drv]; old_reg = rpdc[drv];
rpdc[drv] = data & ~DC_MBZ; rpdc[drv] = (uint16)(data & ~DC_MBZ);
sim_debug_bits(DBG_REG, &rp_dev, rp_reg_bits[ofs], old_reg, rpdc[drv], 1); sim_debug_bits(DBG_REG, &rp_dev, rp_reg_bits[ofs], old_reg, rpdc[drv], 1);
break; break;
case RM_MR2_OF: /* RMMR2 */ case RM_MR2_OF: /* RMMR2 */
old_reg = rmmr2[drv]; old_reg = rmmr2[drv];
rmmr2[drv] = data; rmmr2[drv] = (uint16)data;
sim_debug_bits(DBG_REG, &rp_dev, rp_reg_bits[ofs], old_reg, rmmr2[drv], 1); sim_debug_bits(DBG_REG, &rp_dev, rp_reg_bits[ofs], old_reg, rmmr2[drv], 1);
break; break;
@ -1171,7 +1171,7 @@ if (!uptr->io_complete) { /* Top End (I/O Initiation) Processing */
case FNC_WCHK: /* write check */ case FNC_WCHK: /* write check */
case FNC_READ: /* read */ case FNC_READ: /* read */
case FNC_READH: /* read headers */ case FNC_READH: /* read headers */
mbc = rpxbc[drv] = mba_get_bc (dibp->ba); /* get byte count */ mbc = rpxbc[drv] = (uint16)mba_get_bc (dibp->ba);/* get byte count */
wc = (mbc + 1) >> 1; /* convert to words */ wc = (mbc + 1) >> 1; /* convert to words */
if ((da + wc) > drv_tab[dtype].size) { /* disk overrun? */ if ((da + wc) > drv_tab[dtype].size) { /* disk overrun? */
rp_set_er (ER1_AOE, drv); /* set err */ rp_set_er (ER1_AOE, drv); /* set err */
@ -1242,10 +1242,10 @@ else { /* Bottom End (After I/O processing) */
if (da >= drv_tab[dtype].size) if (da >= drv_tab[dtype].size)
rpds[drv] = rpds[drv] | DS_LST; rpds[drv] = rpds[drv] | DS_LST;
da = da / RP_NUMWD; da = da / RP_NUMWD;
rpda[drv] = da % drv_tab[dtype].sect; rpda[drv] = (uint16)(da % drv_tab[dtype].sect);
da = da / drv_tab[dtype].sect; da = da / drv_tab[dtype].sect;
rpda[drv] = rpda[drv] | ((da % drv_tab[dtype].surf) << DA_V_SF); rpda[drv] = (uint16)(rpda[drv] | ((da % drv_tab[dtype].surf) << DA_V_SF));
rpdc[drv] = da / drv_tab[dtype].surf; rpdc[drv] = (uint16)(da / drv_tab[dtype].surf);
uptr->CYL = rpdc[drv]; uptr->CYL = rpdc[drv];
if (err != 0) { /* error? */ if (err != 0) { /* error? */
@ -1270,7 +1270,7 @@ return SCPE_OK;
/* Set drive error */ /* Set drive error */
void rp_set_er (int32 flag, int32 drv) void rp_set_er (int16 flag, int32 drv)
{ {
sim_debug(DBG_TRC, &rp_dev, "rp_set_er(rp%d, flag=0x%X)\n", drv, flag); sim_debug(DBG_TRC, &rp_dev, "rp_set_er(rp%d, flag=0x%X)\n", drv, flag);
rper1[drv] = rper1[drv] | flag; rper1[drv] = rper1[drv] | flag;
@ -1300,7 +1300,7 @@ return;
/* Drive status update */ /* Drive status update */
void rp_update_ds (int32 flag, int32 drv) void rp_update_ds (int16 flag, int32 drv)
{ {
uint16 o_ds = rpds[drv]; uint16 o_ds = rpds[drv];

305
PDP11/pdp11_rq.c
View file

@ -210,7 +210,7 @@ extern uint32 cpu_opt;
#define RQ_PKT_SIZE (RQ_PKT_SIZE_W * sizeof (int16)) #define RQ_PKT_SIZE (RQ_PKT_SIZE_W * sizeof (int16))
struct rqpkt { struct rqpkt {
int16 link; /* link to next */ uint16 link; /* link to next */
uint16 d[RQ_PKT_SIZE_W]; /* data */ uint16 d[RQ_PKT_SIZE_W]; /* data */
}; };
@ -681,74 +681,74 @@ x RA73 70(+1) 21 2667+ 21 1 ? 3920490
#define KRU50_MODEL 26 #define KRU50_MODEL 26
struct drvtyp { struct drvtyp {
int32 sect; /* sectors */ uint16 sect; /* sectors */
int32 surf; /* surfaces */ int32 surf; /* surfaces */
int32 cyl; /* cylinders */ int32 cyl; /* cylinders */
int32 tpg; /* trk/grp */ uint16 tpg; /* trk/grp */
int32 gpc; /* grp/cyl */ uint16 gpc; /* grp/cyl */
int32 xbn; /* XBN size */ int32 xbn; /* XBN size */
int32 dbn; /* DBN size */ int32 dbn; /* DBN size */
uint32 lbn; /* LBN size */ uint32 lbn; /* LBN size */
int32 rcts; /* RCT size */ uint16 rcts; /* RCT size */
int32 rctc; /* RCT copies */ int32 rctc; /* RCT copies */
int32 rbn; /* RBNs */ int32 rbn; /* RBNs */
int32 mod; /* MSCP model */ uint16 mod; /* MSCP model */
int32 med; /* MSCP media */ int32 med; /* MSCP media */
int32 flgs; /* flags */ int32 flgs; /* flags */
char *name; /* name */ char *name; /* name */
}; };
#define RQ_DRV(d) \ #define RQ_DRV(d) \
d##_SECT, d##_SURF, d##_CYL, d##_TPG, \ { d##_SECT, d##_SURF, d##_CYL, d##_TPG, \
d##_GPC, d##_XBN, d##_DBN, d##_LBN, \ d##_GPC, d##_XBN, d##_DBN, d##_LBN, \
d##_RCTS, d##_RCTC, d##_RBN, d##_MOD, \ d##_RCTS, d##_RCTC, d##_RBN, d##_MOD, \
d##_MED, d##_FLGS d##_MED, d##_FLGS, #d }
#define RQ_SIZE(d) d##_LBN #define RQ_SIZE(d) d##_LBN
static struct drvtyp drv_tab[] = { static struct drvtyp drv_tab[] = {
{ RQ_DRV (RX50), "RX50" }, RQ_DRV (RX50),
{ RQ_DRV (RX33), "RX33" }, RQ_DRV (RX33),
{ RQ_DRV (RD51), "RD51" }, RQ_DRV (RD51),
{ RQ_DRV (RD31), "RD31" }, RQ_DRV (RD31),
{ RQ_DRV (RD52), "RD52" }, RQ_DRV (RD52),
{ RQ_DRV (RD53), "RD53" }, RQ_DRV (RD53),
{ RQ_DRV (RD54), "RD54" }, RQ_DRV (RD54),
{ RQ_DRV (RA82), "RA82" }, RQ_DRV (RA82),
{ RQ_DRV (RRD40), "RRD40" }, RQ_DRV (RRD40),
{ RQ_DRV (RA72), "RA72" }, RQ_DRV (RA72),
{ RQ_DRV (RA90), "RA90" }, RQ_DRV (RA90),
{ RQ_DRV (RA92), "RA92" }, RQ_DRV (RA92),
{ RQ_DRV (RA8U), "RAUSER" }, RQ_DRV (RA8U),
{ RQ_DRV (RA60), "RA60" }, RQ_DRV (RA60),
{ RQ_DRV (RA81), "RA81" }, RQ_DRV (RA81),
{ RQ_DRV (RA71), "RA71" }, RQ_DRV (RA71),
{ RQ_DRV (RD32), "RD32" }, RQ_DRV (RD32),
{ RQ_DRV (RC25), "RC25" }, RQ_DRV (RC25),
{ RQ_DRV (RCF25), "RCF25" }, RQ_DRV (RCF25),
{ RQ_DRV (RA80), "RA80" }, RQ_DRV (RA80),
{ RQ_DRV (RA70), "RA70" }, RQ_DRV (RA70),
{ RQ_DRV (RA73), "RA73" }, RQ_DRV (RA73),
{ 0 } { 0 }
}; };
struct ctlrtyp { struct ctlrtyp {
uint32 uqpm; /* port model */ uint32 uqpm; /* port model */
uint32 model; /* controller model */ uint16 model; /* controller model */
char *name; /* name */ char *name; /* name */
}; };
#define RQ_CTLR(d) \ #define RQ_CTLR(d) \
d##_UQPM, d##_MODEL { d##_UQPM, d##_MODEL, #d }
static struct ctlrtyp ctlr_tab[] = { static struct ctlrtyp ctlr_tab[] = {
{ 0, 0, "DEFAULT" }, { 0, 0, "DEFAULT" },
{ RQ_CTLR (KLESI), "KLESI" }, RQ_CTLR (KLESI),
{ RQ_CTLR (RUX50), "RUX50" }, RQ_CTLR (RUX50),
{ RQ_CTLR (UDA50), "UDA50" }, RQ_CTLR (UDA50),
{ RQ_CTLR (RQDX3), "RQDX3" }, RQ_CTLR (RQDX3),
{ RQ_CTLR (KDA50), "KDA50" }, RQ_CTLR (KDA50),
{ RQ_CTLR (KRQ50), "KRQ50" }, RQ_CTLR (KRQ50),
{ RQ_CTLR (KRU50), "KRU50" }, RQ_CTLR (KRU50),
{ 0 } { 0 }
}; };
@ -761,19 +761,19 @@ int32 rq_xtime = RQ_XTIME; /* transfer time */
typedef struct { typedef struct {
uint32 cnum; /* ctrl number */ uint32 cnum; /* ctrl number */
uint32 ubase; /* unit base */ uint16 ubase; /* unit base */
uint32 sa; /* status, addr */ uint32 sa; /* status, addr */
uint32 saw; /* written data */ uint32 saw; /* written data */
uint32 s1dat; /* S1 data */ uint32 s1dat; /* S1 data */
uint32 comm; /* comm region */ uint32 comm; /* comm region */
uint32 csta; /* ctrl state */ uint32 csta; /* ctrl state */
uint32 perr; /* last error */ uint16 perr; /* last error */
uint32 cflgs; /* ctrl flags */ uint16 cflgs; /* ctrl flags */
uint32 irq; /* intr request */ uint32 irq; /* intr request */
uint32 prgi; /* purge int */ uint32 prgi; /* purge int */
uint32 pip; /* poll in progress */ uint32 pip; /* poll in progress */
int32 freq; /* free list */ uint16 freq; /* free list */
int32 rspq; /* resp list */ uint16 rspq; /* resp list */
uint32 pbsy; /* #busy pkts */ uint32 pbsy; /* #busy pkts */
uint32 credits; /* credits */ uint32 credits; /* credits */
uint32 hat; /* host timer */ uint32 hat; /* host timer */
@ -856,42 +856,42 @@ t_stat rq_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
char *rq_description (DEVICE *dptr); char *rq_description (DEVICE *dptr);
t_bool rq_step4 (MSC *cp); t_bool rq_step4 (MSC *cp);
t_bool rq_mscp (MSC *cp, int32 pkt, t_bool q); t_bool rq_mscp (MSC *cp, uint16 pkt, t_bool q);
t_bool rq_abo (MSC *cp, int32 pkt, t_bool q); t_bool rq_abo (MSC *cp, uint16 pkt, t_bool q);
t_bool rq_avl (MSC *cp, int32 pkt, t_bool q); t_bool rq_avl (MSC *cp, uint16 pkt, t_bool q);
t_bool rq_fmt (MSC *cp, int32 pkt, t_bool q); t_bool rq_fmt (MSC *cp, uint16 pkt, t_bool q);
t_bool rq_gcs (MSC *cp, int32 pkt, t_bool q); t_bool rq_gcs (MSC *cp, uint16 pkt, t_bool q);
t_bool rq_gus (MSC *cp, int32 pkt, t_bool q); t_bool rq_gus (MSC *cp, uint16 pkt, t_bool q);
t_bool rq_onl (MSC *cp, int32 pkt, t_bool q); t_bool rq_onl (MSC *cp, uint16 pkt, t_bool q);
t_bool rq_rw (MSC *cp, int32 pkt, t_bool q); t_bool rq_rw (MSC *cp, uint16 pkt, t_bool q);
t_bool rq_scc (MSC *cp, int32 pkt, t_bool q); t_bool rq_scc (MSC *cp, uint16 pkt, t_bool q);
t_bool rq_suc (MSC *cp, int32 pkt, t_bool q); t_bool rq_suc (MSC *cp, uint16 pkt, t_bool q);
t_bool rq_plf (MSC *cp, uint32 err); t_bool rq_plf (MSC *cp, uint16 err);
t_bool rq_dte (MSC *cp, UNIT *uptr, uint32 err); t_bool rq_dte (MSC *cp, UNIT *uptr, uint16 err);
t_bool rq_hbe (MSC *cp, UNIT *uptr); t_bool rq_hbe (MSC *cp, UNIT *uptr);
t_bool rq_una (MSC *cp, int32 un); t_bool rq_una (MSC *cp, uint16 un);
t_bool rq_deqf (MSC *cp, int32 *pkt); t_bool rq_deqf (MSC *cp, uint16 *pkt);
int32 rq_deqh (MSC *cp, int32 *lh); uint16 rq_deqh (MSC *cp, uint16 *lh);
void rq_enqh (MSC *cp, int32 *lh, int32 pkt); void rq_enqh (MSC *cp, uint16 *lh, uint16 pkt);
void rq_enqt (MSC *cp, int32 *lh, int32 pkt); void rq_enqt (MSC *cp, uint16 *lh, uint16 pkt);
t_bool rq_getpkt (MSC *cp, int32 *pkt); t_bool rq_getpkt (MSC *cp, uint16 *pkt);
t_bool rq_putpkt (MSC *cp, int32 pkt, t_bool qt); t_bool rq_putpkt (MSC *cp, uint16 pkt, t_bool qt);
t_bool rq_getdesc (MSC *cp, struct uq_ring *ring, uint32 *desc); t_bool rq_getdesc (MSC *cp, struct uq_ring *ring, uint32 *desc);
t_bool rq_putdesc (MSC *cp, struct uq_ring *ring, uint32 desc); t_bool rq_putdesc (MSC *cp, struct uq_ring *ring, uint32 desc);
int32 rq_rw_valid (MSC *cp, int32 pkt, UNIT *uptr, uint32 cmd); uint16 rq_rw_valid (MSC *cp, uint16 pkt, UNIT *uptr, uint16 cmd);
t_bool rq_rw_end (MSC *cp, UNIT *uptr, uint32 flg, uint32 sts); t_bool rq_rw_end (MSC *cp, UNIT *uptr, uint16 flg, uint16 sts);
uint32 rq_map_ba (uint32 ba, uint32 ma); uint32 rq_map_ba (uint32 ba, uint32 ma);
int32 rq_readb (uint32 ba, int32 bc, uint32 ma, uint8 *buf); int32 rq_readb (uint32 ba, int32 bc, uint32 ma, uint8 *buf);
int32 rq_readw (uint32 ba, int32 bc, uint32 ma, uint16 *buf); int32 rq_readw (uint32 ba, int32 bc, uint32 ma, uint16 *buf);
int32 rq_writew (uint32 ba, int32 bc, uint32 ma, uint16 *buf); int32 rq_writew (uint32 ba, int32 bc, uint32 ma, uint16 *buf);
void rq_putr (MSC *cp, int32 pkt, uint32 cmd, uint32 flg, void rq_putr (MSC *cp, uint16 pkt, uint16 cmd, uint16 flg,
uint32 sts, uint32 lnt, uint32 typ); uint16 sts, uint16 lnt, uint16 typ);
void rq_putr_unit (MSC *cp, int32 pkt, UNIT *uptr, uint32 lu, t_bool all); void rq_putr_unit (MSC *cp, uint16 pkt, UNIT *uptr, uint16 lu, t_bool all);
void rq_setf_unit (MSC *cp, int32 pkt, UNIT *uptr); void rq_setf_unit (MSC *cp, uint16 pkt, UNIT *uptr);
void rq_init_int (MSC *cp); void rq_init_int (MSC *cp);
void rq_ring_int (MSC *cp, struct uq_ring *ring); void rq_ring_int (MSC *cp, struct uq_ring *ring);
t_bool rq_fatal (MSC *cp, uint32 err); t_bool rq_fatal (MSC *cp, uint16 err);
UNIT *rq_getucb (MSC *cp, uint32 lu); UNIT *rq_getucb (MSC *cp, uint16 lu);
int32 rq_map_pa (uint32 pa); int32 rq_map_pa (uint32 pa);
void rq_setint (MSC *cp); void rq_setint (MSC *cp);
void rq_clrint (MSC *cp); void rq_clrint (MSC *cp);
@ -1444,7 +1444,7 @@ return OK;
t_stat rq_quesvc (UNIT *uptr) t_stat rq_quesvc (UNIT *uptr)
{ {
int32 i, cnid; int32 i, cnid;
int32 pkt = 0; uint16 pkt = 0;
UNIT *nuptr; UNIT *nuptr;
MSC *cp = rq_ctxmap[uptr->cnum]; MSC *cp = rq_ctxmap[uptr->cnum];
DEVICE *dptr = rq_devmap[uptr->cnum]; DEVICE *dptr = rq_devmap[uptr->cnum];
@ -1523,7 +1523,7 @@ for (i = 0; i < RQ_NUMDR; i++) { /* chk unit q's */
nuptr = dptr->units + i; /* ptr to unit */ nuptr = dptr->units + i; /* ptr to unit */
if (nuptr->cpkt || (nuptr->pktq == 0)) if (nuptr->cpkt || (nuptr->pktq == 0))
continue; continue;
pkt = rq_deqh (cp, &nuptr->pktq); /* get top of q */ pkt = rq_deqh (cp, (uint16 *)&nuptr->pktq); /* get top of q */
if (!rq_mscp (cp, pkt, FALSE)) /* process */ if (!rq_mscp (cp, pkt, FALSE)) /* process */
return SCPE_OK; return SCPE_OK;
} }
@ -1568,7 +1568,7 @@ return SCPE_OK; /* done */
t_stat rq_tmrsvc (UNIT *uptr) t_stat rq_tmrsvc (UNIT *uptr)
{ {
int32 i; uint16 i;
UNIT *nuptr; UNIT *nuptr;
MSC *cp = rq_ctxmap[uptr->cnum]; MSC *cp = rq_ctxmap[uptr->cnum];
DEVICE *dptr = rq_devmap[uptr->cnum]; DEVICE *dptr = rq_devmap[uptr->cnum];
@ -1592,9 +1592,9 @@ return SCPE_OK;
/* MSCP packet handling */ /* MSCP packet handling */
t_bool rq_mscp (MSC *cp, int32 pkt, t_bool q) t_bool rq_mscp (MSC *cp, uint16 pkt, t_bool q)
{ {
uint32 sts, cmd = GETP (pkt, CMD_OPC, OPC); uint16 sts, cmd = GETP (pkt, CMD_OPC, OPC);
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_mscp - %s\n", q? "Queue" : "No Queue"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_mscp - %s\n", q? "Queue" : "No Queue");
@ -1650,12 +1650,12 @@ return rq_putpkt (cp, pkt, TRUE);
/* Abort a command - 1st parameter is ref # of cmd to abort */ /* Abort a command - 1st parameter is ref # of cmd to abort */
t_bool rq_abo (MSC *cp, int32 pkt, t_bool q) t_bool rq_abo (MSC *cp, uint16 pkt, t_bool q)
{ {
uint32 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */ uint16 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */ uint16 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 ref = GETP32 (pkt, ABO_REFL); /* cmd ref # */ uint32 ref = GETP32 (pkt, ABO_REFL); /* cmd ref # */
int32 tpkt, prv; uint16 tpkt, prv;
UNIT *uptr; UNIT *uptr;
DEVICE *dptr = rq_devmap[cp->cnum]; DEVICE *dptr = rq_devmap[cp->cnum];
@ -1665,17 +1665,17 @@ tpkt = 0; /* set no mtch */
if ((uptr = rq_getucb (cp, lu))) { /* get unit */ if ((uptr = rq_getucb (cp, lu))) { /* get unit */
if (uptr->cpkt && /* curr pkt? */ if (uptr->cpkt && /* curr pkt? */
(GETP32 (uptr->cpkt, CMD_REFL) == ref)) { /* match ref? */ (GETP32 (uptr->cpkt, CMD_REFL) == ref)) { /* match ref? */
tpkt = uptr->cpkt; /* save match */ tpkt = (uint16)uptr->cpkt; /* save match */
uptr->cpkt = 0; /* gonzo */ uptr->cpkt = 0; /* gonzo */
sim_cancel (uptr); /* cancel unit */ sim_cancel (uptr); /* cancel unit */
sim_activate (dptr->units + RQ_QUEUE, rq_qtime); sim_activate (dptr->units + RQ_QUEUE, rq_qtime);
} }
else if (uptr->pktq && /* head of q? */ else if (uptr->pktq && /* head of q? */
(GETP32 (uptr->pktq, CMD_REFL) == ref)) { /* match ref? */ (GETP32 (uptr->pktq, CMD_REFL) == ref)) { /* match ref? */
tpkt = uptr->pktq; /* save match */ tpkt = (uint16)uptr->pktq; /* save match */
uptr->pktq = cp->pak[tpkt].link; /* unlink */ uptr->pktq = cp->pak[tpkt].link; /* unlink */
} }
else if ((prv = uptr->pktq)) { /* srch pkt q */ else if ((prv = (uint16)uptr->pktq)) { /* srch pkt q */
while ((tpkt = cp->pak[prv].link)) { /* walk list */ while ((tpkt = cp->pak[prv].link)) { /* walk list */
if (GETP32 (tpkt, RSP_REFL) == ref) { /* match? unlink */ if (GETP32 (tpkt, RSP_REFL) == ref) { /* match? unlink */
cp->pak[prv].link = cp->pak[tpkt].link; cp->pak[prv].link = cp->pak[tpkt].link;
@ -1685,7 +1685,7 @@ if ((uptr = rq_getucb (cp, lu))) { /* get unit */
} }
} }
if (tpkt) { /* found target? */ if (tpkt) { /* found target? */
uint32 tcmd = GETP (tpkt, CMD_OPC, OPC); /* get opcode */ uint16 tcmd = GETP (tpkt, CMD_OPC, OPC); /* get opcode */
rq_putr (cp, tpkt, tcmd | OP_END, 0, ST_ABO, RSP_LNT, UQ_TYP_SEQ); rq_putr (cp, tpkt, tcmd | OP_END, 0, ST_ABO, RSP_LNT, UQ_TYP_SEQ);
if (!rq_putpkt (cp, tpkt, TRUE)) if (!rq_putpkt (cp, tpkt, TRUE))
return ERR; return ERR;
@ -1697,19 +1697,19 @@ return rq_putpkt (cp, pkt, TRUE);
/* Unit available - set unit status to available - defer if q'd cmds */ /* Unit available - set unit status to available - defer if q'd cmds */
t_bool rq_avl (MSC *cp, int32 pkt, t_bool q) t_bool rq_avl (MSC *cp, uint16 pkt, t_bool q)
{ {
uint32 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */ uint16 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */ uint16 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 mdf = cp->pak[pkt].d[CMD_MOD]; /* modifier */ uint32 mdf = cp->pak[pkt].d[CMD_MOD]; /* modifier */
uint32 sts; uint16 sts;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_avl\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_avl\n");
if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, (uint16 *)&uptr->pktq, pkt); /* do later */
return OK; return OK;
} }
uptr->flags = uptr->flags & ~UNIT_ONL; /* not online */ uptr->flags = uptr->flags & ~UNIT_ONL; /* not online */
@ -1725,10 +1725,10 @@ return rq_putpkt (cp, pkt, TRUE);
/* Get command status - only interested in active xfr cmd */ /* Get command status - only interested in active xfr cmd */
t_bool rq_gcs (MSC *cp, int32 pkt, t_bool q) t_bool rq_gcs (MSC *cp, uint16 pkt, t_bool q)
{ {
uint32 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */ uint16 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */ uint16 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 ref = GETP32 (pkt, GCS_REFL); /* ref # */ uint32 ref = GETP32 (pkt, GCS_REFL); /* ref # */
int32 tpkt; int32 tpkt;
UNIT *uptr; UNIT *uptr;
@ -1752,11 +1752,11 @@ return rq_putpkt (cp, pkt, TRUE);
/* Get unit status */ /* Get unit status */
t_bool rq_gus (MSC *cp, int32 pkt, t_bool q) t_bool rq_gus (MSC *cp, uint16 pkt, t_bool q)
{ {
uint32 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */ uint16 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */ uint16 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 dtyp, sts, rbpar; uint16 dtyp, sts, rbpar;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_gus\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_gus\n");
@ -1795,18 +1795,18 @@ return rq_putpkt (cp, pkt, TRUE);
/* Unit online - defer if q'd commands */ /* Unit online - defer if q'd commands */
t_bool rq_onl (MSC *cp, int32 pkt, t_bool q) t_bool rq_onl (MSC *cp, uint16 pkt, t_bool q)
{ {
uint32 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */ uint16 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */ uint16 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 sts; uint16 sts;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_onl\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_onl\n");
if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, (uint16 *)&uptr->pktq, pkt); /* do later */
return OK; return OK;
} }
if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */ if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */
@ -1832,9 +1832,9 @@ return rq_putpkt (cp, pkt, TRUE);
/* Set controller characteristics */ /* Set controller characteristics */
t_bool rq_scc (MSC *cp, int32 pkt, t_bool q) t_bool rq_scc (MSC *cp, uint16 pkt, t_bool q)
{ {
int32 sts, cmd; uint16 sts, cmd;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_scc\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_scc\n");
@ -1867,18 +1867,18 @@ return rq_putpkt (cp, pkt, TRUE);
/* Set unit characteristics - defer if q'd commands */ /* Set unit characteristics - defer if q'd commands */
t_bool rq_suc (MSC *cp, int32 pkt, t_bool q) t_bool rq_suc (MSC *cp, uint16 pkt, t_bool q)
{ {
uint32 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */ uint16 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */ uint16 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 sts; uint16 sts;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_suc\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_suc\n");
if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, (uint16 *)&uptr->pktq, pkt); /* do later */
return OK; return OK;
} }
if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */ if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */
@ -1898,18 +1898,18 @@ return rq_putpkt (cp, pkt, TRUE);
/* Format command - floppies only */ /* Format command - floppies only */
t_bool rq_fmt (MSC *cp, int32 pkt, t_bool q) t_bool rq_fmt (MSC *cp, uint16 pkt, t_bool q)
{ {
uint32 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */ uint16 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */ uint16 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 sts; uint16 sts;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_fmt\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_fmt\n");
if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, (uint16 *)&uptr->pktq, pkt); /* do later */
return OK; return OK;
} }
if (GET_DTYPE (uptr->flags) != RX33_DTYPE) /* RX33? */ if (GET_DTYPE (uptr->flags) != RX33_DTYPE) /* RX33? */
@ -1934,11 +1934,11 @@ return rq_putpkt (cp, pkt, TRUE);
/* Data transfer commands */ /* Data transfer commands */
t_bool rq_rw (MSC *cp, int32 pkt, t_bool q) t_bool rq_rw (MSC *cp, uint16 pkt, t_bool q)
{ {
uint32 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */ uint16 lu = cp->pak[pkt].d[CMD_UN]; /* unit # */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */ uint16 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 sts; uint16 sts;
UNIT *uptr; UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw(lu=%d, pkt=%d, queue=%s)\n", lu, pkt, q?"yes" : "no"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw(lu=%d, pkt=%d, queue=%s)\n", lu, pkt, q?"yes" : "no");
@ -1946,7 +1946,7 @@ sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw(lu=%d, pkt=%d, queue=%s)\n", lu,
if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw - queued\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw - queued\n");
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, (uint16 *)&uptr->pktq, pkt); /* do later */
return OK; return OK;
} }
sts = rq_rw_valid (cp, pkt, uptr, cmd); /* validity checks */ sts = rq_rw_valid (cp, pkt, uptr, cmd); /* validity checks */
@ -1974,7 +1974,7 @@ return rq_putpkt (cp, pkt, TRUE);
/* Validity checks */ /* Validity checks */
int32 rq_rw_valid (MSC *cp, int32 pkt, UNIT *uptr, uint32 cmd) uint16 rq_rw_valid (MSC *cp, uint16 pkt, UNIT *uptr, uint16 cmd)
{ {
uint32 dtyp = GET_DTYPE (uptr->flags); /* get drive type */ uint32 dtyp = GET_DTYPE (uptr->flags); /* get drive type */
uint32 lbn = GETP32 (pkt, RW_LBNL); /* get lbn */ uint32 lbn = GETP32 (pkt, RW_LBNL); /* get lbn */
@ -2256,10 +2256,10 @@ return SCPE_OK;
/* Transfer command complete */ /* Transfer command complete */
t_bool rq_rw_end (MSC *cp, UNIT *uptr, uint32 flg, uint32 sts) t_bool rq_rw_end (MSC *cp, UNIT *uptr, uint16 flg, uint16 sts)
{ {
int32 pkt = uptr->cpkt; /* packet */ uint16 pkt = (uint16)uptr->cpkt; /* packet */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* get cmd */ uint16 cmd = GETP (pkt, CMD_OPC, OPC); /* get cmd */
uint32 bc = GETP32 (pkt, RW_BCL); /* init bc */ uint32 bc = GETP32 (pkt, RW_BCL); /* init bc */
uint32 wbc = GETP32 (pkt, RW_WBCL); /* work bc */ uint32 wbc = GETP32 (pkt, RW_WBCL); /* work bc */
DEVICE *dptr = rq_devmap[uptr->cnum]; DEVICE *dptr = rq_devmap[uptr->cnum];
@ -2286,10 +2286,11 @@ return OK;
/* Data transfer error log packet */ /* Data transfer error log packet */
t_bool rq_dte (MSC *cp, UNIT *uptr, uint32 err) t_bool rq_dte (MSC *cp, UNIT *uptr, uint16 err)
{ {
int32 pkt, tpkt; uint16 pkt, tpkt;
uint32 lu, dtyp, lbn, ccyl, csurf, csect, t; uint16 lu, ccyl, csurf, csect;
uint32 dtyp, lbn, t;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_dte\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_dte\n");
@ -2297,7 +2298,7 @@ if ((cp->cflgs & CF_THS) == 0) /* logging? */
return OK; return OK;
if (!rq_deqf (cp, &pkt)) /* get log pkt */ if (!rq_deqf (cp, &pkt)) /* get log pkt */
return ERR; return ERR;
tpkt = uptr->cpkt; /* rw pkt */ tpkt = (uint16)uptr->cpkt; /* rw pkt */
lu = cp->pak[tpkt].d[CMD_UN]; /* unit # */ lu = cp->pak[tpkt].d[CMD_UN]; /* unit # */
lbn = GETP32 (tpkt, RW_WBLL); /* recent LBN */ lbn = GETP32 (tpkt, RW_WBLL); /* recent LBN */
dtyp = GET_DTYPE (uptr->flags); /* drv type */ dtyp = GET_DTYPE (uptr->flags); /* drv type */
@ -2305,10 +2306,10 @@ if (drv_tab[dtyp].flgs & RQDF_SDI) /* SDI? ovhd @ end */
t = 0; t = 0;
else t = (drv_tab[dtyp].xbn + drv_tab[dtyp].dbn) / /* ovhd cylinders */ else t = (drv_tab[dtyp].xbn + drv_tab[dtyp].dbn) / /* ovhd cylinders */
(drv_tab[dtyp].sect * drv_tab[dtyp].surf); (drv_tab[dtyp].sect * drv_tab[dtyp].surf);
ccyl = t + (lbn / drv_tab[dtyp].cyl); /* curr real cyl */ ccyl = (uint16)(t + (lbn / drv_tab[dtyp].cyl)); /* curr real cyl */
t = lbn % drv_tab[dtyp].cyl; /* trk relative blk */ t = lbn % drv_tab[dtyp].cyl; /* trk relative blk */
csurf = t / drv_tab[dtyp].surf; /* curr surf */ csurf = (uint16)(t / drv_tab[dtyp].surf); /* curr surf */
csect = t % drv_tab[dtyp].surf; /* curr sect */ csect = (uint16)(t % drv_tab[dtyp].surf); /* curr sect */
cp->pak[pkt].d[ELP_REFL] = cp->pak[tpkt].d[CMD_REFL]; /* copy cmd ref */ cp->pak[pkt].d[ELP_REFL] = cp->pak[tpkt].d[CMD_REFL]; /* copy cmd ref */
cp->pak[pkt].d[ELP_REFH] = cp->pak[tpkt].d[CMD_REFH]; cp->pak[pkt].d[ELP_REFH] = cp->pak[tpkt].d[CMD_REFH];
@ -2343,7 +2344,7 @@ return rq_putpkt (cp, pkt, TRUE);
t_bool rq_hbe (MSC *cp, UNIT *uptr) t_bool rq_hbe (MSC *cp, UNIT *uptr)
{ {
int32 pkt, tpkt; uint16 pkt, tpkt;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_hbe\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_hbe\n");
@ -2351,7 +2352,7 @@ if ((cp->cflgs & CF_THS) == 0) /* logging? */
return OK; return OK;
if (!rq_deqf (cp, &pkt)) /* get log pkt */ if (!rq_deqf (cp, &pkt)) /* get log pkt */
return ERR; return ERR;
tpkt = uptr->cpkt; /* rw pkt */ tpkt = (uint16)uptr->cpkt; /* rw pkt */
cp->pak[pkt].d[ELP_REFL] = cp->pak[tpkt].d[CMD_REFL]; /* copy cmd ref */ cp->pak[pkt].d[ELP_REFL] = cp->pak[tpkt].d[CMD_REFL]; /* copy cmd ref */
cp->pak[pkt].d[ELP_REFH] = cp->pak[tpkt].d[CMD_REFH]; cp->pak[pkt].d[ELP_REFH] = cp->pak[tpkt].d[CMD_REFH];
cp->pak[pkt].d[ELP_UN] = cp->pak[tpkt].d[CMD_UN]; /* copy unit */ cp->pak[pkt].d[ELP_UN] = cp->pak[tpkt].d[CMD_UN]; /* copy unit */
@ -2372,9 +2373,9 @@ return rq_putpkt (cp, pkt, TRUE);
/* Port last failure error log packet */ /* Port last failure error log packet */
t_bool rq_plf (MSC *cp, uint32 err) t_bool rq_plf (MSC *cp, uint16 err)
{ {
int32 pkt; uint16 pkt;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_plf\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_plf\n");
@ -2399,10 +2400,10 @@ return rq_putpkt (cp, pkt, TRUE);
/* Unit now available attention packet */ /* Unit now available attention packet */
t_bool rq_una (MSC *cp, int32 un) t_bool rq_una (MSC *cp, uint16 un)
{ {
int32 pkt; uint16 pkt;
uint32 lu = cp->ubase + un; uint16 lu = cp->ubase + un;
UNIT *uptr = rq_getucb (cp, lu); UNIT *uptr = rq_getucb (cp, lu);
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_una (Unit=%d)\n", lu); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_una (Unit=%d)\n", lu);
@ -2427,7 +2428,7 @@ return rq_putpkt (cp, pkt, TRUE);
rq_enqt - enqueue at tail of list rq_enqt - enqueue at tail of list
*/ */
t_bool rq_deqf (MSC *cp, int32 *pkt) t_bool rq_deqf (MSC *cp, uint16 *pkt)
{ {
*pkt = 0; *pkt = 0;
if (cp->freq == 0) /* no free pkts?? */ if (cp->freq == 0) /* no free pkts?? */
@ -2438,16 +2439,16 @@ cp->freq = cp->pak[cp->freq].link; /* next */
return OK; return OK;
} }
int32 rq_deqh (MSC *cp, int32 *lh) uint16 rq_deqh (MSC *cp, uint16 *lh)
{ {
int32 ptr = *lh; /* head of list */ uint16 ptr = *lh; /* head of list */
if (ptr) /* next */ if (ptr) /* next */
*lh = cp->pak[ptr].link; *lh = cp->pak[ptr].link;
return ptr; return ptr;
} }
void rq_enqh (MSC *cp, int32 *lh, int32 pkt) void rq_enqh (MSC *cp, uint16 *lh, uint16 pkt)
{ {
if (pkt == 0) /* any pkt? */ if (pkt == 0) /* any pkt? */
return; return;
@ -2456,7 +2457,7 @@ cp->pak[pkt].link = *lh; /* link is old lh */
return; return;
} }
void rq_enqt (MSC *cp, int32 *lh, int32 pkt) void rq_enqt (MSC *cp, uint16 *lh, uint16 pkt)
{ {
if (pkt == 0) /* any pkt? */ if (pkt == 0) /* any pkt? */
return; return;
@ -2476,7 +2477,7 @@ return;
/* Get packet from command ring */ /* Get packet from command ring */
t_bool rq_getpkt (MSC *cp, int32 *pkt) t_bool rq_getpkt (MSC *cp, uint16 *pkt)
{ {
uint32 addr, desc; uint32 addr, desc;
@ -2501,7 +2502,7 @@ return rq_putdesc (cp, &cp->cq, desc); /* release desc */
supplies one credit for every response packet sent over. Simple! supplies one credit for every response packet sent over. Simple!
*/ */
t_bool rq_putpkt (MSC *cp, int32 pkt, t_bool qt) t_bool rq_putpkt (MSC *cp, uint16 pkt, t_bool qt)
{ {
uint32 addr, desc, lnt, cr; uint32 addr, desc, lnt, cr;
DEVICE *dptr = rq_devmap[cp->cnum]; DEVICE *dptr = rq_devmap[cp->cnum];
@ -2584,7 +2585,7 @@ return OK;
/* Get unit descriptor for logical unit */ /* Get unit descriptor for logical unit */
UNIT *rq_getucb (MSC *cp, uint32 lu) UNIT *rq_getucb (MSC *cp, uint16 lu)
{ {
DEVICE *dptr = rq_devmap[cp->cnum]; DEVICE *dptr = rq_devmap[cp->cnum];
UNIT *uptr; UNIT *uptr;
@ -2599,7 +2600,7 @@ return uptr;
/* Hack unit flags */ /* Hack unit flags */
void rq_setf_unit (MSC *cp, int32 pkt, UNIT *uptr) void rq_setf_unit (MSC *cp, uint16 pkt, UNIT *uptr)
{ {
uptr->uf = cp->pak[pkt].d[ONL_UFL] & UF_MSK; /* settable flags */ uptr->uf = cp->pak[pkt].d[ONL_UFL] & UF_MSK; /* settable flags */
if ((cp->pak[pkt].d[CMD_MOD] & MD_SWP) && /* swre wrp enb? */ if ((cp->pak[pkt].d[CMD_MOD] & MD_SWP) && /* swre wrp enb? */
@ -2610,7 +2611,7 @@ return;
/* Unit response fields */ /* Unit response fields */
void rq_putr_unit (MSC *cp, int32 pkt, UNIT *uptr, uint32 lu, t_bool all) void rq_putr_unit (MSC *cp, uint16 pkt, UNIT *uptr, uint16 lu, t_bool all)
{ {
uint32 dtyp = GET_DTYPE (uptr->flags); /* get drive type */ uint32 dtyp = GET_DTYPE (uptr->flags); /* get drive type */
uint32 maxlbn = (uint32)uptr->capac; /* get max lbn */ uint32 maxlbn = (uint32)uptr->capac; /* get max lbn */
@ -2618,7 +2619,7 @@ uint32 maxlbn = (uint32)uptr->capac; /* get max lbn */
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_putr_unit\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_putr_unit\n");
cp->pak[pkt].d[ONL_MLUN] = lu; /* unit */ cp->pak[pkt].d[ONL_MLUN] = lu; /* unit */
cp->pak[pkt].d[ONL_UFL] = uptr->uf | UF_RPL | RQ_WPH (uptr) | RQ_RMV (uptr); cp->pak[pkt].d[ONL_UFL] = (uint16)(uptr->uf | UF_RPL | RQ_WPH (uptr) | RQ_RMV (uptr));
cp->pak[pkt].d[ONL_RSVL] = 0; /* reserved */ cp->pak[pkt].d[ONL_RSVL] = 0; /* reserved */
cp->pak[pkt].d[ONL_RSVH] = 0; cp->pak[pkt].d[ONL_RSVH] = 0;
cp->pak[pkt].d[ONL_UIDA] = lu; /* UID low */ cp->pak[pkt].d[ONL_UIDA] = lu; /* UID low */
@ -2637,8 +2638,8 @@ return;
/* UQ_HDR and RSP_OP fields */ /* UQ_HDR and RSP_OP fields */
void rq_putr (MSC *cp, int32 pkt, uint32 cmd, uint32 flg, void rq_putr (MSC *cp, uint16 pkt, uint16 cmd, uint16 flg,
uint32 sts, uint32 lnt, uint32 typ) uint16 sts, uint16 lnt, uint16 typ)
{ {
cp->pak[pkt].d[RSP_OPF] = (cmd << RSP_OPF_V_OPC) | /* set cmd, flg */ cp->pak[pkt].d[RSP_OPF] = (cmd << RSP_OPF_V_OPC) | /* set cmd, flg */
(flg << RSP_OPF_V_FLG); (flg << RSP_OPF_V_FLG);
@ -2727,7 +2728,7 @@ return 0; /* no intr req */
/* Fatal error */ /* Fatal error */
t_bool rq_fatal (MSC *cp, uint32 err) t_bool rq_fatal (MSC *cp, uint16 err)
{ {
DEVICE *dptr = rq_devmap[cp->cnum]; DEVICE *dptr = rq_devmap[cp->cnum];
@ -2875,7 +2876,7 @@ if (cp->ctype == DEFAULT_CTYPE)
#if defined (VM_VAX) /* VAX */ #if defined (VM_VAX) /* VAX */
cp->ubase = 0; /* unit base = 0 */ cp->ubase = 0; /* unit base = 0 */
#else /* PDP-11 */ #else /* PDP-11 */
cp->ubase = cidx * RQ_NUMDR; /* init unit base */ cp->ubase = (uint16)(cidx * RQ_NUMDR); /* init unit base */
#endif #endif
cp->csta = CST_S1; /* init stage 1 */ cp->csta = CST_S1; /* init stage 1 */

15
PDP11/pdp11_rs.c
View file

@ -180,9 +180,9 @@ t_stat rs_reset (DEVICE *dptr);
t_stat rs_attach (UNIT *uptr, char *cptr); t_stat rs_attach (UNIT *uptr, char *cptr);
t_stat rs_detach (UNIT *uptr); t_stat rs_detach (UNIT *uptr);
t_stat rs_boot (int32 unitno, DEVICE *dptr); t_stat rs_boot (int32 unitno, DEVICE *dptr);
void rs_set_er (int32 flg, int32 drv); void rs_set_er (uint16 flg, int32 drv);
void rs_clr_as (int32 mask); void rs_clr_as (int32 mask);
void rs_update_ds (int32 flg, int32 drv); void rs_update_ds (uint16 flg, int32 drv);
t_stat rs_go (int32 drv); t_stat rs_go (int32 drv);
t_stat rs_set_size (UNIT *uptr, int32 val, char *cptr, void *desc); t_stat rs_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
int32 rs_abort (void); int32 rs_abort (void);
@ -353,7 +353,7 @@ switch (ofs) { /* decode PA<5:1> */
break; break;
case RS_DA_OF: /* RSDA */ case RS_DA_OF: /* RSDA */
rsda[drv] = data; rsda[drv] = (uint16)data;
break; break;
case RS_AS_OF: /* RSAS */ case RS_AS_OF: /* RSAS */
@ -361,7 +361,7 @@ switch (ofs) { /* decode PA<5:1> */
break; break;
case RS_MR_OF: /* RSMR */ case RS_MR_OF: /* RSMR */
rsmr[drv] = data; rsmr[drv] = (uint16)data;
break; break;
case RS_ER_OF: /* RSER */ case RS_ER_OF: /* RSER */
@ -515,7 +515,7 @@ switch (fnc) { /* case on function */
da = da + wc + (RS_NUMWD (dtype) - 1); da = da + wc + (RS_NUMWD (dtype) - 1);
if (da >= RS_SIZE (dtype)) if (da >= RS_SIZE (dtype))
rsds[drv] = rsds[drv] | DS_LST; rsds[drv] = rsds[drv] | DS_LST;
rsda[drv] = da / RS_NUMWD (dtype); rsda[drv] = (uint16)(da / RS_NUMWD (dtype));
mba_set_don (rs_dib.ba); /* set done */ mba_set_don (rs_dib.ba); /* set done */
rs_update_ds (0, drv); /* update ds */ rs_update_ds (0, drv); /* update ds */
break; break;
@ -529,7 +529,7 @@ return SCPE_OK;
/* Set drive error */ /* Set drive error */
void rs_set_er (int32 flag, int32 drv) void rs_set_er (uint16 flag, int32 drv)
{ {
rser[drv] = rser[drv] | flag; rser[drv] = rser[drv] | flag;
rsds[drv] = rsds[drv] | DS_ATA; rsds[drv] = rsds[drv] | DS_ATA;
@ -555,7 +555,7 @@ return;
/* Drive status update */ /* Drive status update */
void rs_update_ds (int32 flag, int32 drv) void rs_update_ds (uint16 flag, int32 drv)
{ {
if (flag & DS_ATA) if (flag & DS_ATA)
mba_upd_ata (rs_dib.ba, 1); mba_upd_ata (rs_dib.ba, 1);
@ -690,7 +690,6 @@ t_stat rs_boot (int32 unitno, DEVICE *dptr)
{ {
size_t i; size_t i;
extern uint16 *M; extern uint16 *M;
UNIT *uptr = rs_dev.units + unitno;
for (i = 0; i < BOOT_LEN; i++) for (i = 0; i < BOOT_LEN; i++)
M[(BOOT_START >> 1) + i] = boot_rom[i]; M[(BOOT_START >> 1) + i] = boot_rom[i];

2
PDP11/pdp11_rx.c
View file

@ -353,7 +353,7 @@ switch (rx_state) { /* case on state */
break; break;
case FILL: /* fill buffer */ case FILL: /* fill buffer */
rx_buf[rx_bptr] = rx_dbr; /* write next */ rx_buf[rx_bptr] = (uint8)rx_dbr; /* write next */
rx_bptr = rx_bptr + 1; rx_bptr = rx_bptr + 1;
if (rx_bptr < RX_NUMBY) /* more? set xfer */ if (rx_bptr < RX_NUMBY) /* more? set xfer */
rx_csr = rx_csr | RXCS_TR; rx_csr = rx_csr | RXCS_TR;

20
PDP11/pdp11_ry.c
View file

@ -145,11 +145,11 @@ extern int32 int_req[IPL_HLVL];
int32 ry_csr = 0; /* control/status */ int32 ry_csr = 0; /* control/status */
int32 ry_dbr = 0; /* data buffer */ int32 ry_dbr = 0; /* data buffer */
int32 ry_esr = 0; /* error status */ int32 ry_esr = 0; /* error status */
int32 ry_ecode = 0; /* error code */ uint8 ry_ecode = 0; /* error code */
int32 ry_track = 0; /* desired track */ uint8 ry_track = 0; /* desired track */
int32 ry_sector = 0; /* desired sector */ uint8 ry_sector = 0; /* desired sector */
int32 ry_ba = 0; /* bus addr */ int32 ry_ba = 0; /* bus addr */
int32 ry_wc = 0; /* word count */ uint8 ry_wc = 0; /* word count */
int32 ry_state = IDLE; /* controller state */ int32 ry_state = IDLE; /* controller state */
int32 ry_stopioe = 1; /* stop on error */ int32 ry_stopioe = 1; /* stop on error */
int32 ry_cwait = 100; /* command time */ int32 ry_cwait = 100; /* command time */
@ -163,7 +163,7 @@ t_stat ry_wr (int32 data, int32 PA, int32 access);
t_stat ry_svc (UNIT *uptr); t_stat ry_svc (UNIT *uptr);
t_stat ry_reset (DEVICE *dptr); t_stat ry_reset (DEVICE *dptr);
t_stat ry_boot (int32 unitno, DEVICE *dptr); t_stat ry_boot (int32 unitno, DEVICE *dptr);
void ry_done (int32 esr_flags, int32 new_ecode); void ry_done (int32 esr_flags, uint8 new_ecode);
t_stat ry_set_size (UNIT *uptr, int32 val, char *cptr, void *desc); t_stat ry_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat ry_attach (UNIT *uptr, char *cptr); t_stat ry_attach (UNIT *uptr, char *cptr);
t_stat ry_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr); t_stat ry_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cptr);
@ -421,7 +421,7 @@ switch (ry_state) { /* case on state */
t = Map_ReadB (ba, ry_wc << 1, rx2xb); t = Map_ReadB (ba, ry_wc << 1, rx2xb);
} }
else t = Map_WriteB (ba, ry_wc << 1, rx2xb); else t = Map_WriteB (ba, ry_wc << 1, rx2xb);
ry_wc = t >> 1; /* adjust wc */ ry_wc = (uint8)(t >> 1); /* adjust wc */
ry_done (t? RYES_NXM: 0, 0); /* done */ ry_done (t? RYES_NXM: 0, 0); /* done */
break; break;
@ -507,8 +507,8 @@ switch (ry_state) { /* case on state */
case ESXFR: case ESXFR:
estat[0] = ry_ecode; /* fill 8B status */ estat[0] = ry_ecode; /* fill 8B status */
estat[1] = ry_wc; estat[1] = ry_wc;
estat[2] = ry_unit[0].TRACK; estat[2] = (uint8)ry_unit[0].TRACK;
estat[3] = ry_unit[1].TRACK; estat[3] = (uint8)ry_unit[1].TRACK;
estat[4] = ry_track; estat[4] = ry_track;
estat[5] = ry_sector; estat[5] = ry_sector;
estat[6] = ((ry_csr & RYCS_DRV)? 0200: 0) | estat[6] = ((ry_csr & RYCS_DRV)? 0200: 0) |
@ -516,7 +516,7 @@ switch (ry_state) { /* case on state */
((uptr->flags & UNIT_ATT)? 0040: 0) | ((uptr->flags & UNIT_ATT)? 0040: 0) |
((ry_unit[0].flags & UNIT_DEN)? 0020: 0) | ((ry_unit[0].flags & UNIT_DEN)? 0020: 0) |
((ry_csr & RYCS_DEN)? 0001: 0); ((ry_csr & RYCS_DEN)? 0001: 0);
estat[7] = uptr->TRACK; estat[7] = (uint8)uptr->TRACK;
t = Map_WriteB (ba, 8, estat); /* DMA to memory */ t = Map_WriteB (ba, 8, estat); /* DMA to memory */
ry_done (t? RYES_NXM: 0, 0); /* done */ ry_done (t? RYES_NXM: 0, 0); /* done */
break; break;
@ -548,7 +548,7 @@ return SCPE_OK;
request interrupt if needed, return to IDLE state. request interrupt if needed, return to IDLE state.
*/ */
void ry_done (int32 esr_flags, int32 new_ecode) void ry_done (int32 esr_flags, uint8 new_ecode)
{ {
int32 drv = (ry_csr & RYCS_DRV)? 1: 0; int32 drv = (ry_csr & RYCS_DRV)? 1: 0;

6
PDP11/pdp11_sys.c
View file

@ -267,8 +267,8 @@ do { /* block loop */
if (org >= MEMSIZE) /* invalid addr? */ if (org >= MEMSIZE) /* invalid addr? */
return SCPE_NXM; return SCPE_NXM;
M[org >> 1] = (org & 1)? /* store data */ M[org >> 1] = (org & 1)? /* store data */
(M[org >> 1] & 0377) | (d << 8): (M[org >> 1] & 0377) | (uint16)(d << 8):
(M[org >> 1] & 0177400) | d; (M[org >> 1] & 0177400) | (uint16)d;
org = (org + 1) & 0177777; /* inc origin */ org = (org + 1) & 0177777; /* inc origin */
} }
if ((d = getc (fileref)) == EOF) /* get csum */ if ((d = getc (fileref)) == EOF) /* get csum */
@ -816,7 +816,7 @@ return tptr;
t_stat get_spec (char *cptr, t_addr addr, int32 n1, int32 *sptr, t_value *dptr, t_stat get_spec (char *cptr, t_addr addr, int32 n1, int32 *sptr, t_value *dptr,
int32 cflag, int32 iflag) int32 cflag, int32 iflag)
{ {
int32 reg, indir, pflag, disp; int32 reg, indir, pflag, disp = 0;
indir = 0; /* no indirect */ indir = 0; /* no indirect */
pflag = 0; pflag = 0;

2
PDP11/pdp11_ta.c
View file

@ -399,7 +399,7 @@ switch (uptr->FNC) { /* case on function */
else { else {
if ((ta_bptr < TA_MAXFR) && /* room in buf? */ if ((ta_bptr < TA_MAXFR) && /* room in buf? */
((uptr->pos + ta_bptr) < uptr->capac)) /* room on tape? */ ((uptr->pos + ta_bptr) < uptr->capac)) /* room on tape? */
ta_xb[ta_bptr++] = ta_odb; /* store char */ ta_xb[ta_bptr++] = (uint8)ta_odb; /* store char */
ta_set_tr (); /* set tra req */ ta_set_tr (); /* set tra req */
sim_activate (uptr, ta_ctime); /* sched next char */ sim_activate (uptr, ta_ctime); /* sched next char */
} }

2
PDP11/pdp11_tm.c
View file

@ -730,7 +730,7 @@ else {
for (i = 0; i < BOOT2_LEN; i++) for (i = 0; i < BOOT2_LEN; i++)
M[(BOOT_START >> 1) + i] = boot2_rom[i]; M[(BOOT_START >> 1) + i] = boot2_rom[i];
} }
M[BOOT_UNIT >> 1] = unitno; M[BOOT_UNIT >> 1] = (uint16)unitno;
M[BOOT_CSR >> 1] = (tm_dib.ba & DMASK) + 06; M[BOOT_CSR >> 1] = (tm_dib.ba & DMASK) + 06;
cpu_set_boot (BOOT_ENTRY); cpu_set_boot (BOOT_ENTRY);
return SCPE_OK; return SCPE_OK;

227
PDP11/pdp11_tq.c
View file

@ -225,14 +225,14 @@ struct tqpkt {
struct drvtyp { struct drvtyp {
uint32 uqpm; /* UQ port model */ uint32 uqpm; /* UQ port model */
uint32 cmod; /* ctrl model */ uint16 cmod; /* ctrl model */
uint32 med; /* MSCP media */ uint32 med; /* MSCP media */
uint32 fmt; /* flags */ uint16 fmt; /* flags */
t_addr cap; /* capacity */ t_addr cap; /* capacity */
uint32 umod; /* unit model */ uint16 umod; /* unit model */
uint32 cver; uint16 cver;
uint32 fver; uint16 fver;
uint32 uver; uint16 uver;
char *name; char *name;
}; };
@ -252,14 +252,14 @@ uint32 tq_saw = 0; /* written data */
uint32 tq_s1dat = 0; /* S1 data */ uint32 tq_s1dat = 0; /* S1 data */
uint32 tq_csta = 0; /* ctrl state */ uint32 tq_csta = 0; /* ctrl state */
uint32 tq_perr = 0; /* last error */ uint32 tq_perr = 0; /* last error */
uint32 tq_cflgs = 0; /* ctrl flags */ uint16 tq_cflgs = 0; /* ctrl flags */
uint32 tq_prgi = 0; /* purge int */ uint32 tq_prgi = 0; /* purge int */
uint32 tq_pip = 0; /* poll in progress */ uint32 tq_pip = 0; /* poll in progress */
struct uq_ring tq_cq = { 0 }; /* cmd ring */ struct uq_ring tq_cq = { 0 }; /* cmd ring */
struct uq_ring tq_rq = { 0 }; /* rsp ring */ struct uq_ring tq_rq = { 0 }; /* rsp ring */
struct tqpkt tq_pkt[TQ_NPKTS]; /* packet queue */ struct tqpkt tq_pkt[TQ_NPKTS]; /* packet queue */
int32 tq_freq = 0; /* free list */ uint16 tq_freq = 0; /* free list */
int32 tq_rspq = 0; /* resp list */ uint16 tq_rspq = 0; /* resp list */
uint32 tq_pbsy = 0; /* #busy pkts */ uint32 tq_pbsy = 0; /* #busy pkts */
uint32 tq_credits = 0; /* credits */ uint32 tq_credits = 0; /* credits */
uint32 tq_hat = 0; /* host timer */ uint32 tq_hat = 0; /* host timer */
@ -362,21 +362,21 @@ static t_stat tq_help (FILE *st, DEVICE *dptr, UNIT *uptr, int32 flag, char *cpt
char *tq_description (DEVICE *dptr); char *tq_description (DEVICE *dptr);
t_bool tq_step4 (void); t_bool tq_step4 (void);
t_bool tq_mscp (int32 pkt, t_bool q); t_bool tq_mscp (uint16 pkt, t_bool q);
t_bool tq_abo (int32 pkt); t_bool tq_abo (uint16 pkt);
t_bool tq_avl (int32 pkt); t_bool tq_avl (uint16 pkt);
t_bool tq_erase (int32 pkt); t_bool tq_erase (uint16 pkt);
t_bool tq_flu (int32 pkt); t_bool tq_flu (uint16 pkt);
t_bool tq_gcs (int32 pkt); t_bool tq_gcs (uint16 pkt);
t_bool tq_gus (int32 pkt); t_bool tq_gus (uint16 pkt);
t_bool tq_onl (int32 pkt); t_bool tq_onl (uint16 pkt);
t_bool tq_pos (int32 pkt); t_bool tq_pos (uint16 pkt);
t_bool tq_rw (int32 pkt); t_bool tq_rw (uint16 pkt);
t_bool tq_scc (int32 pkt); t_bool tq_scc (uint16 pkt);
t_bool tq_suc (int32 pkt); t_bool tq_suc (uint16 pkt);
t_bool tq_wtm (int32 pkt); t_bool tq_wtm (uint16 pkt);
t_bool tq_plf (uint32 err); t_bool tq_plf (uint32 err);
t_bool tq_dte (UNIT *uptr, uint32 err); t_bool tq_dte (UNIT *uptr, uint16 err);
t_bool tq_hbe (UNIT *uptr, uint32 ba); t_bool tq_hbe (UNIT *uptr, uint32 ba);
t_bool tq_una (UNIT *uptr); t_bool tq_una (UNIT *uptr);
uint32 tq_map_status (UNIT *uptr, t_stat st); uint32 tq_map_status (UNIT *uptr, t_stat st);
@ -384,25 +384,25 @@ void tq_rdbuff_top (UNIT *uptr, t_mtrlnt *tbc);
uint32 tq_rdbuff_bottom (UNIT *uptr, t_mtrlnt *tbc); uint32 tq_rdbuff_bottom (UNIT *uptr, t_mtrlnt *tbc);
void tq_rdbufr_top (UNIT *uptr, t_mtrlnt *tbc); void tq_rdbufr_top (UNIT *uptr, t_mtrlnt *tbc);
uint32 tq_rdbufr_bottom (UNIT *uptr, t_mtrlnt *tbc); uint32 tq_rdbufr_bottom (UNIT *uptr, t_mtrlnt *tbc);
t_bool tq_deqf (int32 *pkt); t_bool tq_deqf (uint16 *pkt);
int32 tq_deqh (int32 *lh); uint16 tq_deqh (uint16 *lh);
void tq_enqh (int32 *lh, int32 pkt); void tq_enqh (uint16 *lh, int16 pkt);
void tq_enqt (int32 *lh, int32 pkt); void tq_enqt (uint16 *lh, int16 pkt);
t_bool tq_getpkt (int32 *pkt); t_bool tq_getpkt (uint16 *pkt);
t_bool tq_putpkt (int32 pkt, t_bool qt); t_bool tq_putpkt (uint16 pkt, t_bool qt);
t_bool tq_getdesc (struct uq_ring *ring, uint32 *desc); t_bool tq_getdesc (struct uq_ring *ring, uint32 *desc);
t_bool tq_putdesc (struct uq_ring *ring, uint32 desc); t_bool tq_putdesc (struct uq_ring *ring, uint32 desc);
int32 tq_mot_valid (UNIT *uptr, uint32 cmd); uint16 tq_mot_valid (UNIT *uptr, uint32 cmd);
t_stat tq_mot_err (UNIT *uptr, uint32 rsiz); t_stat tq_mot_err (UNIT *uptr, uint32 rsiz);
t_bool tq_mot_end (UNIT *uptr, uint32 flg, uint32 sts, uint32 rsiz); t_bool tq_mot_end (UNIT *uptr, uint32 flg, uint16 sts, uint32 rsiz);
void tq_putr (int32 pkt, uint32 cmd, uint32 flg, uint32 sts, uint32 lnt, uint32 typ); void tq_putr (int32 pkt, uint32 cmd, uint32 flg, uint16 sts, uint16 lnt, uint16 typ);
void tq_putr_unit (int32 pkt, UNIT *uptr, uint32 lu, t_bool all); void tq_putr_unit (int16 pkt, UNIT *uptr, uint16 lu, t_bool all);
void tq_setf_unit (int32 pkt, UNIT *uptr); void tq_setf_unit (int16 pkt, UNIT *uptr);
uint32 tq_efl (UNIT *uptr); uint32 tq_efl (UNIT *uptr);
void tq_init_int (void); void tq_init_int (void);
void tq_ring_int (struct uq_ring *ring); void tq_ring_int (struct uq_ring *ring);
t_bool tq_fatal (uint32 err); t_bool tq_fatal (uint32 err);
UNIT *tq_getucb (uint32 lu); UNIT *tq_getucb (uint16 lu);
/* TQ data structures /* TQ data structures
@ -658,7 +658,7 @@ return OK;
t_stat tq_quesvc (UNIT *uptr) t_stat tq_quesvc (UNIT *uptr)
{ {
int32 i, cnid; int32 i, cnid;
int32 pkt = 0; uint16 pkt = 0;
UNIT *nuptr; UNIT *nuptr;
sim_debug(DBG_TRC, &tq_dev, "tq_quesvc\n"); sim_debug(DBG_TRC, &tq_dev, "tq_quesvc\n");
@ -731,7 +731,7 @@ for (i = 0; i < TQ_NUMDR; i++) { /* chk unit q's */
nuptr = tq_dev.units + i; /* ptr to unit */ nuptr = tq_dev.units + i; /* ptr to unit */
if (nuptr->cpkt || (nuptr->pktq == 0)) if (nuptr->cpkt || (nuptr->pktq == 0))
continue; continue;
pkt = tq_deqh (&nuptr->pktq); /* get top of q */ pkt = tq_deqh ((uint16 *)&nuptr->pktq); /* get top of q */
if (!tq_mscp (pkt, FALSE)) /* process */ if (!tq_mscp (pkt, FALSE)) /* process */
return SCPE_OK; return SCPE_OK;
} }
@ -772,7 +772,7 @@ if ((pkt == 0) && tq_pip) { /* polling? */
else tq_pip = 0; /* discontinue poll */ else tq_pip = 0; /* discontinue poll */
} /* end if pip */ } /* end if pip */
if (tq_rspq) { /* resp q? */ if (tq_rspq) { /* resp q? */
pkt = tq_deqh (&tq_rspq); /* get top of q */ pkt = tq_deqh ((uint16 *)&tq_rspq); /* get top of q */
if (!tq_putpkt (pkt, FALSE)) /* send to host */ if (!tq_putpkt (pkt, FALSE)) /* send to host */
return SCPE_OK; return SCPE_OK;
} /* end if resp q */ } /* end if resp q */
@ -808,13 +808,13 @@ return SCPE_OK;
/* MSCP packet handling */ /* MSCP packet handling */
t_bool tq_mscp (int32 pkt, t_bool q) t_bool tq_mscp (uint16 pkt, t_bool q)
{ {
uint32 sts; uint16 sts;
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* command */ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* command */
uint32 flg = GETP (pkt, CMD_OPC, FLG); /* flags */ uint32 flg = GETP (pkt, CMD_OPC, FLG); /* flags */
uint32 mdf = tq_pkt[pkt].d[CMD_MOD]; /* modifier */ uint32 mdf = tq_pkt[pkt].d[CMD_MOD]; /* modifier */
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_mscp\n"); sim_debug(DBG_TRC, &tq_dev, "tq_mscp\n");
@ -835,7 +835,7 @@ else { /* valid cmd */
if ((uptr = tq_getucb (lu))) { /* valid unit? */ if ((uptr = tq_getucb (lu))) { /* valid unit? */
if (q && (tq_cmf[cmd] & CMF_SEQ) && /* queueing, seq, */ if (q && (tq_cmf[cmd] & CMF_SEQ) && /* queueing, seq, */
(uptr->cpkt || uptr->pktq)) { /* and active? */ (uptr->cpkt || uptr->pktq)) { /* and active? */
tq_enqt (&uptr->pktq, pkt); /* do later */ tq_enqt ((uint16 *)&uptr->pktq, pkt); /* do later */
return OK; return OK;
} }
/* if (tq_cmf[cmd] & MD_CDL) *//* clr cch lost? */ /* if (tq_cmf[cmd] & MD_CDL) *//* clr cch lost? */
@ -903,11 +903,11 @@ return tq_putpkt (pkt, TRUE);
/* Abort a command - 1st parameter is ref # of cmd to abort */ /* Abort a command - 1st parameter is ref # of cmd to abort */
t_bool tq_abo (int32 pkt) t_bool tq_abo (uint16 pkt)
{ {
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 ref = GETP32 (pkt, ABO_REFL); /* cmd ref # */ uint32 ref = GETP32 (pkt, ABO_REFL); /* cmd ref # */
int32 tpkt, prv; uint16 tpkt, prv;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_abo\n"); sim_debug(DBG_TRC, &tq_dev, "tq_abo\n");
@ -916,17 +916,17 @@ tpkt = 0; /* set no mtch */
if ((uptr = tq_getucb (lu))) { /* get unit */ if ((uptr = tq_getucb (lu))) { /* get unit */
if (uptr->cpkt && /* curr pkt? */ if (uptr->cpkt && /* curr pkt? */
(GETP32 (uptr->cpkt, CMD_REFL) == ref)) { /* match ref? */ (GETP32 (uptr->cpkt, CMD_REFL) == ref)) { /* match ref? */
tpkt = uptr->cpkt; /* save match */ tpkt = (uint16)uptr->cpkt; /* save match */
uptr->cpkt = 0; /* gonzo */ uptr->cpkt = 0; /* gonzo */
sim_cancel (uptr); /* cancel unit */ sim_cancel (uptr); /* cancel unit */
sim_activate (&tq_unit[TQ_QUEUE], tq_qtime); sim_activate (&tq_unit[TQ_QUEUE], tq_qtime);
} }
else if (uptr->pktq && /* head of q? */ else if (uptr->pktq && /* head of q? */
(GETP32 (uptr->pktq, CMD_REFL) == ref)) { /* match ref? */ (GETP32 (uptr->pktq, CMD_REFL) == ref)) { /* match ref? */
tpkt = uptr->pktq; /* save match */ tpkt = (uint16)uptr->pktq; /* save match */
uptr->pktq = tq_pkt[tpkt].link; /* unlink */ uptr->pktq = tq_pkt[tpkt].link; /* unlink */
} }
else if ((prv = uptr->pktq)) { /* srch pkt q */ else if ((prv = (uint16)uptr->pktq)) { /* srch pkt q */
while ((tpkt = tq_pkt[prv].link)) { /* walk list */ while ((tpkt = tq_pkt[prv].link)) { /* walk list */
if (GETP32 (tpkt, RSP_REFL) == ref) { /* match ref? */ if (GETP32 (tpkt, RSP_REFL) == ref) { /* match ref? */
tq_pkt[prv].link = tq_pkt[tpkt].link; /* unlink */ tq_pkt[prv].link = tq_pkt[tpkt].link; /* unlink */
@ -949,11 +949,11 @@ return tq_putpkt (pkt, TRUE);
/* Unit available - set unit status to available /* Unit available - set unit status to available
Deferred if q'd cmds, bypassed if ser exc */ Deferred if q'd cmds, bypassed if ser exc */
t_bool tq_avl (int32 pkt) t_bool tq_avl (uint16 pkt)
{ {
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 mdf = tq_pkt[pkt].d[CMD_MOD]; /* modifiers */ uint32 mdf = tq_pkt[pkt].d[CMD_MOD]; /* modifiers */
uint32 sts; uint16 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_avl\n"); sim_debug(DBG_TRC, &tq_dev, "tq_avl\n");
@ -980,9 +980,9 @@ return tq_putpkt (pkt, TRUE);
/* Get command status - only interested in active xfr cmd */ /* Get command status - only interested in active xfr cmd */
t_bool tq_gcs (int32 pkt) t_bool tq_gcs (uint16 pkt)
{ {
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 ref = GETP32 (pkt, GCS_REFL); /* ref # */ uint32 ref = GETP32 (pkt, GCS_REFL); /* ref # */
int32 tpkt; int32 tpkt;
UNIT *uptr; UNIT *uptr;
@ -1003,10 +1003,10 @@ return tq_putpkt (pkt, TRUE);
/* Get unit status */ /* Get unit status */
t_bool tq_gus (int32 pkt) t_bool tq_gus (uint16 pkt)
{ {
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts; uint16 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_gus\n"); sim_debug(DBG_TRC, &tq_dev, "tq_gus\n");
@ -1014,7 +1014,7 @@ sim_debug(DBG_TRC, &tq_dev, "tq_gus\n");
if (tq_pkt[pkt].d[CMD_MOD] & MD_NXU) { /* next unit? */ if (tq_pkt[pkt].d[CMD_MOD] & MD_NXU) { /* next unit? */
if (lu >= TQ_NUMDR) { /* end of range? */ if (lu >= TQ_NUMDR) { /* end of range? */
lu = 0; /* reset to 0 */ lu = 0; /* reset to 0 */
tq_pkt[pkt].d[RSP_UN] = lu; tq_pkt[pkt].d[RSP_UN] = (uint16)lu;
} }
} }
if ((uptr = tq_getucb (lu))) { /* unit exist? */ if ((uptr = tq_getucb (lu))) { /* unit exist? */
@ -1036,10 +1036,10 @@ return tq_putpkt (pkt, TRUE);
/* Unit online - deferred if q'd commands */ /* Unit online - deferred if q'd commands */
t_bool tq_onl (int32 pkt) t_bool tq_onl (uint16 pkt)
{ {
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts; uint16 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_onl\n"); sim_debug(DBG_TRC, &tq_dev, "tq_onl\n");
@ -1066,7 +1066,7 @@ return tq_putpkt (pkt, TRUE);
/* Set controller characteristics */ /* Set controller characteristics */
t_bool tq_scc (int32 pkt) t_bool tq_scc (uint16 pkt)
{ {
sim_debug(DBG_TRC, &tq_dev, "tq_scc\n"); sim_debug(DBG_TRC, &tq_dev, "tq_scc\n");
@ -1093,10 +1093,10 @@ return tq_putpkt (pkt, TRUE);
/* Set unit characteristics - defer if q'd commands */ /* Set unit characteristics - defer if q'd commands */
t_bool tq_suc (int32 pkt) t_bool tq_suc (uint16 pkt)
{ {
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts; uint16 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_suc\n"); sim_debug(DBG_TRC, &tq_dev, "tq_suc\n");
@ -1117,10 +1117,10 @@ return tq_putpkt (pkt, TRUE);
/* Flush - sequential nop - deferred if q'd cmds, bypassed if ser exc */ /* Flush - sequential nop - deferred if q'd cmds, bypassed if ser exc */
t_bool tq_flu (int32 pkt) t_bool tq_flu (uint16 pkt)
{ {
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts; uint16 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_flu\n"); sim_debug(DBG_TRC, &tq_dev, "tq_flu\n");
@ -1134,11 +1134,11 @@ return tq_putpkt (pkt, TRUE);
/* Erase, erase gap - deferred if q'd cmds, bypassed if ser exc */ /* Erase, erase gap - deferred if q'd cmds, bypassed if ser exc */
t_bool tq_erase (int32 pkt) t_bool tq_erase (uint16 pkt)
{ {
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 sts; uint16 sts;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_erase\n"); sim_debug(DBG_TRC, &tq_dev, "tq_erase\n");
@ -1159,10 +1159,11 @@ return tq_putpkt (pkt, TRUE);
/* Write tape mark - deferred if q'd cmds, bypassed if ser exc */ /* Write tape mark - deferred if q'd cmds, bypassed if ser exc */
t_bool tq_wtm (int32 pkt) t_bool tq_wtm (uint16 pkt)
{ {
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts, objp = 0; uint16 sts;
uint32 objp = 0;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_wtm\n"); sim_debug(DBG_TRC, &tq_dev, "tq_wtm\n");
@ -1185,10 +1186,11 @@ return tq_putpkt (pkt, TRUE);
/* Position - deferred if q'd cmds, bypassed if ser exc */ /* Position - deferred if q'd cmds, bypassed if ser exc */
t_bool tq_pos (int32 pkt) t_bool tq_pos (uint16 pkt)
{ {
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 sts, objp = 0; uint16 sts;
uint32 objp = 0;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_pos\n"); sim_debug(DBG_TRC, &tq_dev, "tq_pos\n");
@ -1218,12 +1220,13 @@ return tq_putpkt (pkt, TRUE);
/* Data transfer commands - deferred if q'd commands, bypassed if ser exc */ /* Data transfer commands - deferred if q'd commands, bypassed if ser exc */
t_bool tq_rw (int32 pkt) t_bool tq_rw (uint16 pkt)
{ {
uint32 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */ uint16 lu = tq_pkt[pkt].d[CMD_UN]; /* unit # */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* opcode */
uint32 bc = GETP32 (pkt, RW_BCL); /* byte count */ uint32 bc = GETP32 (pkt, RW_BCL); /* byte count */
uint32 sts, objp = 0; uint16 sts;
uint32 objp = 0;
UNIT *uptr; UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_rw\n"); sim_debug(DBG_TRC, &tq_dev, "tq_rw\n");
@ -1254,7 +1257,7 @@ return tq_putpkt (pkt, TRUE);
/* Validity checks */ /* Validity checks */
int32 tq_mot_valid (UNIT *uptr, uint32 cmd) uint16 tq_mot_valid (UNIT *uptr, uint32 cmd)
{ {
sim_debug(DBG_TRC, &tq_dev, "tq_mot_valid\n"); sim_debug(DBG_TRC, &tq_dev, "tq_mot_valid\n");
@ -1481,7 +1484,7 @@ switch (cmd) { /* case on command */
return SCPE_IERR; return SCPE_IERR;
} }
tq_mot_end (uptr, 0, res->sts, res->tbc); /* done */ tq_mot_end (uptr, 0, (uint16)res->sts, res->tbc); /* done */
return SCPE_OK; return SCPE_OK;
} }
@ -1499,11 +1502,11 @@ return SCPE_IOERR;
/* Motion command complete */ /* Motion command complete */
t_bool tq_mot_end (UNIT *uptr, uint32 flg, uint32 sts, uint32 rsiz) t_bool tq_mot_end (UNIT *uptr, uint32 flg, uint16 sts, uint32 rsiz)
{ {
int32 pkt = uptr->cpkt; /* packet */ uint16 pkt = (uint16)uptr->cpkt; /* packet */
uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* get cmd */ uint32 cmd = GETP (pkt, CMD_OPC, OPC); /* get cmd */
uint32 lnt = RW_LNT_T; /* assume rw */ uint16 lnt = RW_LNT_T; /* assume rw */
if (cmd == OP_ERG) /* set pkt lnt */ if (cmd == OP_ERG) /* set pkt lnt */
lnt = ERG_LNT; lnt = ERG_LNT;
@ -1629,16 +1632,16 @@ return ST_SUC;
/* Data transfer error log packet */ /* Data transfer error log packet */
t_bool tq_dte (UNIT *uptr, uint32 err) t_bool tq_dte (UNIT *uptr, uint16 err)
{ {
int32 pkt, tpkt; uint16 pkt, tpkt;
uint32 lu; uint16 lu;
if ((tq_cflgs & CF_THS) == 0) /* logging? */ if ((tq_cflgs & CF_THS) == 0) /* logging? */
return OK; return OK;
if (!tq_deqf (&pkt)) /* get log pkt */ if (!tq_deqf (&pkt)) /* get log pkt */
return ERR; return ERR;
tpkt = uptr->cpkt; /* rw pkt */ tpkt = (uint16)uptr->cpkt; /* rw pkt */
lu = tq_pkt[tpkt].d[CMD_UN]; /* unit # */ lu = tq_pkt[tpkt].d[CMD_UN]; /* unit # */
tq_pkt[pkt].d[ELP_REFL] = tq_pkt[tpkt].d[CMD_REFL]; /* copy cmd ref */ tq_pkt[pkt].d[ELP_REFL] = tq_pkt[tpkt].d[CMD_REFL]; /* copy cmd ref */
@ -1668,13 +1671,13 @@ return tq_putpkt (pkt, TRUE);
t_bool tq_hbe (UNIT *uptr, uint32 ba) t_bool tq_hbe (UNIT *uptr, uint32 ba)
{ {
int32 pkt, tpkt; uint16 pkt, tpkt;
if ((tq_cflgs & CF_THS) == 0) /* logging? */ if ((tq_cflgs & CF_THS) == 0) /* logging? */
return OK; return OK;
if (!tq_deqf (&pkt)) /* get log pkt */ if (!tq_deqf (&pkt)) /* get log pkt */
return ERR; return ERR;
tpkt = uptr->cpkt; /* rw pkt */ tpkt = (uint16)uptr->cpkt; /* rw pkt */
tq_pkt[pkt].d[ELP_REFL] = tq_pkt[tpkt].d[CMD_REFL]; /* copy cmd ref */ tq_pkt[pkt].d[ELP_REFL] = tq_pkt[tpkt].d[CMD_REFL]; /* copy cmd ref */
tq_pkt[pkt].d[ELP_REFH] = tq_pkt[tpkt].d[CMD_REFH]; /* copy cmd ref */ tq_pkt[pkt].d[ELP_REFH] = tq_pkt[tpkt].d[CMD_REFH]; /* copy cmd ref */
tq_pkt[pkt].d[ELP_UN] = tq_pkt[tpkt].d[CMD_UN]; /* copy unit */ tq_pkt[pkt].d[ELP_UN] = tq_pkt[tpkt].d[CMD_UN]; /* copy unit */
@ -1695,7 +1698,7 @@ return tq_putpkt (pkt, TRUE);
t_bool tq_plf (uint32 err) t_bool tq_plf (uint32 err)
{ {
int32 pkt = 0; uint16 pkt = 0;
if (!tq_deqf (&pkt)) /* get log pkt */ if (!tq_deqf (&pkt)) /* get log pkt */
return ERR; return ERR;
@ -1707,7 +1710,7 @@ tq_pkt[pkt].d[PLF_CIDC] = 0;
tq_pkt[pkt].d[PLF_CIDD] = (TQ_CLASS << PLF_CIDD_V_CLS) | tq_pkt[pkt].d[PLF_CIDD] = (TQ_CLASS << PLF_CIDD_V_CLS) |
(drv_tab[tq_typ].cmod << PLF_CIDD_V_MOD); (drv_tab[tq_typ].cmod << PLF_CIDD_V_MOD);
tq_pkt[pkt].d[PLF_VER] = drv_tab[tq_typ].cver; tq_pkt[pkt].d[PLF_VER] = drv_tab[tq_typ].cver;
tq_pkt[pkt].d[PLF_ERR] = err; tq_pkt[pkt].d[PLF_ERR] = (uint16)err;
tq_putr (pkt, FM_CNT, LF_SNR, ST_CNT, PLF_LNT, UQ_TYP_DAT); tq_putr (pkt, FM_CNT, LF_SNR, ST_CNT, PLF_LNT, UQ_TYP_DAT);
tq_pkt[pkt].d[UQ_HCTC] |= (UQ_CID_DIAG << UQ_HCTC_V_CID); tq_pkt[pkt].d[UQ_HCTC] |= (UQ_CID_DIAG << UQ_HCTC_V_CID);
return tq_putpkt (pkt, TRUE); return tq_putpkt (pkt, TRUE);
@ -1717,12 +1720,12 @@ return tq_putpkt (pkt, TRUE);
t_bool tq_una (UNIT *uptr) t_bool tq_una (UNIT *uptr)
{ {
int32 pkt; uint16 pkt;
uint32 lu; uint16 lu;
if (!tq_deqf (&pkt)) /* get log pkt */ if (!tq_deqf (&pkt)) /* get log pkt */
return ERR; return ERR;
lu = (uint32) (uptr - tq_dev.units); /* get unit */ lu = (uint16) (uptr - tq_dev.units); /* get unit */
tq_pkt[pkt].d[RSP_REFL] = tq_pkt[pkt].d[RSP_REFH] = 0; /* ref = 0 */ tq_pkt[pkt].d[RSP_REFL] = tq_pkt[pkt].d[RSP_REFH] = 0; /* ref = 0 */
tq_pkt[pkt].d[RSP_UN] = lu; tq_pkt[pkt].d[RSP_UN] = lu;
tq_pkt[pkt].d[RSP_RSV] = 0; tq_pkt[pkt].d[RSP_RSV] = 0;
@ -1739,7 +1742,7 @@ return tq_putpkt (pkt, TRUE);
tq_enqt - enqueue at tail of list tq_enqt - enqueue at tail of list
*/ */
t_bool tq_deqf (int32 *pkt) t_bool tq_deqf (uint16 *pkt)
{ {
if (tq_freq == 0) /* no free pkts?? */ if (tq_freq == 0) /* no free pkts?? */
return tq_fatal (PE_NSR); return tq_fatal (PE_NSR);
@ -1749,16 +1752,16 @@ tq_freq = tq_pkt[tq_freq].link; /* next */
return OK; return OK;
} }
int32 tq_deqh (int32 *lh) uint16 tq_deqh (uint16 *lh)
{ {
int32 ptr = *lh; /* head of list */ int16 ptr = *lh; /* head of list */
if (ptr) /* next */ if (ptr) /* next */
*lh = tq_pkt[ptr].link; *lh = tq_pkt[ptr].link;
return ptr; return ptr;
} }
void tq_enqh (int32 *lh, int32 pkt) void tq_enqh (uint16 *lh, int16 pkt)
{ {
if (pkt == 0) /* any pkt? */ if (pkt == 0) /* any pkt? */
return; return;
@ -1767,7 +1770,7 @@ tq_pkt[pkt].link = *lh; /* link is old lh */
return; return;
} }
void tq_enqt (int32 *lh, int32 pkt) void tq_enqt (uint16 *lh, int16 pkt)
{ {
if (pkt == 0) /* any pkt? */ if (pkt == 0) /* any pkt? */
return; return;
@ -1775,7 +1778,7 @@ tq_pkt[pkt].link = 0; /* it will be tail */
if (*lh == 0) /* if empty, enqh */ if (*lh == 0) /* if empty, enqh */
*lh = pkt; *lh = pkt;
else { else {
uint32 ptr = *lh; /* chase to end */ uint16 ptr = *lh; /* chase to end */
while (tq_pkt[ptr].link) while (tq_pkt[ptr].link)
ptr = tq_pkt[ptr].link; ptr = tq_pkt[ptr].link;
tq_pkt[ptr].link = pkt; /* enq at tail */ tq_pkt[ptr].link = pkt; /* enq at tail */
@ -1787,7 +1790,7 @@ return;
/* Get packet from command ring */ /* Get packet from command ring */
t_bool tq_getpkt (int32 *pkt) t_bool tq_getpkt (uint16 *pkt)
{ {
uint32 addr, desc; uint32 addr, desc;
@ -1811,7 +1814,7 @@ return tq_putdesc (&tq_cq, desc); /* release desc */
supplies one credit for every response packet sent over. Simple! supplies one credit for every response packet sent over. Simple!
*/ */
t_bool tq_putpkt (int32 pkt, t_bool qt) t_bool tq_putpkt (uint16 pkt, t_bool qt)
{ {
uint32 addr, desc, lnt, cr; uint32 addr, desc, lnt, cr;
UNIT *up = tq_getucb (tq_pkt[pkt].d[CMD_UN]); UNIT *up = tq_getucb (tq_pkt[pkt].d[CMD_UN]);
@ -1900,7 +1903,7 @@ return OK;
/* Get unit descriptor for logical unit - trivial now, /* Get unit descriptor for logical unit - trivial now,
but eventually, hide multiboard complexities here */ but eventually, hide multiboard complexities here */
UNIT *tq_getucb (uint32 lu) UNIT *tq_getucb (uint16 lu)
{ {
UNIT *uptr; UNIT *uptr;
@ -1914,7 +1917,7 @@ return uptr;
/* Hack unit flags */ /* Hack unit flags */
void tq_setf_unit (int32 pkt, UNIT *uptr) void tq_setf_unit (int16 pkt, UNIT *uptr)
{ {
uptr->uf = tq_pkt[pkt].d[ONL_UFL] & UF_MSK; /* settable flags */ uptr->uf = tq_pkt[pkt].d[ONL_UFL] & UF_MSK; /* settable flags */
if ((tq_pkt[pkt].d[CMD_MOD] & MD_SWP) && /* swre wrp enb? */ if ((tq_pkt[pkt].d[CMD_MOD] & MD_SWP) && /* swre wrp enb? */
@ -1942,13 +1945,13 @@ return t;
/* Unit response fields */ /* Unit response fields */
void tq_putr_unit (int32 pkt, UNIT *uptr, uint32 lu, t_bool all) void tq_putr_unit (int16 pkt, UNIT *uptr, uint16 lu, t_bool all)
{ {
tq_pkt[pkt].d[ONL_MLUN] = lu; /* multi-unit */ tq_pkt[pkt].d[ONL_MLUN] = (uint16)lu; /* multi-unit */
tq_pkt[pkt].d[ONL_UFL] = uptr->uf | TQ_WPH (uptr); /* unit flags */ tq_pkt[pkt].d[ONL_UFL] = (uint16)(uptr->uf | TQ_WPH (uptr));/* unit flags */
tq_pkt[pkt].d[ONL_UFL] |= tq_efl (uptr); /* end flags accordingly */ tq_pkt[pkt].d[ONL_UFL] |= tq_efl (uptr); /* end flags accordingly */
tq_pkt[pkt].d[ONL_RSVL] = tq_pkt[pkt].d[ONL_RSVH] = 0; /* reserved */ tq_pkt[pkt].d[ONL_RSVL] = tq_pkt[pkt].d[ONL_RSVH] = 0; /* reserved */
tq_pkt[pkt].d[ONL_UIDA] = lu; /* UID low */ tq_pkt[pkt].d[ONL_UIDA] = (uint16)lu; /* UID low */
tq_pkt[pkt].d[ONL_UIDB] = 0; tq_pkt[pkt].d[ONL_UIDB] = 0;
tq_pkt[pkt].d[ONL_UIDC] = 0; tq_pkt[pkt].d[ONL_UIDC] = 0;
tq_pkt[pkt].d[ONL_UIDD] = (UID_TAPE << ONL_UIDD_V_CLS) | tq_pkt[pkt].d[ONL_UIDD] = (UID_TAPE << ONL_UIDD_V_CLS) |
@ -1966,10 +1969,10 @@ return;
/* UQ_HDR and RSP_OP fields */ /* UQ_HDR and RSP_OP fields */
void tq_putr (int32 pkt, uint32 cmd, uint32 flg, uint32 sts, uint32 lnt, uint32 typ) void tq_putr (int32 pkt, uint32 cmd, uint32 flg, uint16 sts, uint16 lnt, uint16 typ)
{ {
tq_pkt[pkt].d[RSP_OPF] = (cmd << RSP_OPF_V_OPC) | /* set cmd, flg */ tq_pkt[pkt].d[RSP_OPF] = (uint16)((cmd << RSP_OPF_V_OPC) |/* set cmd, flg */
(flg << RSP_OPF_V_FLG); (flg << RSP_OPF_V_FLG));
tq_pkt[pkt].d[RSP_STS] = sts; tq_pkt[pkt].d[RSP_STS] = sts;
tq_pkt[pkt].d[UQ_HLNT] = lnt; /* length */ tq_pkt[pkt].d[UQ_HLNT] = lnt; /* length */
tq_pkt[pkt].d[UQ_HCTC] = (typ << UQ_HCTC_V_TYP) | /* type, cid */ tq_pkt[pkt].d[UQ_HCTC] = (typ << UQ_HCTC_V_TYP) | /* type, cid */

35
PDP11/pdp11_xq.c
View file

@ -594,7 +594,7 @@ t_stat xq_ex (t_value* vptr, t_addr addr, UNIT* uptr, int32 sw)
/* on PDP-11, allow EX command to look at bootrom */ /* on PDP-11, allow EX command to look at bootrom */
#ifdef VM_PDP11 #ifdef VM_PDP11
CTLR* xq = xq_unit2ctlr(uptr); CTLR* xq = xq_unit2ctlr(uptr);
uint16 *bootrom; uint16 *bootrom = NULL;
if (xq->var->type == XQ_T_DEQNA) if (xq->var->type == XQ_T_DEQNA)
bootrom = xq_bootrom_deqna; bootrom = xq_bootrom_deqna;
@ -649,8 +649,8 @@ void xq_make_checksum(CTLR* xq)
checksum = 0; checksum = 0;
/* set checksum bytes */ /* set checksum bytes */
xq->var->mac_checksum[0] = checksum & 0xFF; xq->var->mac_checksum[0] = (uint8)(checksum);
xq->var->mac_checksum[1] = checksum >> 8; xq->var->mac_checksum[1] = (uint8)(checksum >> 8);
} }
t_stat xq_setmac (UNIT* uptr, int32 val, char* cptr, void* desc) t_stat xq_setmac (UNIT* uptr, int32 val, char* cptr, void* desc)
@ -905,7 +905,7 @@ t_stat xq_nxm_error(CTLR* xq)
void xq_write_callback (CTLR* xq, int status) void xq_write_callback (CTLR* xq, int status)
{ {
int32 wstatus; int32 wstatus;
const uint16 TDR = 100 + xq->var->write_buffer.len * 8; /* arbitrary value */ const uint16 TDR = (uint16)(100 + xq->var->write_buffer.len * 8); /* arbitrary value */
uint16 write_success[2] = {0}; uint16 write_success[2] = {0};
uint16 write_failure[2] = {XQ_DSC_C}; uint16 write_failure[2] = {XQ_DSC_C};
write_success[1] = TDR & 0x03FF; /* Does TDR get set on successful packets ?? */ write_success[1] = TDR & 0x03FF; /* Does TDR get set on successful packets ?? */
@ -1057,14 +1057,14 @@ t_stat xq_process_rbdl(CTLR* xq)
if (xq->var->rbdl_buf[1] & XQ_DSC_L) b_length -= 1; if (xq->var->rbdl_buf[1] & XQ_DSC_L) b_length -= 1;
item = &xq->var->ReadQ.item[xq->var->ReadQ.head]; item = &xq->var->ReadQ.item[xq->var->ReadQ.head];
rbl = item->packet.len; rbl = (uint16)item->packet.len;
rbuf = item->packet.msg; rbuf = item->packet.msg;
if (item->packet.oversize) if (item->packet.oversize)
rbuf = item->packet.oversize; rbuf = item->packet.oversize;
/* see if packet must be size-adjusted or is splitting */ /* see if packet must be size-adjusted or is splitting */
if (item->packet.used) { if (item->packet.used) {
int used = item->packet.used; uint16 used = (uint16)item->packet.used;
rbl -= used; rbl -= used;
rbuf = &rbuf[used]; rbuf = &rbuf[used];
} else { } else {
@ -1233,7 +1233,7 @@ t_stat xq_process_setup(CTLR* xq)
{ {
int i,j; int i,j;
int count = 0; int count = 0;
float secs; float secs = 0;
uint32 saved_debug = xq->dev->dctrl; uint32 saved_debug = xq->dev->dctrl;
ETH_MAC zeros = {0, 0, 0, 0, 0, 0}; ETH_MAC zeros = {0, 0, 0, 0, 0, 0};
ETH_MAC filters[XQ_FILTER_MAX + 1]; ETH_MAC filters[XQ_FILTER_MAX + 1];
@ -1287,7 +1287,7 @@ t_stat xq_process_setup(CTLR* xq)
xq->var->setup.promiscuous = 0; xq->var->setup.promiscuous = 0;
/* process high byte count */ /* process high byte count */
if (xq->var->write_buffer.len > 128) { if (xq->var->write_buffer.len > 128) {
uint16 len = xq->var->write_buffer.len; uint16 len = (uint16)xq->var->write_buffer.len;
uint16 led, san; uint16 led, san;
xq->var->setup.multicast = (0 != (len & XQ_SETUP_MC)); xq->var->setup.multicast = (0 != (len & XQ_SETUP_MC));
@ -1648,12 +1648,12 @@ t_stat xq_process_turbo_rbdl(CTLR* xq)
b_length = ETH_FRAME_SIZE; b_length = ETH_FRAME_SIZE;
item = &xq->var->ReadQ.item[xq->var->ReadQ.head]; item = &xq->var->ReadQ.item[xq->var->ReadQ.head];
rbl = item->packet.len + ETH_CRC_SIZE; rbl = (uint16)(item->packet.len + ETH_CRC_SIZE);
rbuf = item->packet.msg; rbuf = item->packet.msg;
/* see if packet must be size-adjusted or is splitting */ /* see if packet must be size-adjusted or is splitting */
if (item->packet.used) { if (item->packet.used) {
int used = item->packet.used; uint16 used = (uint16)item->packet.used;
rbl -= used; rbl -= used;
rbuf = &item->packet.msg[used]; rbuf = &item->packet.msg[used];
} else { } else {
@ -1802,13 +1802,13 @@ t_stat xq_process_turbo_xbdl(CTLR* xq)
sim_debug(DBG_WRN, xq->dev, "Packet Write Error!\n"); sim_debug(DBG_WRN, xq->dev, "Packet Write Error!\n");
xq->var->stats.fail += 1; xq->var->stats.fail += 1;
xq->var->xring[i].tmd0 = XQ_TMD0_ERR1; xq->var->xring[i].tmd0 = XQ_TMD0_ERR1;
xq->var->xring[i].tmd1 = 100 + xq->var->write_buffer.len * 8; /* arbitrary value */ xq->var->xring[i].tmd1 = (uint16)(100 + xq->var->write_buffer.len * 8); /* arbitrary value */
xq->var->xring[i].tmd1 |= XQ_TMD1_LCA; xq->var->xring[i].tmd1 |= XQ_TMD1_LCA;
} else { } else {
if (DBG_PCK & xq->dev->dctrl) if (DBG_PCK & xq->dev->dctrl)
eth_packet_trace_ex(xq->var->etherface, xq->var->write_buffer.msg, xq->var->write_buffer.len, "xq-write", DBG_DAT & xq->dev->dctrl, DBG_PCK); eth_packet_trace_ex(xq->var->etherface, xq->var->write_buffer.msg, xq->var->write_buffer.len, "xq-write", DBG_DAT & xq->dev->dctrl, DBG_PCK);
xq->var->xring[i].tmd0 = 0; xq->var->xring[i].tmd0 = 0;
xq->var->xring[i].tmd1 = 100 + xq->var->write_buffer.len * 8; /* arbitrary value */ xq->var->xring[i].tmd1 = (uint16)(100 + xq->var->write_buffer.len * 8); /* arbitrary value */
} }
sim_debug(DBG_WRN, xq->dev, "XBDL completed processing write\n"); sim_debug(DBG_WRN, xq->dev, "XBDL completed processing write\n");
/* clear transmit buffer */ /* clear transmit buffer */
@ -2112,8 +2112,8 @@ t_stat xq_process_bootrom (CTLR* xq)
*/ */
ETH_PACK pack; ETH_PACK pack;
uint8* bootrom_b; uint8* bootrom_b = NULL;
size_t bootrom_size; size_t bootrom_size = 0;
sim_debug(DBG_TRC, xq->dev, "xq_process_bootrom()\n"); sim_debug(DBG_TRC, xq->dev, "xq_process_bootrom()\n");
@ -2327,10 +2327,11 @@ t_stat xq_wr_icr(CTLR* xq, int32 data)
return SCPE_OK; return SCPE_OK;
} }
t_stat xq_wr(int32 data, int32 PA, int32 access) t_stat xq_wr(int32 ldata, int32 PA, int32 access)
{ {
CTLR* xq = xq_pa2ctlr(PA); CTLR* xq = xq_pa2ctlr(PA);
int index = (PA >> 1) & 07; /* word index */ int index = (PA >> 1) & 07; /* word index */
uint16 data = (uint16)ldata;
sim_debug(DBG_REG, xq->dev, "xq_wr(data=0x%08X, PA=0x%08X[%s], access=%d)\n", data, PA, ((xq->var->mode == XQ_T_DELQA_PLUS) ? xqt_xmit_regnames[index] : xq_xmit_regnames[index]), access); sim_debug(DBG_REG, xq->dev, "xq_wr(data=0x%08X, PA=0x%08X[%s], access=%d)\n", data, PA, ((xq->var->mode == XQ_T_DELQA_PLUS) ? xqt_xmit_regnames[index] : xq_xmit_regnames[index]), access);
@ -2888,7 +2889,7 @@ void xq_debug_setup(CTLR* xq)
if (xq->var->write_buffer.len > 128) { if (xq->var->write_buffer.len > 128) {
char buffer[20] = {0}; char buffer[20] = {0};
uint16 len = xq->var->write_buffer.len; uint16 len = (uint16)xq->var->write_buffer.len;
if (len & XQ_SETUP_MC) strcat(buffer, "MC "); if (len & XQ_SETUP_MC) strcat(buffer, "MC ");
if (len & XQ_SETUP_PM) strcat(buffer, "PM "); if (len & XQ_SETUP_PM) strcat(buffer, "PM ");
if (len & XQ_SETUP_LD) strcat(buffer, "LD "); if (len & XQ_SETUP_LD) strcat(buffer, "LD ");
@ -2952,7 +2953,7 @@ t_stat xq_boot (int32 unitno, DEVICE *dptr)
size_t i; size_t i;
DIB *dib = (DIB *)dptr->ctxt; DIB *dib = (DIB *)dptr->ctxt;
CTLR *xq = xq_unit2ctlr(&dptr->units[unitno]); CTLR *xq = xq_unit2ctlr(&dptr->units[unitno]);
uint16 *bootrom; uint16 *bootrom = NULL;
extern int32 REGFILE[6][2]; /* R0-R5, two sets */ extern int32 REGFILE[6][2]; /* R0-R5, two sets */
extern uint16 *M; /* Memory */ extern uint16 *M; /* Memory */

6
PDP11/pdp11_xq.h
View file

@ -259,9 +259,9 @@ struct xq_device {
ETH_MAC mac; /* Hardware MAC address */ ETH_MAC mac; /* Hardware MAC address */
enum xq_type type; /* controller type */ enum xq_type type; /* controller type */
enum xq_type mode; /* controller operating mode */ enum xq_type mode; /* controller operating mode */
uint16 poll; /* configured poll ethernet times/sec for receive */ uint32 poll; /* configured poll ethernet times/sec for receive */
uint16 coalesce_latency; /* microseconds to hold-off interrupts when not polling */ uint32 coalesce_latency; /* microseconds to hold-off interrupts when not polling */
uint16 coalesce_latency_ticks; /* instructions in coalesce_latency microseconds */ uint32 coalesce_latency_ticks; /* instructions in coalesce_latency microseconds */
struct xq_sanity sanity; /* sanity timer information */ struct xq_sanity sanity; /* sanity timer information */
t_bool lockmode; /* DEQNA-Lock mode */ t_bool lockmode; /* DEQNA-Lock mode */
/*- initialized values - DO NOT MOVE */ /*- initialized values - DO NOT MOVE */

16
PDP11/pdp11_xu.c
View file

@ -876,11 +876,11 @@ int32 xu_command(CTLR* xu)
if ((xu->var->pcb[1] & 1) || (xu->var->pcb[2] & 0374)) if ((xu->var->pcb[1] & 1) || (xu->var->pcb[2] & 0374))
return PCSR0_PCEI; return PCSR0_PCEI;
xu->var->udb[0] = xu->var->tdrb & 0177776; xu->var->udb[0] = xu->var->tdrb & 0177776;
xu->var->udb[1] = (xu->var->telen << 8) + ((xu->var->tdrb >> 16) & 3); xu->var->udb[1] = (uint16)((xu->var->telen << 8) + ((xu->var->tdrb >> 16) & 3));
xu->var->udb[2] = xu->var->trlen; xu->var->udb[2] = (uint16)xu->var->trlen;
xu->var->udb[3] = xu->var->rdrb & 0177776; xu->var->udb[3] = xu->var->rdrb & 0177776;
xu->var->udb[4] = (xu->var->relen << 8) + ((xu->var->rdrb >> 16) & 3); xu->var->udb[4] = (uint16)((xu->var->relen << 8) + ((xu->var->rdrb >> 16) & 3));
xu->var->udb[5] = xu->var->rrlen; xu->var->udb[5] = (uint16)xu->var->rrlen;
/* Write UDB to host memory. */ /* Write UDB to host memory. */
udbb = xu->var->pcb[1] + ((xu->var->pcb[2] & 3) << 16); udbb = xu->var->pcb[1] + ((xu->var->pcb[2] & 3) << 16);
@ -933,7 +933,7 @@ int32 xu_command(CTLR* xu)
udb[4] = stats->mfrecv & 0xFFFF; /* multicast frames received <15:00> */ udb[4] = stats->mfrecv & 0xFFFF; /* multicast frames received <15:00> */
udb[5] = stats->mfrecv >> 16; /* multicast frames received <31:16> */ udb[5] = stats->mfrecv >> 16; /* multicast frames received <31:16> */
udb[6] = stats->rxerf; /* receive error status bits */ udb[6] = stats->rxerf; /* receive error status bits */
udb[7] = stats->frecve; /* frames received with error */ udb[7] = (uint16)stats->frecve; /* frames received with error */
udb[8] = stats->rbytes & 0xFFFF; /* data bytes received <15:00> */ udb[8] = stats->rbytes & 0xFFFF; /* data bytes received <15:00> */
udb[9] = stats->rbytes >> 16; /* data bytes received <31:16> */ udb[9] = stats->rbytes >> 16; /* data bytes received <31:16> */
udb[10] = stats->mrbytes & 0xFFFF; /* multicast data bytes received <15:00> */ udb[10] = stats->mrbytes & 0xFFFF; /* multicast data bytes received <15:00> */
@ -974,14 +974,14 @@ int32 xu_command(CTLR* xu)
break; break;
case FC_RMODE: /* read mode register */ case FC_RMODE: /* read mode register */
value = xu->var->mode; value = (uint16)xu->var->mode;
wstatus = Map_WriteW(xu->var->pcbb+2, 2, &value); wstatus = Map_WriteW(xu->var->pcbb+2, 2, &value);
if (wstatus) if (wstatus)
return PCSR0_PCEI + 1; return PCSR0_PCEI + 1;
break; break;
case FC_WMODE: /* write mode register */ case FC_WMODE: /* write mode register */
value = xu->var->mode; value = (uint16)xu->var->mode;
xu->var->mode = xu->var->pcb[1]; xu->var->mode = xu->var->pcb[1];
sim_debug(DBG_TRC, xu->dev, "FC_WMODE: mode=%04x\n", xu->var->mode); sim_debug(DBG_TRC, xu->dev, "FC_WMODE: mode=%04x\n", xu->var->mode);
@ -1350,7 +1350,7 @@ void xu_process_transmit(CTLR* xu)
/* update transmit status in transmit buffer */ /* update transmit status in transmit buffer */
if (xu->var->write_buffer.status != 0) { if (xu->var->write_buffer.status != 0) {
/* failure */ /* failure */
const uint16 tdr = 100 + wlen * 8; /* arbitrary value */ const uint16 tdr = (uint16)(100 + wlen * 8); /* arbitrary value */
xu->var->txhdr[3] |= TXR_RTRY; xu->var->txhdr[3] |= TXR_RTRY;
xu->var->txhdr[3] |= tdr & TXR_TDR; xu->var->txhdr[3] |= tdr & TXR_TDR;
xu->var->txhdr[2] |= TXR_ERRS; xu->var->txhdr[2] |= TXR_ERRS;

4
VAX/vax630_io.c
View file

@ -557,7 +557,7 @@ if ((ba | bc) & 03) { /* check alignment */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */ if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i); return (bc - i);
} }
*buf = ReadB (ma); *buf = (uint8)ReadB (ma);
ma = ma + 1; ma = ma + 1;
} }
} }
@ -591,7 +591,7 @@ if ((ba | bc) & 03) { /* check alignment */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */ if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i); return (bc - i);
} }
*buf = ReadW (ma); *buf = (uint16)ReadW (ma);
ma = ma + 2; ma = ma + 2;
} }
} }

4
VAX/vax_2681.c
View file

@ -122,7 +122,7 @@ switch (rg) {
} }
else { else {
if (ctx->port[PORT_A].put_char != NULL) if (ctx->port[PORT_A].put_char != NULL)
ctx->port[PORT_A].put_char (data); ctx->port[PORT_A].put_char ((uint8)data);
} }
ua2681_update_txi (ctx); ua2681_update_txi (ctx);
break; break;
@ -183,7 +183,7 @@ switch (rg) {
} }
else { else {
if (ctx->port[PORT_B].put_char != NULL) if (ctx->port[PORT_B].put_char != NULL)
ctx->port[PORT_B].put_char (data); ctx->port[PORT_B].put_char ((uint8)data);
} }
ua2681_update_txi (ctx); ua2681_update_txi (ctx);
break; break;

4
VAX/vax_io.c
View file

@ -725,7 +725,7 @@ if ((ba | bc) & 03) { /* check alignment */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */ if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i); return (bc - i);
} }
*buf = ReadB (ma); *buf = (uint8)ReadB (ma);
ma = ma + 1; ma = ma + 1;
} }
} }
@ -759,7 +759,7 @@ if ((ba | bc) & 03) { /* check alignment */
if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */ if (!qba_map_addr (ba + i, &ma)) /* inv or NXM? */
return (bc - i); return (bc - i);
} }
*buf = ReadW (ma); *buf = (uint16)ReadW (ma);
ma = ma + 2; ma = ma + 2;
} }
} }

2
VAX/vax_syscm.c
View file

@ -464,7 +464,7 @@ return tptr;
t_stat get_spec (char *cptr, int32 addr, int32 n1, int32 *sptr, int32 *dptr) t_stat get_spec (char *cptr, int32 addr, int32 n1, int32 *sptr, int32 *dptr)
{ {
int32 reg, indir, pflag, disp; int32 reg, indir, pflag, disp = 0;
indir = 0; /* no indirect */ indir = 0; /* no indirect */
pflag = 0; pflag = 0;

9
VAX/vax_vc.c
View file

@ -601,7 +601,8 @@ return vc_buf[rg];
void vc_mem_wr (int32 pa, int32 val, int32 lnt) void vc_mem_wr (int32 pa, int32 val, int32 lnt)
{ {
uint32 rg = (pa >> 2) & 0xFFFF; uint32 rg = (pa >> 2) & 0xFFFF;
int32 nval, i; uint32 nval;
int32 i;
int32 sc; int32 sc;
uint32 scrln, bufln; uint32 scrln, bufln;
uint32 idx; uint32 idx;
@ -610,12 +611,12 @@ if (!vc_buf) /* QVSS disabled? */
MACH_CHECK (MCHK_WRITE); /* Invalid memory reference */ MACH_CHECK (MCHK_WRITE); /* Invalid memory reference */
if (lnt < L_LONG) { if (lnt < L_LONG) {
int32 mask = (lnt == L_WORD)? 0xFFFF: 0xFF; uint32 mask = (lnt == L_WORD)? 0xFFFF: 0xFF;
int32 t = vc_buf[rg]; uint32 t = vc_buf[rg];
sc = (pa & 3) << 3; sc = (pa & 3) << 3;
nval = ((val & mask) << sc) | (t & ~(mask << sc)); nval = ((val & mask) << sc) | (t & ~(mask << sc));
} }
else nval = val; else nval = (uint32)val;
if (rg >= 0xFFF8) { /* cursor image */ if (rg >= 0xFFF8) { /* cursor image */
idx = (pa << 3) & 0xFF; /* get byte index */ idx = (pa << 3) & 0xFF; /* get byte index */

34
scp.c
View file

@ -5912,8 +5912,8 @@ UNIT *uptr;
#define PUT_RVAL(sz,rp,id,v,m) \ #define PUT_RVAL(sz,rp,id,v,m) \
*(((sz *) rp->loc) + id) = \ *(((sz *) rp->loc) + id) = \
(*(((sz *) rp->loc) + id) & \ (sz)((*(((sz *) rp->loc) + id) & \
~((m) << (rp)->offset)) | ((v) << (rp)->offset) ~((m) << (rp)->offset)) | ((v) << (rp)->offset))
if (rptr == sim_PC) if (rptr == sim_PC)
sim_brk_npc (0); sim_brk_npc (0);
@ -6322,7 +6322,7 @@ while ((*iptr != 0) &&
} }
} }
if (islower (*iptr) && uc) if (islower (*iptr) && uc)
*optr = toupper (*iptr); *optr = (char)toupper (*iptr);
else *optr = *iptr; else *optr = *iptr;
iptr++; optr++; iptr++; optr++;
} }
@ -7011,7 +7011,7 @@ do {
d = d - 1; d = d - 1;
digit = (int32) (val % radix); digit = (int32) (val % radix);
val = val / radix; val = val / radix;
dbuf[d] = (digit <= 9)? '0' + digit: 'A' + (digit - 10); dbuf[d] = (char)((digit <= 9)? '0' + digit: 'A' + (digit - 10));
} while ((d > 0) && (val != 0)); } while ((d > 0) && (val != 0));
switch (format) { switch (format) {
@ -7804,15 +7804,15 @@ if (sim_deb_switches & (SWMASK ('T') | SWMASK ('R') | SWMASK ('A'))) {
clock_gettime(CLOCK_REALTIME, &time_now); clock_gettime(CLOCK_REALTIME, &time_now);
if (sim_deb_switches & SWMASK ('R')) if (sim_deb_switches & SWMASK ('R'))
sim_timespec_diff (&time_now, &time_now, &sim_deb_basetime); sim_timespec_diff (&time_now, &time_now, &sim_deb_basetime);
} if (sim_deb_switches & SWMASK ('T')) {
if (sim_deb_switches & SWMASK ('T')) { time_t tnow = (time_t)time_now.tv_sec;
time_t tnow = (time_t)time_now.tv_sec; struct tm *now = gmtime(&tnow);
struct tm *now = gmtime(&tnow);
sprintf(tim_t, "%02d:%02d:%02d.%03d ", now->tm_hour, now->tm_min, now->tm_sec, (int)(time_now.tv_nsec/1000000)); sprintf(tim_t, "%02d:%02d:%02d.%03d ", now->tm_hour, now->tm_min, now->tm_sec, (int)(time_now.tv_nsec/1000000));
} }
if (sim_deb_switches & SWMASK ('A')) { if (sim_deb_switches & SWMASK ('A')) {
sprintf(tim_t, "%" LL_FMT "d.%03d ", (long long)(time_now.tv_sec), (int)(time_now.tv_nsec/1000000)); sprintf(tim_t, "%" LL_FMT "d.%03d ", (long long)(time_now.tv_sec), (int)(time_now.tv_nsec/1000000));
}
} }
if (sim_deb_switches & SWMASK ('P')) { if (sim_deb_switches & SWMASK ('P')) {
t_value val; t_value val;
@ -8471,7 +8471,7 @@ for (i = 0; i < topic->kids; i++) {
*cptr++ = '_'; *cptr++ = '_';
} }
else { else {
*cptr = toupper (*cptr); *cptr = (char)toupper (*cptr);
cptr++; cptr++;
} }
} }
@ -8493,7 +8493,7 @@ t_stat scp_vhelp (FILE *st, struct sim_device *dptr,
const char *help, const char *cptr, va_list ap) const char *help, const char *cptr, va_list ap)
{ {
TOPIC top = { 0, NULL, NULL, &top, NULL, 0, NULL, 0, 0}; TOPIC top;
TOPIC *topic = &top; TOPIC *topic = &top;
int failed; int failed;
size_t match; size_t match;
@ -8515,6 +8515,8 @@ static const char help_help[] = {
" To exit help at any time, type EXIT.\n" " To exit help at any time, type EXIT.\n"
}; };
memset (&top, 0, sizeof(top));
top.parent = &top;
if ((failed = setjmp (help_env)) != 0) { if ((failed = setjmp (help_env)) != 0) {
fprintf (stderr, "\nHelp was unable to process the help for this device.\n" fprintf (stderr, "\nHelp was unable to process the help for this device.\n"
"Error in block %u line %u: %s\n" "Error in block %u line %u: %s\n"
@ -8541,7 +8543,7 @@ else
p = sim_name; p = sim_name;
top.title = (char *) malloc (strlen (p) + ((flag & SCP_HELP_ATTACH)? sizeof (attach_help)-1: 0) +1); top.title = (char *) malloc (strlen (p) + ((flag & SCP_HELP_ATTACH)? sizeof (attach_help)-1: 0) +1);
for (i = 0; p[i]; i++ ) for (i = 0; p[i]; i++ )
top.title[i] = toupper (p[i]); top.title[i] = (char)toupper (p[i]);
top.title[i] = '\0'; top.title[i] = '\0';
if (flag & SCP_HELP_ATTACH) if (flag & SCP_HELP_ATTACH)
strcpy (top.title+i, attach_help); strcpy (top.title+i, attach_help);
@ -8826,7 +8828,7 @@ while ((c = fgetc (fp)) != EOF) {
size += XPANDQ; size += XPANDQ;
p += n; p += n;
} }
*p++ = c; *p++ = (char)c;
} }
*p++ = '\0'; *p++ = '\0';

4
sim_BuildROMs.c
View file

@ -118,7 +118,7 @@ while (fgets (line, sizeof(line)-1, iFile)) {
allocated_size += 2048; allocated_size += 2048;
*pROMData = (unsigned char *)realloc(*pROMData, allocated_size); *pROMData = (unsigned char *)realloc(*pROMData, allocated_size);
} }
*(*pROMData + bytes_written++) = byte; *(*pROMData + bytes_written++) = (unsigned char)byte;
c += 5; c += 5;
} }
break; break;
@ -171,7 +171,7 @@ while ((c = strchr (rom_filename, '\\')))
strcpy (array_name, rom_filename); strcpy (array_name, rom_filename);
for (c=array_name; *c; ++c) for (c=array_name; *c; ++c)
if (isupper(*c)) if (isupper(*c))
*c = tolower(*c); *c = (char)tolower(*c);
if ((c = strchr (array_name, '.'))) if ((c = strchr (array_name, '.')))
*c = '_'; *c = '_';
if ((c = strchr (array_name, '/'))) if ((c = strchr (array_name, '/')))

3
sim_console.c
View file

@ -685,7 +685,7 @@ for (i=(was_stepping ? sim_rem_step_line : 0);
sim_rem_buf_size[i] += 1024; sim_rem_buf_size[i] += 1024;
sim_rem_buf[i] = (char *)realloc (sim_rem_buf[i], sim_rem_buf_size[i]); sim_rem_buf[i] = (char *)realloc (sim_rem_buf[i], sim_rem_buf_size[i]);
} }
sim_rem_buf[i][sim_rem_buf_ptr[i]++] = c; sim_rem_buf[i][sim_rem_buf_ptr[i]++] = (char)c;
sim_rem_buf[i][sim_rem_buf_ptr[i]] = '\0'; sim_rem_buf[i][sim_rem_buf_ptr[i]] = '\0';
if (((size_t)sim_rem_buf_ptr[i]) >= sizeof(cbuf)) if (((size_t)sim_rem_buf_ptr[i]) >= sizeof(cbuf))
got_command = TRUE; /* command too long */ got_command = TRUE; /* command too long */
@ -1111,6 +1111,7 @@ sim_switches = saved_deb_switches;
sim_set_debon (0, saved_debug_filename); sim_set_debon (0, saved_debug_filename);
sim_deb_basetime = saved_deb_basetime; sim_deb_basetime = saved_deb_basetime;
sim_switches = saved_sim_switches; sim_switches = saved_sim_switches;
sim_quiet = saved_quiet;
return SCPE_OK; return SCPE_OK;
} }

4
sim_disk.c
View file

@ -472,8 +472,8 @@ if (ctx->asynch_io) {
uptr->a_check_completion = _disk_completion_dispatch; uptr->a_check_completion = _disk_completion_dispatch;
uptr->a_is_active = _disk_is_active; uptr->a_is_active = _disk_is_active;
uptr->a_cancel = _disk_cancel; uptr->a_cancel = _disk_cancel;
#endif
return SCPE_OK; return SCPE_OK;
#endif
} }
/* Disable asynchronous operation */ /* Disable asynchronous operation */
@ -3284,7 +3284,7 @@ if (bFixedVHD) {
/* Dynamic Disk */ /* Dynamic Disk */
memset (&Dynamic, 0, sizeof(Dynamic)); memset (&Dynamic, 0, sizeof(Dynamic));
memcpy (Dynamic.Cookie, "cxsparse", 8); memcpy (Dynamic.Cookie, "cxsparse", 8);
Dynamic.DataOffset = NtoHll (0xFFFFFFFFFFFFFFFFLL); Dynamic.DataOffset = NtoHll ((uint64)0xFFFFFFFFFFFFFFFFLL);
TableOffset = NtoHll(Footer.DataOffset)+sizeof(Dynamic); TableOffset = NtoHll(Footer.DataOffset)+sizeof(Dynamic);
Dynamic.TableOffset = NtoHll (TableOffset); Dynamic.TableOffset = NtoHll (TableOffset);
Dynamic.HeaderVersion = NtoHl (0x00010000); Dynamic.HeaderVersion = NtoHl (0x00010000);

8
sim_serial.c
View file

@ -303,9 +303,9 @@ for (i=0; i<len; i++) {
s1 = string1[i]; s1 = string1[i];
s2 = string2[i]; s2 = string2[i];
if (islower (s1)) if (islower (s1))
s1 = toupper (s1); s1 = (unsigned char)toupper (s1);
if (islower (s2)) if (islower (s2))
s2 = toupper (s2); s2 = (unsigned char)toupper (s2);
if (s1 < s2) if (s1 < s2)
return -1; return -1;
if (s1 > s2) if (s1 > s2)
@ -493,7 +493,7 @@ config.charsize = (uint32)strtotv (sptr, &tptr, 10); /* parse character size
arg_error = arg_error || (sptr == tptr); /* check for bad argument */ arg_error = arg_error || (sptr == tptr); /* check for bad argument */
if (*tptr) /* parity character present? */ if (*tptr) /* parity character present? */
config.parity = toupper (*tptr++); /* save parity character */ config.parity = (char)toupper (*tptr++); /* save parity character */
config.stopbits = (uint32)strtotv (tptr, &sptr, 10); /* parse number of stop bits */ config.stopbits = (uint32)strtotv (tptr, &sptr, 10); /* parse number of stop bits */
arg_error = arg_error || (tptr == sptr); /* check for bad argument */ arg_error = arg_error || (tptr == sptr); /* check for bad argument */
@ -699,7 +699,7 @@ if (!GetCommState (port, &dcb)) { /* get the current comm
dcb.BaudRate = config.baudrate; /* assign baud rate */ dcb.BaudRate = config.baudrate; /* assign baud rate */
if (config.charsize >= 5 && config.charsize <= 8) /* character size OK? */ if (config.charsize >= 5 && config.charsize <= 8) /* character size OK? */
dcb.ByteSize = config.charsize; /* assign character size */ dcb.ByteSize = (BYTE)config.charsize; /* assign character size */
else else
return SCPE_ARG; /* not a valid size */ return SCPE_ARG; /* not a valid size */

4
sim_sock.c
View file

@ -229,7 +229,7 @@ struct hostent *he;
struct servent *se = NULL; struct servent *se = NULL;
struct sockaddr_in *sin; struct sockaddr_in *sin;
struct addrinfo *result = NULL; struct addrinfo *result = NULL;
struct addrinfo *ai, *lai; struct addrinfo *ai, *lai = NULL;
struct addrinfo dhints; struct addrinfo dhints;
struct in_addr ipaddr; struct in_addr ipaddr;
struct in_addr *fixed[2]; struct in_addr *fixed[2];
@ -355,7 +355,7 @@ for (ip=ips; (ip != NULL) && (*ip != NULL); ++ip) {
} }
sin = (struct sockaddr_in *)ai->ai_addr; sin = (struct sockaddr_in *)ai->ai_addr;
sin->sin_family = PF_INET; sin->sin_family = PF_INET;
sin->sin_port = port; sin->sin_port = (unsigned short)port;
memcpy(&sin->sin_addr, *ip, sizeof(sin->sin_addr)); memcpy(&sin->sin_addr, *ip, sizeof(sin->sin_addr));
if (NULL == result) if (NULL == result)
result = ai; result = ai;

6
sim_tape.c
View file

@ -373,8 +373,8 @@ if (ctx->asynch_io) {
uptr->a_check_completion = _tape_completion_dispatch; uptr->a_check_completion = _tape_completion_dispatch;
uptr->a_is_active = _tape_is_active; uptr->a_is_active = _tape_is_active;
uptr->a_cancel = _tape_cancel; uptr->a_cancel = _tape_cancel;
#endif
return SCPE_OK; return SCPE_OK;
#endif
} }
/* Disable asynchronous operation */ /* Disable asynchronous operation */
@ -1723,7 +1723,7 @@ return r;
/* Position Tape */ /* Position Tape */
t_stat sim_tape_position (UNIT *uptr, uint8 flags, uint32 recs, uint32 *recsskipped, uint32 files, uint32 *filesskipped, uint32 *objectsskipped) t_stat sim_tape_position (UNIT *uptr, uint32 flags, uint32 recs, uint32 *recsskipped, uint32 files, uint32 *filesskipped, uint32 *objectsskipped)
{ {
struct tape_context *ctx = (struct tape_context *)uptr->tape_ctx; struct tape_context *ctx = (struct tape_context *)uptr->tape_ctx;
t_stat r = MTSE_OK; t_stat r = MTSE_OK;
@ -1773,7 +1773,7 @@ else {
return r; return r;
} }
t_stat sim_tape_position_a (UNIT *uptr, uint8 flags, uint32 recs, uint32 *recsskipped, uint32 files, uint32 *filesskipped, uint32 *objectsskipped, TAPE_PCALLBACK callback) t_stat sim_tape_position_a (UNIT *uptr, uint32 flags, uint32 recs, uint32 *recsskipped, uint32 files, uint32 *filesskipped, uint32 *objectsskipped, TAPE_PCALLBACK callback)
{ {
t_stat r = MTSE_OK; t_stat r = MTSE_OK;
AIO_CALLSETUP AIO_CALLSETUP

4
sim_tape.h
View file

@ -157,8 +157,8 @@ t_stat sim_tape_spfilebyrecr (UNIT *uptr, uint32 count, uint32 *skipped, uint32
t_stat sim_tape_spfilebyrecr_a (UNIT *uptr, uint32 count, uint32 *skipped, uint32 *recsskipped, TAPE_PCALLBACK callback); t_stat sim_tape_spfilebyrecr_a (UNIT *uptr, uint32 count, uint32 *skipped, uint32 *recsskipped, TAPE_PCALLBACK callback);
t_stat sim_tape_rewind (UNIT *uptr); t_stat sim_tape_rewind (UNIT *uptr);
t_stat sim_tape_rewind_a (UNIT *uptr, TAPE_PCALLBACK callback); t_stat sim_tape_rewind_a (UNIT *uptr, TAPE_PCALLBACK callback);
t_stat sim_tape_position (UNIT *uptr, uint8 flags, uint32 recs, uint32 *recskipped, uint32 files, uint32 *fileskipped, uint32 *objectsskipped); t_stat sim_tape_position (UNIT *uptr, uint32 flags, uint32 recs, uint32 *recskipped, uint32 files, uint32 *fileskipped, uint32 *objectsskipped);
t_stat sim_tape_position_a (UNIT *uptr, uint8 flags, uint32 recs, uint32 *recsskipped, uint32 files, uint32 *filesskipped, uint32 *objectsskipped, TAPE_PCALLBACK callback); t_stat sim_tape_position_a (UNIT *uptr, uint32 flags, uint32 recs, uint32 *recsskipped, uint32 files, uint32 *filesskipped, uint32 *objectsskipped, TAPE_PCALLBACK callback);
t_stat sim_tape_reset (UNIT *uptr); t_stat sim_tape_reset (UNIT *uptr);
t_bool sim_tape_bot (UNIT *uptr); t_bool sim_tape_bot (UNIT *uptr);
t_bool sim_tape_wrp (UNIT *uptr); t_bool sim_tape_wrp (UNIT *uptr);

2
sim_timer.c
View file

@ -979,7 +979,7 @@ else {
if (cptr == tptr) if (cptr == tptr)
return SCPE_ARG; return SCPE_ARG;
sim_throt_sleep_time = sim_idle_rate_ms; sim_throt_sleep_time = sim_idle_rate_ms;
c = toupper (*tptr++); c = (char)toupper (*tptr++);
if (c == '/') if (c == '/')
val2 = strtotv (tptr, &tptr, 10); val2 = strtotv (tptr, &tptr, 10);
if ((*tptr != 0) || (val == 0)) if ((*tptr != 0) || (val == 0))

32
sim_tmxr.c
View file

@ -344,22 +344,22 @@
/* Telnet protocol constants - negatives are for init'ing signed char data */ /* Telnet protocol constants - negatives are for init'ing signed char data */
/* Commands */ /* Commands */
#define TN_IAC 0xFF /* -1 */ /* protocol delim */ #define TN_IAC 0xFFu /* -1 */ /* protocol delim */
#define TN_DONT 0xFE /* -2 */ /* dont */ #define TN_DONT 0xFEu /* -2 */ /* dont */
#define TN_DO 0xFD /* -3 */ /* do */ #define TN_DO 0xFDu /* -3 */ /* do */
#define TN_WONT 0xFC /* -4 */ /* wont */ #define TN_WONT 0xFCu /* -4 */ /* wont */
#define TN_WILL 0xFB /* -5 */ /* will */ #define TN_WILL 0xFBu /* -5 */ /* will */
#define TN_SB 0xFA /* -6 */ /* sub-option negotiation */ #define TN_SB 0xFAu /* -6 */ /* sub-option negotiation */
#define TN_GA 0xF9 /* -7 */ /* go ahead */ #define TN_GA 0xF9u /* -7 */ /* go ahead */
#define TN_EL 0xF8 /* -8 */ /* erase line */ #define TN_EL 0xF8u /* -8 */ /* erase line */
#define TN_EC 0xF7 /* -9 */ /* erase character */ #define TN_EC 0xF7u /* -9 */ /* erase character */
#define TN_AYT 0xF6 /* -10 */ /* are you there */ #define TN_AYT 0xF6u /* -10 */ /* are you there */
#define TN_AO 0xF5 /* -11 */ /* abort output */ #define TN_AO 0xF5u /* -11 */ /* abort output */
#define TN_IP 0xF4 /* -12 */ /* interrupt process */ #define TN_IP 0xF4u /* -12 */ /* interrupt process */
#define TN_BRK 0xF3 /* -13 */ /* break */ #define TN_BRK 0xF3u /* -13 */ /* break */
#define TN_DATAMK 0xF2 /* -14 */ /* data mark */ #define TN_DATAMK 0xF2u /* -14 */ /* data mark */
#define TN_NOP 0xF1 /* -15 */ /* no operation */ #define TN_NOP 0xF1u /* -15 */ /* no operation */
#define TN_SE 0xF0 /* -16 */ /* end sub-option negot */ #define TN_SE 0xF0u /* -16 */ /* end sub-option negot */
/* Options */ /* Options */