folkert/simh-testsetgenerator
1
0
Fork 0
Code Issues Pull requests Projects Releases Packages Wiki Activity Actions

I650: Release 2

Browse source 
Hardware support:
- Half cycle simulation
- Halt CPU simulation (^E on SimH console)

New Software included: Carnegie Internal Translator (IT)
New features
- Support for displaying SOAP symbolic instructions in debug information
- CardDeck internal command to split/join/print decks of cards

Bugs corrected:
- Fixed card format handling. Release 1 can only read TEXT format
- Removed superfluous line ends from debug strings.
- Better minus zero support
- Fixed unneeded prompt Really truncate memory [N] when setting memory size
This commit is contained in:
Roberto Sancho Villa 2018-04-20 15:55:26 +02:00
parent 9160b9a03a
commit 02e7483ee7
42 changed files with 10154 additions and 1855 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

23
I650/650_test.ini
View file

@ -1,14 +1,29 @@
cd sw
; set debug -n debug.txt
; set console -n log=console.txt
; set debug stdout
; set debug -n debug.txt
; set cpu debug=cmd;data;detail
; uncomment any of them to simulate ibm 650 real speed
; set throttle 11k
; set throttle 55/5
do Build_soap_from_source.ini
do soap_and_run.ini soap_example_1_src.txt 1000
do Build_is_from_decks.ini ntr lbox
do is_run.ini is_example_1_src.txt
set env -P "Press enter to continue . . . "
do soap_and_run.ini soap_example_1_src.txt 1000
set env -P "Press enter to continue . . . "
do Build_is_from_decks.ini ntr lbox
set env -P "Press enter to continue . . . "
do is_run.ini is_example_1_src.txt
set env -P "Press enter to continue . . . "
do it_run.ini it_example_1_src.txt it_example_1_data.txt deck_out.dck
set env -P "Press enter to continue . . . "
do it_run.ini it_example_2_src.txt nul deck_out.dck

220
I650/i650_cdp.c
View file

@ -32,7 +32,7 @@
#include "i650_defs.h"
#include "sim_card.h"
#define UNIT_CDP UNIT_ATTABLE | MODE_026
#define UNIT_CDP UNIT_ATTABLE | MODE_026 | MODE_LOWER
/* std devices. data structures
@ -77,13 +77,6 @@ DEVICE cdp_dev = {
NULL, NULL, &cdp_help, NULL, NULL, &cdp_description
};
static struct card_wirings wirings[] = {
{WIRING_8WORD, "8WORD"},
{WIRING_SOAP, "SOAP"},
{WIRING_IS, "IS"},
{0, 0},
};
// vars where card is encoded for punching
char card_buf[120];
int card_nbuf;
@ -116,13 +109,23 @@ void encode_lpt_num(t_int64 d, int l)
{
char s[20];
int i,n;
char pad;
if (l < 0) {
l=-l; pad = ' '; // if l < 0 pad with space
} else {
pad = '0'; // if l > 0 pag with zero
}
d=AbsWord(d);
for (i=9;i>=0;i--) {
n = (int) (d % 10);
d = d / 10;
s[i] = '0' + n;
}
if (pad == ' ') for(i=0;i<9;i++) {
if (s[i] != '0') break;
s[i] = ' ';
}
s[10] = 0;
encode_lpt_str(&s[10-l]);
}
@ -131,6 +134,7 @@ void encode_lpt_num(t_int64 d, int l)
#define wf_NN_NNNN_NNNNs 1
#define wf_sN_NNNNNNN_NN 3
#define wf_sN_NNN_NNN_NNN 4
#define wf_nnnnnnnnnNs 5
void encode_lpt_word(t_int64 d, int NegZero, int wFormat)
{
@ -154,6 +158,9 @@ void encode_lpt_word(t_int64 d, int NegZero, int wFormat)
n = Shift_Digits(&d, 3); encode_lpt_num(n, 3); encode_lpt_spc(1);
n = Shift_Digits(&d, 3); encode_lpt_num(n, 3); encode_lpt_spc(1);
n = Shift_Digits(&d, 3); encode_lpt_num(n, 3);
} else if (wFormat == wf_nnnnnnnnnNs) {
encode_lpt_num(d,-10); // replace leading zeroes by spaces
encode_char(0, neg ? '-':' ');
} else { // default: wFormat == wf_NNNNNNNNNNs
encode_lpt_num(d,10);
encode_char(0, neg ? '-':' ');
@ -164,6 +171,8 @@ void encode_lpt_word(t_int64 d, int NegZero, int wFormat)
// if d negative, sign on last digit (units digit)
// if bSetHiPuch=1, set HiPunch on last digit.
// if bSetHiPuch=2, set HiPunch on last digit and on second digit.
// if bSetHiPuch=3, set HiPunch on third digit
// if last digit is negative, never set HiPunch even if asked for (a card column cannot have both X(11) and Y(12) punched)
void sprintf_word(char * pch_word, t_int64 d, int NegZero, int bSetHiPuch)
{
int i,n,neg, hi;
@ -178,8 +187,9 @@ void sprintf_word(char * pch_word, t_int64 d, int NegZero, int bSetHiPuch)
}
for (i=9;i>=0;i--) {
hi = 0;
if ((i==1) && (bSetHiPuch == 2)) hi = 1; // Set Hi Punch on second digit
if ((i==9) && (bSetHiPuch > 0)) hi = 1; // Set Hi Punch on last digit (units digit)
if ((i==1) && (bSetHiPuch == 2)) hi = 1; // Set Hi Punch on second digit
if ((i==2) && (bSetHiPuch == 3)) hi = 1; // Set Hi Punch on third digit
if ((i==9) && ( (bSetHiPuch == 1) || (bSetHiPuch == 2) ) && (neg == 0)) hi = 1; // Set Hi Punch on last digit (units digit)
n = (int) (d % 10);
d = d / 10;
n = n + hi * 10;
@ -226,6 +236,7 @@ void encode_soap_wiring(int addr)
// encode soap card simulating soap control panel wiring for 533
// from SOAP II manual at http://www.bitsavers.org/pdf/ibm/650/24-4000-0_SOAPII.pdf
// storage in output block
// +-------------------+
// Word 1977: | <- Location -> | Alphabetic
// 1978: | <- Data Addr -> | Alphabetic
// 1979: | <- Inst Addr -> | Alphabetic
@ -351,16 +362,20 @@ void encode_soap_wiring(int addr)
encode_lpt_num(pat2, 4);
encode_lpt_spc(5);
}
} else if (ty == 1) {
// print coment line
encode_lpt_str("1");
} else if ((ty == 1) || (ty == 5)) {
// print coment for card type 1 (SOAP II) or type 5 (SOAP modified for IT)
encode_char(0, '0' + ty);
encode_lpt_spc(14);
encode_lpt_str(loc); encode_lpt_str(OpCode);
encode_lpt_str(data_addr); encode_lpt_str(Data_Tag);
encode_lpt_str(inst_addr); encode_lpt_str(Instr_Tag);
encode_lpt_str(rem1); encode_lpt_str(rem2);
} else {
encode_lpt_spc(1);
if (ty == 0) {
encode_lpt_spc(1);
} else {
encode_char(0, '0' + ty);
}
encode_lpt_str(loc);
encode_lpt_spc(2); encode_char(0, neg ? '-':' '); encode_lpt_spc(1);
encode_lpt_str(OpCode); encode_lpt_spc(3);
@ -512,6 +527,162 @@ void encode_is_wiring(int addr)
}
}
void encode_it_wiring(int addr)
{
// encode card for IT compiler modified soap
// from IT manual at http://www.bitsavers.org/pdf/ibm/650/CarnegieInternalTranslator.pdf
// storage in output block
// +-------------------+
// Word 1977: | <- Loc. Label -> | Alphabetic
// 1978: | <- Op Code -> | Alphabetic
// 1979: | <- Data Addr -> | Alphabetic
// 1980: | <- Inst Addr -> | Alphabetic
// 1981: | <- Remarks -> | Alphabetic
// 1982: | <- Remarks -> | Alphabetic
// +-------------------+
// 1983: | | Not Used
// 1984: | | Not Used
// +-------------------+
// 1985: | |N N N N| | N N N N=Card Number
// 1986: |a|b|c|d|e|f|g|h|i|j| a = 0/8 =8 -> reservation card
// b = 0/8 (regional setting) =0 -> card type 3, =8 -> card type 4
// c = 0/8
// d = 0/8 =8 -> negative value
// e = 0/8
// f = 0/8
// g = 0/8 =8 -> punching a PIT card
// h = 0/8 =8 -> type 1 data out format
// i = 0/8
// j = 0/8
//
// SIT printout format
// | Card Num | Ty | Location | Sg | OpCode | Data Addr | Instr Addr | Remarks
// SIT punch format is SOAP source card format
// Column: 41 | 42 | 43 44 45 46 47 | 48 49 50 | 51 52 53 54 55 | 56 | 57 58 59 60 61 | 62 | 63 64 65 66 67 68 69 70 71 72
// Ty | Sg | Location | OpCode | Data Addr | | Instr Addr | | Remarks
//
// Ty = Type = blank, 3 or 4 (regional setting)
// Sg = sign = blank or -
//
// If word 1986 contains 8 in digit h, it is a type 1 data out card format
// +----+------+-------+
// Word 1977: | VV | +NNN | SSSS | IT variable 1
// 1978: | Word |
// +-------------------+
// 1979: | | IT variable 2 (zero if none)
// 1980: | |
// +-------------------+
// 1981: | | IT variable 3
// 1982: | |
// +-------------------+
// 1983: | | IT variable 4
// 1984: | |
// +-------------------+
// 1985: | | Not used
// 1986: |8|0|0|0|0|0|8|8|0|0| control word for type 1 data out card
//
// VV = IT variable being punched: 01 -> I type, 02 -> Y type, 03 -> C type
// + N N N = variable number (I5 -> 01 0005). + means zoro with Y(12) overpunch
// S S S S = statement number of IT source program where TYPE command that generates the card is
// Word = value from IT variable. If type I, is an integer. If type C or Y
// type is word is float (M MMMMMMM EE -> M=mantisa, EE=exponent)
// can be is negative (X(11) overpunch in last digit)
// up to 4 pairs var-word per card
// leading zeroes of each word are replaced by spaces
char pch_word[20];
char loc[6], data_addr[6], inst_addr[6], OpCode[6], rem1[6], rem2[6];
t_int64 d;
int CardNum, ty;
int b, neg, b_pit, b_reg, b_resv, b_data; // punch control flags
int i;
word_to_ascii(loc, 1, 5, DRUM[addr + 0]);
word_to_ascii(OpCode, 1, 3, DRUM[addr + 1]);
word_to_ascii(data_addr, 1, 5, DRUM[addr + 2]);
word_to_ascii(inst_addr, 1, 5, DRUM[addr + 3]);
word_to_ascii(rem1, 1, 5, DRUM[addr + 4]);
word_to_ascii(rem2, 1, 5, DRUM[addr + 5]);
CardNum = (int) ((DRUM[addr + 8] / D4) % D4);
d = DRUM[addr + 9];
b = ((int) (d % 10) == 8) ? 1:0; d = d / 10;
b = ((int) (d % 10) == 8) ? 1:0; d = d / 10;
b_data = ((int) (d % 10) == 8) ? 1:0; d = d / 10;
b_pit = ((int) (d % 10) == 8) ? 1:0; d = d / 10;
b = ((int) (d % 10) == 8) ? 1:0; d = d / 10;
b = ((int) (d % 10) == 8) ? 1:0; d = d / 10;
neg = ((int) (d % 10) == 8) ? 1:0; d = d / 10;
b = ((int) (d % 10) == 8) ? 1:0; d = d / 10;
b_reg = ((int) (d % 10) == 8) ? 1:0; d = d / 10;
b_resv = ((int) (d % 10) == 8) ? 1:0; d = d / 10;
// printf("bits %06d%04d%c ", printfw(DRUM[addr + 9])); // to echo the status digits of punched card
// generate card
if (b_data) {
// punch type 1 data out card
for (i=0;i<4;i++) {
sprintf_word(pch_word, DRUM[addr + i*2+0], 0, (i==0) ? 3:0); // punch variable name
encode_pch_str(pch_word);
sprintf_word(pch_word, DRUM[addr + i*2+1], 0, (i==0) ? 3:0); // punch variable value
encode_pch_str(pch_word);
if (DRUM[addr + i*2+2] == 0) break; // if next word is zero, no more variables to punch
}
} else {
// punch SOAP source instruction
for(i=0;i<40;i++) encode_pch_str(" "); // leave 40 first columns blank
if (b_resv) {
if (b_reg) {
ty = 4;
} else {
ty = 3;
}
} else {
ty = 0;
}
encode_char(ty == 0 ? ' ' : '0'+ty, 0);
encode_char(neg == 0 ? ' ' : '-', 0);
encode_pch_str(loc);
encode_pch_str(OpCode);
encode_pch_str(data_addr);
encode_pch_str(" ");
encode_pch_str(inst_addr);
encode_pch_str(" ");
encode_pch_str(rem1);
encode_pch_str(rem2);
// convert to lowercase for punching
for (i=40;i<card_nbuf;i++)
if ((card_buf[i] >= 'A') && (card_buf[i] <= 'Z'))
card_buf[i] = card_buf[i] - 'A' + 'a';
card_buf[card_nbuf] = 0;
}
// generate printout
if (b_data) {
// print type 1 data out card. replace leading zeroes by spaces on each word
for (i=0;i<4;i++) {
encode_lpt_word(DRUM[addr + i*2+0], 0, wf_nnnnnnnnnNs); // print variable name
encode_lpt_spc(1);
encode_lpt_word(DRUM[addr + i*2+1], 0, wf_nnnnnnnnnNs); // print variable value
encode_lpt_spc(1);
if (DRUM[addr + i*2+2] == 0) break; // if next word is zero, no more variables to punch
}
} else {
// print generated soap source listing
encode_lpt_spc(2);
encode_lpt_num(CardNum, -4);
encode_lpt_spc(2);
encode_char(0, ty == 0 ? ' ' : '0'+ty);
encode_lpt_spc(2);
encode_lpt_str(loc);
encode_lpt_spc(2); encode_char(0, neg ? '-':' '); encode_lpt_spc(1);
encode_lpt_str(OpCode); encode_lpt_spc(3);
encode_lpt_str(data_addr); encode_lpt_spc(1); encode_lpt_spc(2);
encode_lpt_str(inst_addr); encode_lpt_spc(6);
encode_lpt_str(rem1); encode_lpt_str(rem2);
}
}
/* Card punch routine */
uint32 cdp_cmd(UNIT * uptr, uint16 cmd, uint16 addr)
{
@ -525,7 +696,7 @@ uint32 cdp_cmd(UNIT * uptr, uint16 cmd, uint16 addr)
/* Test ready */
if ((uptr->flags & UNIT_ATT) == 0) {
sim_debug(DEBUG_CMD, &cdp_dev, "No cards (no file attached)\r\n");
sim_debug(DEBUG_CMD, &cdp_dev, "No cards (no file attached)\n");
return SCPE_NOCARDS;
}
@ -539,8 +710,11 @@ uint32 cdp_cmd(UNIT * uptr, uint16 cmd, uint16 addr)
// encode soap card simulating soap control panel wiring for 533 (gasp!)
encode_soap_wiring(addr);
} else if (wiring == WIRING_IS) {
// encode it card
// encode floating point interpretive system (bell interpreter) card
encode_is_wiring(addr);
} else if (wiring == WIRING_IT) {
// encode Carnegie Internal Translator compiler card
encode_it_wiring(addr);
} else if (wiring == WIRING_8WORD) {
// encode 8 words per card
encode_8word_wiring(addr);
@ -561,14 +735,14 @@ uint32 cdp_cmd(UNIT * uptr, uint16 cmd, uint16 addr)
if (uptr->flags & UNIT_CARD_PRINT) {
// printout will be directed to file attached to CDP0 unit, if any
if (cdp_unit[0].flags & UNIT_ATT) {
sim_fwrite(&card_lpt, 1, card_nlpt, cdp_unit[0].fileref);
sim_fwrite(card_lpt, 1, card_nlpt, cdp_unit[0].fileref);
}
}
}
// trim right spaces for printing punch card
card_buf[card_nbuf] = 0;
sim_debug(DEBUG_DETAIL, &cpu_dev, "Punch Card: %s\r\n", card_buf);
sim_debug(DEBUG_DETAIL, &cpu_dev, "Punch Card: %s\n", card_buf);
/* punch the cards */
data = (struct _card_data *)uptr->up7;
@ -588,9 +762,9 @@ uint32 cdp_cmd(UNIT * uptr, uint16 cmd, uint16 addr)
}
}
sim_punch_card(uptr, NULL);
sim_debug(DEBUG_CMD, &cdp_dev, "PUNCH\r\n");
sim_debug(DEBUG_CMD, &cdp_dev, "PUNCH\n");
uptr->u5 |= URCSTA_BUSY;
uptr->u4 = 0;
uptr->u6++; // incr number of punched cards
uptr->u5 &= ~URCSTA_BUSY;
@ -694,9 +868,11 @@ cdp_attach(UNIT * uptr, CONST char *file)
{
t_stat r;
if ((r = sim_card_attach(uptr, file)) != SCPE_OK)
return r;
r = sim_card_attach(uptr, file);
if (SCPE_BARE_STATUS(r) != SCPE_OK)
return r;
uptr->u5 = 0;
uptr->u6 = 0; // u6 = number of cards punched
return SCPE_OK;
}

381
I650/i650_cdr.c
View file

@ -32,7 +32,7 @@
#include "i650_defs.h"
#include "sim_card.h"
#define UNIT_CDR UNIT_ATTABLE | UNIT_RO | MODE_026
#define UNIT_CDR UNIT_ATTABLE | UNIT_RO | MODE_026 | MODE_LOWER
/* std devices. data structures
@ -54,9 +54,9 @@ t_stat cdr_set_wiring (UNIT *uptr, int32 val, CONST char *cptr, voi
t_stat cdr_show_wiring (FILE *st, UNIT *uptr, int32 val, CONST void *desc);
UNIT cdr_unit[] = {
{UDATA(cdr_srv, UNIT_CDR, 0), 300}, // 4 readers. Unit 0 not used
{UDATA(cdr_srv, UNIT_CDR, 0), 300},
{UDATA(cdr_srv, UNIT_CDR, 0), 300},
{UDATA(cdr_srv, UNIT_CDR, 0), 300}, // Unit 0 used internally for carddeck operations simulator specific command
{UDATA(cdr_srv, UNIT_CDR, 0), 300}, // unit 1 is default for initial model (1954)
{UDATA(cdr_srv, UNIT_CDR, 0), 300}, // storage unit (1955) allows two extra card/readers for a total of 3
{UDATA(cdr_srv, UNIT_CDR, 0), 300},
};
@ -74,89 +74,106 @@ DEVICE cdr_dev = {
NULL, NULL, &cdr_help, NULL, NULL, &cdr_description
};
static struct card_wirings wirings[] = {
{WIRING_8WORD, "8WORD"},
{WIRING_SOAP, "SOAP"},
{WIRING_IS, "IS"},
{0, 0},
};
// decode digit 0-9 read from card to get value and X(11) and Y(12) punch state (minus/HiPunch)
// return -1 if not a digit number
int decode_digit(char c1, int * HiPunch, int * NegPunch)
{
int i,n;
*HiPunch = *NegPunch = 0;
// N is 0..9 or ?A..I (0..9 with Y(12) High Punch set)
// or !J..R (0..9 with X(11) Minus Punch set).
// or &S..Z# (0..9 with both X(11) and Y(12) Punch set).
if (c1 == 32) return 0; // space read as zero
for (i=0; i<40; i++) {
if (c1 == digits_ascii[i]) {
n = i % 10;
i = i / 10;
*HiPunch = (i & 1);
*NegPunch = (i >> 1);
return n;
}
}
return -1; // not a valid digit
}
// get 10 digits word from buf, with sign. return 1 if HiPunch set on any digit
int decode_8word_wiring(char * buf, int addr)
// get 10 digits word with sign from card buf (the data struct). return 1 if HiPunch set on any digit
int decode_8word_wiring(struct _card_data * data, int addr)
{
// decode up to 8 numerical words per card
// input card
// NNNNNNNNNN ... 8 times
// N is 0..9 or ?A..I (0..9 with Y(12) High Punch set)
// or !J..R (0..9 with X(11) Minus Punch set).
// or &S..Z# (0..9 with both X(11) and Y(12) Punch set).
// If last digit of word has X(11) punch whole word is set as negative value
// If N is a space, a 0 is assumed
// If N is non numeric, a 0 is assumed
// put the decoded data in drum at addr (if addr < 0 -> do not store in drum)
// return 1 if any colum has Y(12) hi-punch set
int c1,c2,wn,eor,iCol;
int HiPunch, hip;
int NegPunch, NegZero;
int nDigits;
uint16 c1,c2;
int wn,iCol,iDigit;
int HiPunch, NegPunch, NegZero;
t_int64 d;
NegZero = 0; // flag set if negative zero is read
HiPunch = 0; // set to 1 if Y(12) high punch found
eor = 0; // signals end of card record
iCol = 0; // current read colum in card
for (wn=0;wn<8;wn++) { // one card generates 8 words in drum mem
d = 0;
nDigits=0; // number of digits
while (1) {
c1 = buf[iCol++];
if (c1 < ' ') {eor = 1; break;} // end of card
c2 = decode_digit(c1, &hip, &NegPunch);
if (hip) HiPunch = 1; // if any column has Hi Punch Y(12) set, signal it
if (c2 < 0) c2 = 0; // nondigits chars interpreted as zero
d = d * 10 + c2;
nDigits++;
if (nDigits == 10) {
// end of word
if (NegPunch) { // has last digit a minus X(11) punch set?
d = -d; // yes, change sign of word read
if (d == 0) NegZero=1; // word read is minus zero
}
break;
NegZero = 0; // flag set if negative zero is read
HiPunch = 0; // set to 1 if Y(12) high punch found
iCol = 0; // current read colum in card
for (wn=0;wn<8;wn++) { // one card generates 8 words in drum mem
d = NegPunch = 0;
// read word digits
for (iDigit=0;iDigit<10;iDigit++) {
c1 = data->image[iCol++];
c2 = data->hol_to_ascii[c1]; // convert to ascii
if ((c1 == 0xA00) || (c2 == '?')) {
c1 = 0xA00; c2 = '?'; // the punched value +0 should be represented by ascii ?
}
if ((c2 == '+') && (iCol == 1)) { // on IT control card, first char is a Y(12) punch to make control card a load card.
c1 = 0xA00; c2 = '?'; // Digit interpreted as +0
}
if (strchr(digits_ascii, c2) == NULL) { // scan digits ascii to check if this is a valid numeric digit with Y or X punch
c1 = 0; // nondigits chars interpreted as blank
}
if (c1 & 0x800) HiPunch = 1; // if column has Hi Punch Y(12) set, signal it
NegPunch = (c1 & 0x400) ? 1:0; // if column has minus X(11) set, signal it
c1 = c1 & 0x3FF; // remove X and Y punches
c2 = data->hol_to_ascii[c1]; // convert to ascii again
c2 = c2 - '0'; // convert ascii to binary digit
if ((c2 < 0) || (c2 > 9)) c2 = 0; // nondigits chars interpreted as zero
d = d * 10 + c2;
}
// end of word. set sign
if (NegPunch) { // has last digit a minus X(11) punch set?
d = -d; // yes, change sign of word read
if (d == 0) NegZero=1; // word read is minus zero
}
if (nDigits == 0) break; // no well-formed word read -> terminate card processing
if (addr >= 0) WriteDrum(addr++, d, NegZero); // store word read from card into drum
if (eor) break; // end of card sensed -> terminate card processing
}
return HiPunch;
}
// load soap symbolic info, This is a facility to help debugging of soap programs into SimH
// does not exist in real hw
void decode_soap_symb_info(struct _card_data * data, int addr)
{
t_int64 d;
int op,da,ia,i,i2,p;
char buf[81];
uint16 c1,c2;
// check soap 1-word load card initial word
d = DRUM[addr + 0];
if (d != 6919541953LL) return; // not a 1-word load card
// get the address where the 1-word card will be loaded (into da)
d = DRUM[addr+2];
op = Shift_Digits(&d, 2); // current inst opcode
da = Shift_Digits(&d, 4); // addr of data
ia = Shift_Digits(&d, 4); // addr of next instr
if ((op != 24) && (ia != 8000)) return; // not a 1-word load card
if (da >= (int)MEMSIZE) return; // destination address out of range
// convert card image punches to ascii buf for processing, starting at col 40
// keep 026 fortran charset
for (i=40;i<80;i++) {
c1 = data->image[i];
c2 = data->hol_to_ascii[c1];
c2 = (strchr(mem_to_ascii, toupper(c2))) ? c2:' ';
if (c2 == '~') c2 = ' ';
buf[i] = (char) c2;
}
buf[80] = 0; // terminate string
// copy soap symbolic info
i2 = 80;
while (1) { // calc i2 = last non space char to copy
if (--i2 < 41) return; // noting to copy
if (buf[i2] > 32) break;
}
p = da * 80;
for (i=0;i<80;i++)
DRUM_Symbolic_Buffer[p+i] = 0; // clear drum[da] symbolic info
if (i2-41 >= 80) i2 = 80-1 + 41; // only copy max 79 chars
for (i=41;i<=i2;i++) {
if ((i==47) || (i==50) || (i==55)) DRUM_Symbolic_Buffer[p++] = 32; // add space separation between op, da, ia fields
DRUM_Symbolic_Buffer[p++] = buf[i];
}
}
t_int64 decode_num_word(char * buf, int nDigits, int bSpaceIsZero)
{
@ -193,7 +210,8 @@ t_int64 decode_alpha_word(char * buf, int n)
return d;
}
void decode_soap_wiring(char * buf, int addr)
void decode_soap_wiring(struct _card_data * data, int addr)
{
// decode soap card simulating soap control panel wiring for 533
// from SOAP II manual at http://www.bitsavers.org/pdf/ibm/650/24-4000-0_SOAPII.pdf
@ -205,6 +223,7 @@ void decode_soap_wiring(char * buf, int addr)
// Sg = sign = blank or -
// Tg = Tag =
// storage in input block
// +-------------------+
// Word 1951: | <- Location -> | Alphabetic
// 1952: | <- Data Addr -> | Alphabetic
// 1953: | <- Inst Addr -> | Alphabetic
@ -218,8 +237,23 @@ void decode_soap_wiring(char * buf, int addr)
// 1958: | |N N N N| D Absolute Part
// 1959: | |N N N N| I Absolute Part
// 1960: | |T b n| T=Type (0 if Blank), b=0/8 (for non blank type), n=0/8 (for negative)
// +-------------------+
//
int ty,neg;
char buf[81];
int i;
uint16 c1,c2;
// convert card image punches to ascii buf for processing
// keep 026 fortran charset
for (i=0;i<80;i++) {
c1 = data->image[i];
c2 = data->hol_to_ascii[c1];
c2 = (strchr(mem_to_ascii, toupper(c2))) ? c2:' ';
if (c2 == '~') c2 = ' ';
buf[i] = (char) c2;
}
buf[80] = 0; // terminate string
DRUM[addr + 0] = decode_alpha_word(&buf[42], 5); // Location (5 chars)
DRUM[addr + 1] = decode_alpha_word(&buf[50], 5); // Data Addr (5 chars)
@ -234,11 +268,13 @@ void decode_soap_wiring(char * buf, int addr)
DRUM[addr + 7] = decode_num_word(&buf[51], 4, 0); // Absolute Part of Data Addr
DRUM[addr + 8] = decode_num_word(&buf[57], 4, 0); // Absolute Part of Instr Addr
if (buf[40] == '1') {ty = 18; } else
if (buf[40] == '2') {ty = 28; } else {ty = 0; }
ty = buf[40] - '0';
if ((ty < 0) || (ty > 9)) ty = 0;
neg = (buf[41] == '-') ? 8:0;
DRUM[addr + 9] = ty * 10 + neg; // |T b n| T=Type (0 if Blank), b=0/8 (for non blank type), n=0/8 (for negative)
DRUM[addr + 9] = ty * 100 +
(ty ? 80:0) +
neg; // |T b n| T=Type (0 if Blank), b=0/8 (for non blank type), n=0/8 (for negative)
}
int sformat(char * buf, const char * match)
@ -258,18 +294,20 @@ int sformat(char * buf, const char * match)
return 1; // end of match string -> return 1 -> buf matches
}
void decode_is_wiring(char * buf, int addr)
void decode_is_wiring(struct _card_data * data, int addr)
{
// decode Floationg Decimal Interpretive System (IS) card simulating control panel wiring for 533 as described
// in manual at http://www.bitsavers.org/pdf/ibm/650/28-4024_FltDecIntrpSys
// in manual at http://www.bitsavers.org/pdf/ibm/650/28-4024_FltDecIntrpSys.pdf
// input card
// Column: 1 2 3 4 | 5 6 | 7 8 9 | 10 | 11 | 12 - 21 | 22 | 23 - 32 | 33 | 34 - 43 | 44 | 45 - 54 | 55 | 56 - 65 | 66 | 67 - 76 | 77 78 79 | 80
// Card | | Location | wc | s1 | Word1 | s2 | Word2 | s3 | Word3 | s4 | Word4 | s5 | Word5 | s6 | Word6 | Problem |
// Num | Num
//
// wc = Word Count (space for 1)
// s1 = sign of word 1 (space for +)
// Tr = Tracing identification
// wc = Word Count (range 0 to 6, space for 1)
// s1 = sign of word 1 (-, + or <space> (same as +))
// Tr = Tracing identification
// Word = word in format NNNNNNNNNN
// N is 0..9, <space> (same as 0)
//
// Alternate input format to allow system deck loading
// Column: 1 2 | 3 | 4 5 6 | 7 | 8 9 10 11 | 12 | 13 - 24
@ -278,13 +316,13 @@ void decode_is_wiring(char * buf, int addr)
//
// Alternate input format to allow IT source program loading
// Column: 1 2 3 4 | 5 6 | 7 8 9 | 10 | 11 | 12 - 24
// Card | Blank | Location | | sg | N NNN NNN NNN <- This is an IT instruction (format O1 A B C)
// Card | Blank | Location | | sg | N NNN NNN NNN <- This is an IS instruction (format O1 A B C)
// Num |
// Column: 1 2 3 4 | 5 6 | 7 8 9 | 10 | 11 | 12 - 23
// Card | Blank | Location | | sg | N NNNNNNN NN <- This is an IT float numeric constant (mantissa and exponent)
// Card | Blank | Location | | sg | N NNNNNNN NN <- This is an IS float numeric constant (mantissa and exponent)
// Num |
// Column: 1 2 3 4 | 5 6 | 7 8 9 | 10 - 23
// Card | Blank | Location | blanks <- This is an IT transfer card (location is start of IT program)
// Card | Blank | Location | blanks <- This is an IS transfer card (location is start of IT program)
// Num |
//
// storage in input block
@ -301,18 +339,27 @@ void decode_is_wiring(char * buf, int addr)
// +-------------------+
// 1959: | Problem Number |
// +-------------------+
// input card
// WordN is 0..9,<space>
// sign is -,+,<space>
//
// put the decoded data in drum at addr (if addr < 0 -> do not store in drum)
// card number is ignored on reading
int wc,neg,i;
int NegZero;
t_int64 d;
char buf[81];
uint16 c1,c2;
// convert card image punches to ascii buf for processing
// keep 0..9,+,-,<space>, replace anything else by <space>
for (i=0;i<80;i++) {
c1 = data->image[i];
c2 = data->hol_to_ascii[c1];
buf[i] = (strchr("+-0123456789", c2)) ? ((char) (c2)):' ';
}
buf[80] = 0; // terminate string
if ( sformat(&buf[6], " ")) {
// blank card: read as all zero, one word count
// card with firsts 26 cols blank = blank card: read as all zero, one word count
// this allows to have blank cards/comments card as long as the comment starts on column 27 of more
DRUM[addr + 1] = 1 * D4; // word count
} else if ( sformat(&buf[5], " NNN ")) {
@ -379,6 +426,80 @@ void decode_is_wiring(char * buf, int addr)
}
}
void decode_it_wiring(struct _card_data * data, int addr)
{
// decode IT compiler card simulating control panel wiring for 533
// from IT manual at http://www.bitsavers.org/pdf/ibm/650/CarnegieInternalTranslator.pdf
// source program input card
// Column: 1 2 3 4 | 5 | 6 - 42 | 43 - 70 | 71 72 | 73 - 80 |
// N N N N | + | | Statement | | Comments |
// Statement | Y(12) | | max 28 | | max 8 |
// Number | Punch | | chars | | chars |
//
// storage in input block
// +-------------------+
// Word 0051: | <- Statement -> | Alphabetic
// 0052: | <- Statement -> | Alphabetic
// 0053: | <- Statement -> | Alphabetic
// 0054: | <- Statement -> | Alphabetic
// 0055: | <- Statement -> | Alphabetic
// 0056: | <- Statement -> | Alphabetic
// +-+-+-+-+-+-|-+-+-+-|
// 0057: | |N N N N| Statement Number
// +-+-+-+-+-+-|-+-+-+-|
// 0058: | | Not used
// 0059: | | Not used
// 0060: | | Not used
// +-------------------+
//
// type 1 data input card
// Column: 1 2 | 3 | 4 5 6 | 7 8 9 10 | 11 - 20 |
// VV | + | N N N | D D D D | Word
// | Y(12) |
// | Punch |
// VV = IT variable being loaded: 01 -> I type, 02 -> Y type, 03 -> C type
// N N N = variable number (I5 -> 01 + 005)
// D D D D = variable arbitrary non-zero identification number
// Word = word to be loaded into IT variable. If type I, is an integer. If type C or Y
// type is word is float (M MMMMMMM EE -> M=mantisa, EE=exponent)
// if word is negative, last digit get X(11) overpunch
// up to 4 pairs var-word per card
// last card signaed with a X(11) overpunch in col 10
// space is considered as zero
// type 2 data input card is a load card. No spaces are allowed
char buf[81];
int i;
uint16 c1,c2;
// convert card image punches to ascii buf for processing
// keep 026 fortran charset
for (i=0;i<80;i++) {
c1 = data->image[i];
c2 = data->hol_to_ascii[c1];
c2 = (strchr(mem_to_ascii, toupper(c2))) ? c2:' ';
if (c2 == '~') c2 = ' ';
buf[i] = (char) c2;
}
buf[80] = 0; // terminate string
if (buf[2] == '+') {
// type 1 data card
// re-read as 8 word per card
decode_8word_wiring(data, addr);
return;
}
DRUM[addr + 0] = decode_alpha_word(&buf[42], 5); // Statement (5 chars)
DRUM[addr + 1] = decode_alpha_word(&buf[47], 5); // Statement (5 chars)
DRUM[addr + 2] = decode_alpha_word(&buf[52], 5); // Statement (5 chars)
DRUM[addr + 3] = decode_alpha_word(&buf[57], 5); // Statement (5 chars)
DRUM[addr + 4] = decode_alpha_word(&buf[62], 5); // Statement (5 chars)
DRUM[addr + 5] = decode_alpha_word(&buf[67], 3); // Statement (3 chars)
DRUM[addr + 6] = decode_num_word(&buf[0], 4, 1); // Statement Number (space is read as digit zero)
}
/*
@ -386,11 +507,10 @@ void decode_is_wiring(char * buf, int addr)
*/
uint32 cdr_cmd(UNIT * uptr, uint16 cmd, uint16 addr)
{
int i,c;
struct _card_data *data;
char buf[81];
int buf_len;
uint32 wiring;
int i;
char cbuf[81];
/* Are we currently tranfering? */
if (uptr->u5 & URCSTA_BUSY)
@ -401,25 +521,25 @@ uint32 cdr_cmd(UNIT * uptr, uint16 cmd, uint16 addr)
/* Test ready */
if ((uptr->flags & UNIT_ATT) == 0) {
sim_debug(DEBUG_CMD, &cdr_dev, "No cards (no file attached)\r\n");
sim_debug(DEBUG_CMD, &cdr_dev, "No cards (no file attached)\n");
return SCPE_NOCARDS;
}
/* read the cards */
sim_debug(DEBUG_CMD, &cdr_dev, "READ\r\n");
sim_debug(DEBUG_CMD, &cdr_dev, "READ\n");
uptr->u5 |= URCSTA_BUSY;
switch(sim_read_card(uptr)) {
case SCPE_EOF:
sim_debug(DEBUG_DETAIL, &cdr_dev, "EOF\r\n");
sim_debug(DEBUG_DETAIL, &cdr_dev, "EOF\n");
uptr->u5 = 0;
return SCPE_NOCARDS;
case SCPE_UNATT:
sim_debug(DEBUG_DETAIL, &cdr_dev, "Not Attached\r\n");
sim_debug(DEBUG_DETAIL, &cdr_dev, "Not Attached\n");
uptr->u5 = 0;
return SCPE_NOCARDS;
case SCPE_IOERR:
sim_debug(DEBUG_DETAIL, &cdr_dev, "ERR\r\n");
sim_debug(DEBUG_DETAIL, &cdr_dev, "ERR\n");
uptr->u5 = 0;
return SCPE_NOCARDS;
case SCPE_OK:
@ -428,30 +548,35 @@ uint32 cdr_cmd(UNIT * uptr, uint16 cmd, uint16 addr)
data = (struct _card_data *)uptr->up7;
// make local copy of card
buf_len = data->ptr;
if (buf_len == 0) {
buf_len = data->len;
}
for (i=0;i<80;i++) {
if (i < buf_len) {
c = data->cbuff[i];
if (c < ' ') c = ' ';
buf[i] = c;
} else {
buf[i] = ' ';
}
}
buf[80] = 0; // terminate string
// make local copy of card for debug output
for (i=0; i<80; i++)
cbuf[i] = data->hol_to_ascii[data->image[i]];
cbuf[80] = 0; // terminate string
sim_debug(DEBUG_DETAIL, &cpu_dev, "Read Card: %s\n", sim_trim_endspc(cbuf));
// trim right spaces for printing read card
for (i=80;i>=0;i--) if (buf[i] > 32) break;
c = buf[i+1]; buf[i+1]=0;
sim_debug(DEBUG_DETAIL, &cpu_dev, "Read Card: %s\r\n", buf);
buf[i+1]=c;
// uint16 data->image[] array that holds the actual punched rows on card
// using this codification:
//
// Row Name value in image[] comments
//
// Y 0x800 Hi Punch Y(12)
// X 0x400 Minus Punch X(11)
// 0 0x200 also called T (Ten, 10)
// 1 0x100
// 2 0x080
// 3 0x040
// 4 0x020
// 5 0x010
// 6 0x008
// 7 0x004
// 8 0x002
// 9 0x001
//
// If several columns are punched, the values are ORed: eg char A is represented as a punch
// on row Y and row 1, so it value in image array will be 0x800 | 0x100 -> 0x900
// check if it is a load card (Y(12) = HiPunch set on any column of card) signales it
if (decode_8word_wiring(buf, -1)) {
if (decode_8word_wiring(data, -1)) {
uptr->u5 |= URCSTA_LOAD;
} else {
uptr->u5 &= ~URCSTA_LOAD;
@ -463,16 +588,23 @@ uint32 cdr_cmd(UNIT * uptr, uint16 cmd, uint16 addr)
// using the control panel wiring.
if (uptr->u5 & URCSTA_LOAD) {
// load card -> use 8 words per card encoding
decode_8word_wiring(buf, addr);
decode_8word_wiring(data, addr);
if (uptr->u5 & URCSTA_SOAPSYMB) {
// requested to load soap symb info
decode_soap_symb_info(data, addr);
}
} else if (wiring == WIRING_SOAP) {
// decode soap card simulating soap control panel wiring for 533 (gasp!)
decode_soap_wiring(buf, addr);
decode_soap_wiring(data, addr);
} else if (wiring == WIRING_IS) {
// decode it card
decode_is_wiring(buf, addr);
// decode floating point interpretive system (bell interpreter) card
decode_is_wiring(data, addr);
} else if (wiring == WIRING_IT) {
// decode Carnegie Internal Translator compiler card
decode_it_wiring(data, addr);
} else {
// default wiring: decode up to 8 numerical words per card. Can be a load card
decode_8word_wiring(buf, addr);
decode_8word_wiring(data, addr);
}
uptr->u5 &= ~URCSTA_BUSY;
@ -526,11 +658,18 @@ cdr_attach(UNIT * uptr, CONST char *file)
{
t_stat r;
if ((r = sim_card_attach(uptr, file)) != SCPE_OK)
return r;
if (uptr->flags & UNIT_ATT) // remove current deck in read hopper before attaching
sim_card_detach(uptr); // the new one
r = sim_card_attach(uptr, file);
if (SCPE_BARE_STATUS(r) != SCPE_OK)
return r;
uptr->u5 = 0;
uptr->u4 = 0;
uptr->u6 = 0;
if (sim_switches & SWMASK ('L')) { /* Load Symbolic SOAP info? */
uptr->u5 |= URCSTA_SOAPSYMB;
}
return SCPE_OK;
}

1187
I650/i650_cpu.c
View file

File diff suppressed because it is too large Load diff

25
I650/i650_defs.h
View file

@ -38,11 +38,12 @@
/* Memory */
#define MAXMEMSIZE (4000)
#define MEMSIZE cpu_unit.capac /* actual memory size */
#define MEMMASK (MEMSIZE - 1) /* Memory bits */
#define MEMMASK (MEMSIZE - 1) /* Memory bits */
#define MEM_ADDR_OK(x) (((uint32) (x)) < MEMSIZE)
extern t_int64 DRUM[MAXMEMSIZE];
extern int DRUM_NegativeZeroFlag[MAXMEMSIZE];
extern char DRUM_Symbolic_Buffer[MAXMEMSIZE * 80];
extern int WriteDrum(int AR, t_int64 d, int NegZero);
extern int ReadDrum(int AR, t_int64 * d, int * NegZero);
@ -96,9 +97,10 @@ extern uint32 cdp_cmd(UNIT *, uint16, uint16);
extern UNIT cdp_unit[];
/* Device status information stored in u5 */
#define URCSTA_ERR 0002 /* Error reading record */
#define URCSTA_BUSY 0010 /* Device is busy */
#define URCSTA_LOAD 01000 /* Load flag for 533 card reader */
#define URCSTA_ERR 0002 /* Error reading record */
#define URCSTA_BUSY 0010 /* Device is busy */
#define URCSTA_LOAD 01000 /* Load flag for 533 card reader */
#define URCSTA_SOAPSYMB 02000 /* Get soap symbolic info when reading the card */
/* Character codes in IBM 650 as stated in p4 Andree Programming the IBM 650 Mag Drum
@ -153,8 +155,12 @@ extern UNIT cdp_unit[];
#define CHR_8 98
#define CHR_9 99
extern char digits_ascii[40];
extern char mem_to_ascii[100];
extern struct card_wirings {
uint32 mode;
const char *name;
} wirings[];
extern char digits_ascii[31];
extern char mem_to_ascii[101];
extern int ascii_to_NN(int ch);
extern uint16 ascii_to_hol[128];
@ -169,7 +175,6 @@ extern int cycle_time;
#define IO_RDS 1 /* Read record */
#define IO_WRS 4 /* Write one record */
extern const char *cpu_description(DEVICE *dptr);
/* Opcodes */
@ -231,14 +236,10 @@ extern const char *cpu_description(DEVICE *dptr);
#define WIRING_8WORD ( 0x000 << UNIT_V_CARD_MODE)
#define WIRING_SOAP ( 0x100 << UNIT_V_CARD_MODE)
#define WIRING_IS ( 0x200 << UNIT_V_CARD_MODE)
#define WIRING_IT ( 0x300 << UNIT_V_CARD_MODE)
#define UNIT_CARD_ECHO ( 0x1000 << UNIT_V_CARD_MODE)
#define UNIT_CARD_PRINT ( 0x2000 << UNIT_V_CARD_MODE)
struct card_wirings {
uint32 mode;
const char *name;
};
/* Decimal helper functions */
extern int Get_HiDigit(t_int64 d);
extern int Shift_Digits(t_int64 * d, int nDigits);

407
I650/i650_sys.c
View file

@ -69,6 +69,16 @@ const char *sim_stop_messages[] = {
0
};
static t_stat ibm650_deck_cmd(int32 arg, CONST char *buf);
static CTAB aux_cmds [] = {
/* Name Action Routine Argument Help String */
/* ---------- ----------------- --------- ----------- */
{ "CARDDECK", &ibm650_deck_cmd, 0, "Card Deck Operations: Join/Split/Print\n" },
{ NULL }
};
/* Simulator debug controls */
DEBTAB dev_debug[] = {
{"CMD", DEBUG_CMD},
@ -86,8 +96,18 @@ DEBTAB crd_debug[] = {
{0, 0}
};
// simulator available IBM 533 wirings
struct card_wirings wirings[] = {
{WIRING_8WORD, "8WORD"},
{WIRING_SOAP, "SOAP"},
{WIRING_IS, "IS"},
{WIRING_IT, "IT"},
{0, 0},
};
// code of char in IBM 650 memory
char mem_to_ascii[100] = {
char mem_to_ascii[101] = {
/* 00 */ ' ', '~', '~', '~', '~', '~', '~', '~', '~', '~',
/* 10 */ '~', '~', '~', '~', '~', '~', '~', '~', '.', ')',
/* 20 */ '+', '~', '~', '~', '~', '~', '~', '~', '$', '*',
@ -97,16 +117,15 @@ char mem_to_ascii[100] = {
/* 60 */ '~', 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I',
/* 70 */ '~', 'J', 'K', 'L', 'M', 'N', 'O', 'P', 'Q', 'R',
/* 80 */ '~', '~', 'S', 'T', 'U', 'V', 'W', 'X', 'Y', 'Z',
/* 90 */ '0', '1', '2', '3', '4', '5', '6', '7', '8', '9'
};
/* 90 */ '0', '1', '2', '3', '4', '5', '6', '7', '8', '9',
0};
// representation of word digit 0-9 in card including Y(12) and X(11) punchs
char digits_ascii[40] = {
char digits_ascii[31] = {
'0', '1', '2', '3', '4', '5', '6', '7', '8', '9', /* 0-9 */
'?', 'A', 'B', 'C', 'D', 'E', 'F', 'G', 'H', 'I', /* 0-9 w/HiPunch Y(12) */
'!', 'J', 'K', 'L', 'M', 'N', 'O', 'P', 'Q', 'R', /* 0-9 w/Negative Punch X(11) */
'&', 'S', 'T', 'U', 'V', 'W', 'X', 'Y', 'Z', '#' /* 0-9 with botch Negative Punch X(11) and HiPunch Y(12)*/
};
0};
uint16 ascii_to_hol[128] = {
/* Control */
@ -153,6 +172,18 @@ uint16 ascii_to_hol[128] = {
};
/* Initialize vm */
void
vm_init(void) {
int i;
// Initialize vm memory to all plus zero
for(i = 0; i < MAXMEMSIZE; i++) DRUM[i] = DRUM_NegativeZeroFlag[i] = 0;
// init specific commands
sim_vm_cmd = aux_cmds; /* set up the auxiliary command table */
}
void (*sim_vm_init) (void) = &vm_init;
/* Load a card image file into memory. */
@ -513,6 +544,370 @@ int Shift_Digits(t_int64 * d, int nDigits)
if (neg) *d=-*d;
return n;
}
/* deck operations
carddeck [-q] <operation> <parameters...>
allowed operations are split, join, print
default format for card files is AUTO, this allow to intermix source decks
with different formats. To set the format for carddeck operations use
set cpr0 -format xxxx
this will apply to all operations, both on reading and writing deck files
carddeck split split the deck being punched in IBM 533 device in two separate destination decks
carddeck split <count> <dev|file0> <file1> <file2>
<dev> should be cdp1 to cdp3. File must be attached. The cards punched on
this file are the ones on source deck to split.
<file0> if instead of cdp1, cdp2 or cdp3, a file can be specified containing
the source deck to be splitted
<count> number of cards in each splitted deck.
If count >= 0, indicates the cards on first destination deck file
remaining cards go to the second destination deck
If count < 0, indicates the cards on second destination deck file
(so deck 2 contains lasts count cards from source)
<file1> first destination deck file
<file2> second destination deck file
when using <dev> as source both <file1> or <file2> can have same name as the currently
attached file to cdp device. On command execution, cdp gest its file detached.
file1 and file are created (overwritten if already exists).
when using <file0> as source both <file1> or <file2> can have same name as <file0>.
<file0> is completly read by SimH in its internal buffer (room for 10K cards)
and then splitted to <file1> and <file2>.
carddeck join join several deck files into a new one
carddeck join <file1> <file2> ... as <file>
<file1> first source deck file
<file2> second source deck file
...
<file> destination deck file
any source file <file1>, <file2>, etc can have same name as destination file <file>.
Each source file is completly read in turn by SimH in its internal buffer (room for 10K cards)
and then written on destination file. This allos to append une deck on the top/end of
another one.
carddeck print print deck on console, and on simulated IBM 407 is any file is attached to cpd0
carddeck print <file>
switches: if present mut be just after carddeck and before deck operation
-Q quiet return status.
*/
// max number of cards in deck for cadrdeck internal command
#define MAX_CARDS_IN_DECK 10000
// load card file fn and add its cards to
// DeckImage array, up to a max of nMaxCards
// increment nCards with the number of added cards
// uses cdr0 device/unit
t_stat deck_load(CONST char *fn, uint16 * DeckImage, int * nCards)
{
UNIT * uptr = &cdr_unit[0];
struct _card_data *data;
t_stat r;
int i, convert_to_ascii;
uint16 c;
if (*nCards < 0) {
*nCards = 0;
convert_to_ascii = 1;
} else {
convert_to_ascii = 0;
}
// set flags for read only
uptr->flags |= UNIT_RO;
// attach file to cdr unit 0
r = (cdr_dev.attach)(uptr, fn);
if (r != SCPE_OK) return r;
// read all cards from file
while (1) {
if (*nCards >= MAX_CARDS_IN_DECK) {
r = sim_messagef (SCPE_IERR, "Too many cards\n");
break;
}
r = sim_read_card(uptr);
if (r == SCPE_EOF) {
r = SCPE_OK; break; // normal termination on card file read finished
} else if (r != SCPE_OK) break; // abnormal termination on error
data = (struct _card_data *)uptr->up7;
// add card read to deck
for (i=0; i<80; i++) {
c = data->image[i];
if (convert_to_ascii) c = data->hol_to_ascii[c];
DeckImage[*nCards * 80 + i] = c;
}
*nCards = *nCards + 1;
}
// deattach file from cdr unit 0
r = (cdr_dev.detach)(uptr);
if (r != SCPE_OK) return r;
return SCPE_OK;
}
// write nCards starting at card from DeckImage array to file fn
// uses cdr0 device/unit
t_stat deck_save(CONST char *fn, uint16 * DeckImage, int card, int nCards)
{
UNIT * uptr = &cdr_unit[0];
struct _card_data *data;
t_stat r;
int i,nc;
// set flags for create new file
uptr->flags &= ~UNIT_RO;
sim_switches |= SWMASK ('N');
// attach file to cdr unit 0
r = (cdr_dev.attach)(uptr, fn);
if (r != SCPE_OK) return r;
// write cards to file
for (nc=0;nc<nCards;nc++) {
if (nc + card >= MAX_CARDS_IN_DECK) {
r = sim_messagef (SCPE_IERR, "Reading outside of Deck\n");
break;
}
data = (struct _card_data *)uptr->up7;
// read card from deck
for (i=0; i<80; i++) data->image[i] = DeckImage[(nc + card) * 80 + i];
r = sim_punch_card(uptr, NULL);
if (r != SCPE_OK) break; // abnormal termination on error
}
// deattach file from cdr unit 0
(cdr_dev.detach)(uptr);
return r;
}
// carddeck split <count> <dev|file0> <file1> <file2>
static t_stat deck_split_cmd(CONST char *cptr)
{
char fn0[4*CBUFSIZE];
char fn1[4*CBUFSIZE];
char fn2[4*CBUFSIZE];
char gbuf[4*CBUFSIZE];
DEVICE *dptr;
UNIT *uptr;
t_stat r;
uint16 DeckImage[80 * MAX_CARDS_IN_DECK];
int nCards, nCards1, tail;
while (sim_isspace (*cptr)) cptr++; // trim leading spc
if (*cptr == '-') {
tail = 1;
cptr++;
} else {
tail = 0;
}
cptr = get_glyph (cptr, gbuf, 0); // get cards count param
nCards1 = (int32) get_uint (gbuf, 10, 10000, &r);
if (r != SCPE_OK) return sim_messagef (SCPE_ARG, "Invalid count value\n");
cptr = get_glyph (cptr, gbuf, 0); // get dev|file0 param
if ((strlen(gbuf) != 4) || (strncmp(gbuf, "CDP", 3)) ||
(gbuf[3] < '1') || (gbuf[3] > '3') ) {
// is a file
strcpy(fn0, gbuf);
} else {
// is cpd1 cpd2 or cpd3 device
dptr = find_unit (gbuf, &uptr); /* locate unit */
if (dptr == NULL) /* found dev? */
return SCPE_NXDEV;
if (uptr == NULL) /* valid unit? */
return SCPE_NXUN;
if ((uptr->flags & UNIT_ATT) == 0) /* attached? */
return SCPE_NOTATT;
strcpy(fn0, uptr->filename);
sim_card_detach(uptr); // detach file from cdp device to be splitted
}
// read source deck
nCards = 0;
r = deck_load(fn0, DeckImage, &nCards);
if (r != SCPE_OK) return sim_messagef (r, "Cannot read source deck (%s)\n", fn0);
// calc nCards1 = cards in first deck
if (tail) {
// calc cards remaining when last nCardCount are removed from source deck
nCards1 = nCards - nCards1;
if (nCards1 < 0) nCards1 = 0;
}
if (nCards1 > nCards) nCards1 = nCards;
while (sim_isspace (*cptr)) cptr++; // trim leading spc
cptr = get_glyph_quoted (cptr, fn1, 0); // get next param: filename 1
if (fn1[0] == 0) return sim_messagef (SCPE_ARG, "Missing first filename\n");
while (sim_isspace (*cptr)) cptr++; // trim leading spc
cptr = get_glyph_quoted (cptr, fn2, 0); // get next param: filename 2
if (fn2[0] == 0) return sim_messagef (SCPE_ARG, "Missing second filename\n");
r = deck_save(fn1, DeckImage, 0, nCards1);
if (r != SCPE_OK) return sim_messagef (r, "Cannot write destination deck1 (%s)\n", fn0);
r = deck_save(fn2, DeckImage, nCards1, nCards-nCards1);
if (r != SCPE_OK) return sim_messagef (r, "Cannot write destination deck2 (%s)\n", fn0);
if ((sim_switches & SWMASK ('Q')) == 0) {
sim_messagef (SCPE_OK, "Deck splitted to %d/%d cards\n", nCards1, nCards-nCards1);
}
return SCPE_OK;
}
// carddeck join <file1> <file2> ... as <file>
static t_stat deck_join_cmd(CONST char *cptr)
{
char fnSrc[4*CBUFSIZE];
char fnDest[4*CBUFSIZE];
CONST char *cptr0;
CONST char *cptrAS;
char gbuf[4*CBUFSIZE];
t_stat r;
uint16 DeckImage[80 * MAX_CARDS_IN_DECK];
int i,nDeck, nCards, nCards1;
cptr0 = cptr;
// look for "as"
while (*cptr) {
while (sim_isspace (*cptr)) cptr++; // trim leading spc
cptrAS = cptr; // mark position of AS
cptr = get_glyph_quoted (cptr, gbuf, 0); // get next param
if (gbuf[0] == 0) return sim_messagef (SCPE_ARG, "AS <file> not found\n");
for (i=0;i<2;i++) gbuf[i] = sim_toupper(gbuf[i]);
if (strcmp(gbuf, "AS") == 0) break;
}
while (sim_isspace (*cptr)) cptr++; // trim leading spc
cptr = get_glyph_quoted (cptr, fnDest, 0); // get next param: destination filename
if (fnDest[0] == 0) return sim_messagef (SCPE_ARG, "Missing destination filename\n");
if (*cptr) return sim_messagef (SCPE_ARG, "Extra unknown parameters after destination filename\n");
cptr = cptr0; // restore cptr to scan source filenames
nDeck = nCards = 0;
while (1) {
while (sim_isspace (*cptr)) cptr++; // trim leading spc
if (cptrAS == cptr) break; // break if reach "AS"
cptr = get_glyph_quoted (cptr, fnSrc, 0); // get next param: source filename
if (fnSrc[0] == 0) return sim_messagef (SCPE_ARG, "Missing source filename\n");
// read source deck
nCards1 = nCards;
r = deck_load(fnSrc, DeckImage, &nCards);
if (r != SCPE_OK) return sim_messagef (r, "Cannot read source deck (%s)\n", fnSrc);
nDeck++;
if ((sim_switches & SWMASK ('Q')) == 0) {
sim_messagef (SCPE_OK, "Source Deck %d has %d cards (%s)\n", nDeck, nCards - nCards1, fnSrc);
}
}
r = deck_save(fnDest, DeckImage, 0, nCards);
if (r != SCPE_OK) return sim_messagef (r, "Cannot write destination deck (%s)\n", fnDest);
if ((sim_switches & SWMASK ('Q')) == 0) {
sim_messagef (SCPE_OK, "Destination Deck has %d cards (%s)\n", nCards, fnDest);
}
return SCPE_OK;
}
// carddeck print <file>
static t_stat deck_print_cmd(CONST char *cptr)
{
char fn[4*CBUFSIZE];
char line[81];
t_stat r;
uint16 DeckImage[80 * MAX_CARDS_IN_DECK];
int i,c,nc,nCards;
while (sim_isspace (*cptr)) cptr++; // trim leading spc
cptr = get_glyph_quoted (cptr, fn, 0); // get next param: source filename
if (fn[0] == 0) return sim_messagef (SCPE_ARG, "Missing filename\n");
if (*cptr) return sim_messagef (SCPE_ARG, "Extra unknown parameters after filename\n");
// read deck to be printed (-1 to convert to ascii value, not hol)
nCards = -1;
r = deck_load(fn, DeckImage, &nCards);
if (r != SCPE_OK) return sim_messagef (r, "Cannot read deck to print (%s)\n", fn);
for (nc=0; nc<nCards; nc++) {
// read card, check and, store in line
for (i=0;i<80;i++) {
c = DeckImage[nc * 80 + i];
c = toupper(c); // IBM 407 can only print uppercase
if ((c == '?') || (c == '!')) c = '0'; // remove Y(12) or X(11) punch on zero
if (strchr(mem_to_ascii, c) == 0) c = ' '; // space if not in IBM 650 character set
line[i] = c;
}
line[80]=0;
sim_trim_endspc(line);
// echo on console (add CR LF)
for (i=0;i<(int)strlen(line);i++) sim_putchar(line[i]);
sim_putchar(13);sim_putchar(10);
// printout will be directed to file attached to CDP0 unit, if any
if (cdp_unit[0].flags & UNIT_ATT) {
sim_fwrite(line, 1, strlen(line), cdp_unit[0].fileref); // fwrite clears line!
line[0] = 13; line[1] = 10; line[2] = 0;
sim_fwrite(line, 1, 2, cdp_unit[0].fileref);
}
}
if ((sim_switches & SWMASK ('Q')) == 0) {
sim_messagef (SCPE_OK, "Printed Deck with %d cards (%s)\n", nCards, fn);
}
return SCPE_OK;
}
static t_stat ibm650_deck_cmd(int32 arg, CONST char *buf)
{
char gbuf[4*CBUFSIZE];
const char *cptr;
cptr = get_glyph (buf, gbuf, 0); // get next param
if (strcmp(gbuf, "-Q") == 0) {
sim_switches |= SWMASK ('Q');
cptr = get_glyph (cptr, gbuf, 0);
}
if (strcmp(gbuf, "JOIN") == 0) {
return deck_join_cmd(cptr);
}
if (strcmp(gbuf, "SPLIT") == 0) {
return deck_split_cmd(cptr);
}
if (strcmp(gbuf, "PRINT") == 0) {
return deck_print_cmd(cptr);
}
return sim_messagef (SCPE_ARG, "Unknown deck command operation\n");
}

33
I650/sw/Build_is_from_decks.ini
View file

@ -10,21 +10,21 @@
; Tr build include trace deck (deck number 10)
; Set_LoopBox build include set loopbox instruction deck (deck number 21)
; Load SOAP deck into core (1 word per card format), but does not execute it
; Load soap deck into drum (1 word per card format), but does not execute it
set cpu 2k
att cdr1 -q soapII.dck
echo ***
echo *** load soap deck into drum
echo *** Load soap deck into drum
echo ***
d csw 7019519999
d ar 8000
go
; now put interpretive system loader source cards in reader and start SOAP assembler
; Now put interpretive system loader source cards in reader and start soap assembler
att cdr1 is_sys_load_src.txt
set cdr1 wiring=soap
@ -41,7 +41,7 @@ d ar 1000
go
echo ***
echo *** load interpretive system loader into core
echo *** Read interpretive system loader into drum
echo ***
det cdp1
@ -51,23 +51,16 @@ d csw 7019519999
d ar 8000
go
; create is deck with main system and optional user selected extra decks
; Prepare a deck with is main source deck and optional user selected extra decks
! copy is_main_src.txt deck_in.dck > nul
carddeck -q join is_main_src.txt as deck_in.dck
:add_extra_decks
if "%1" == "" goto run
set env deck="void"
if -i "%1" == "TR" set env deck="is_trace_src.txt"
if -i "%1" == "LBOX" set env deck="is_set_loopbox.txt"
if %deck == "void" goto next_extra
if -i "%1" == "TR" carddeck -q join deck_in.dck is_main_src.txt as deck_in.dck
if -i "%1" == "LBOX" carddeck -q join deck_in.dck is_set_loopbox.txt as deck_in.dck
! copy deck_in.dck a.dck > nul
! copy a.dck + %deck deck_in.dck > nul
! del a.dck > nul
:next_extra
shift
goto add_extra_decks
:run
@ -75,20 +68,20 @@ goto add_extra_decks
att cdr1 deck_in.dck
set cdr1 wiring=is
; execute the loader to create Interpretive system deck
; Execute the loader to read prepared is source deck
echo ***
echo *** run system loader
echo *** Run system loader to read prepared is source deck
echo ***
d ar 0880
go
; generate a 1-word load card deck with whole interpretive system, ready to run
; Generate a 1-word load card deck with interpretive system, ready to run
echo ***
echo *** run is system generation to create
echo interpretive system (is) 1-word per card load deck
echo *** Run system generation to punch
echo *** interpretive system main deck (1-word per card)
echo ***
att cdp1 -n -q is.dck

4
I650/sw/Build_soap_from_source.ini
View file

@ -9,9 +9,9 @@ set cpu 2k
set cdr1 wiring=soap
; prepare deck: SOAP (condensed deck as 7 word per card format) then SOAP source code to assemblre
; prepare deck: SOAP (condensed deck as 7 word per card format) then SOAP source code to assemble
! copy soapII_condensed_card.dck + soap_src.txt deck_in.dck > nul
carddeck -q join soapII_condensed_card.dck soap_src.txt as deck_in.dck
att cdr1 deck_in.dck
att cdp1 -n -q deck_out.dck

2
I650/sw/is.dck
View file

@ -1075,7 +1075,7 @@
6I1954195C000000107E241974800?690000800C000000000?000000000?000000000?000000000?
6I1954195C000000107F241975800?108001194I000000000?000000000?000000000?000000000?
6I1954195C000000107G241976800?300003101I000000000?000000000?000000000?000000000?
6I1954195C000000107H241977800?691954195U000000000?000000000?000000000?000000000?
6I1954195C000000107H241977800?691954195L000000000?000000000?000000000?000000000?
6I1954195C000000107I241978800?000000107H000000000?000000000?000000000?000000000?
6I1954195C000000108?241979800?241978800?000000000?000000000?000000000?000000000?
6I1954195C000000108A241980800?241978800?000000000?000000000?000000000?000000000?

14
I650/sw/is_example_1_src.txt
View file

@ -5,11 +5,11 @@
uses two extra o2 codes: o2=800 (set lbox) and o2=453 (tr zero)
warning: comments are allowed past column 28 but some characters
are forbidden: uppercase letters, question mark, exclamation, number char,
ampersand char. if these chars are used, the line (i.e. the card for this
line) will be interpreted as a load card, and program will crash on trying
to execute it.
are forbidden: uppercase letters, question mark, if these chars
are used, the line (i.e. the card for this line) will be interpreted
as a load card, and interpreter will crash on trying to execute it.
interpretive system syntax c-like equivalent sytax
100 -9 000 201 400 initp -move i1 prime initp: prime[c]=1
101 +0 001 050 100 loop c 050 initp c++; if c<50 goto initp
@ -30,7 +30,7 @@
111 +1 300 301 301 loop2 add num mult mult loop2: mult=mult+num
112 +2 301 203 000 sub mult i50 last
113 +0 201 103 114 tr sgn loop1 cont if mult >= 50 goto loop1 (go to b if +, go to c if -)
113 +0 201 103 114 tr sgn loop1 cont if mult >= 50 goto loop1 // tr to b if +, go to c if -
114 +0 800 003 301 set lbox c mult c=mult
115 -9 000 200 400 -move zero prime prime[c]=0
@ -40,14 +40,14 @@
120 +9 000 201 300 loope move i1 num loope: num=1
121 +0 800 002 202 set lbox b i2 b=2
122 +1 300 201 300 prt1 add num i1 num prt1: num++
122 +1 300 201 300 prt1 add num i1 num prt1: num++
123 -9 000 400 000 -move prime last last=prime[b]
124 +0 453 127 126 tr zero prt2 cont if last = 0 goto prt2
126 +0 410 300 300 pch num num punch num
127 +0 010 050 122 prt2 loop b 050 prt1 prt2: b++; if b<50 goto prt1
127 +0 010 050 122 prt2 loop b 050 prt1 prt2: b++; if b<50 goto prt1
128 +0 000 000 000 unc stop end

16
I650/sw/is_run.ini
View file

@ -6,14 +6,14 @@
; params: %1 source card deck to run with Floating Point Interpretive System (IS)
; %2 input card deck (if empty, do not attach input card
; %2 input card deck (if empty, do not attach input card)
; Load IS deck into (1 word per card format), but does not execute it
; Load is main deck into drum (1 word per card format), but does not execute it
set cpu 2k
echo ***
echo *** load is deck into drum
echo *** Load is main deck into drum
echo ***
att cdr1 -q is.dck
@ -22,12 +22,10 @@ d csw 7019519999
d ar 8000
go
; now put IS program cards in reader and load them
; Now put is program in reader and read it
! copy %1 deck_in.dck > nul
if "%2" == "" goto run
! copy %1 + %2 deck_in.dck > nul
:run
carddeck -q join %1 as deck_in.dck
if "%2" != "" carddeck -q join deck_in.dck %2 as deck_in.dck
att cdr1 deck_in.dck
set cdr1 wiring=is
@ -37,7 +35,7 @@ set cdp1 echo, print, wiring=is
att cdp0 -n -q print.txt
echo ***
echo *** load and run IS program
echo *** Read and run is program
echo ***
d csw 7019511333

1738
I650/sw/it_compiler.dck Normal file
View file

File diff suppressed because it is too large Load diff

1789
I650/sw/it_compiler_listing.txt Normal file
View file

File diff suppressed because it is too large Load diff

12
I650/sw/it_example_1_data.txt Normal file
View file

@ -0,0 +1,12 @@
02+ 1 11000000050
03+ 1 902100000005!
03+ 2 9022000000050
03+ 3 9033000000050
03+ 4 9044000000050
03+ 5 9055000000050
03+ 6 9066000000050
03+ 7 9077000000050
03+ 8 9088000000050
03+ 9 9099000000050
+3 10 210000000511100000051
01+ 5 80! 11

1
I650/sw/it_example_1_out.txt Normal file
View file

@ -0,0 +1 @@
3 ~ ~ ~d

8
I650/sw/it_example_1_src.txt Normal file
View file

@ -0,0 +1,8 @@
+0000000050000000002000000001100000000070000000000001725
0001+ read f rd dta
0002+ y2 z 0j f set p
0003+ 4k i1k i5k m1k 1k f i loop
0004+ y2 z ci1 s y1 x y2 f new p
0005+ t y2 t i5 f pch p
0007+ h ff stop

62
I650/sw/it_example_2_src.txt Normal file
View file

@ -0,0 +1,62 @@
+ 2 0 50 10 1672
1+ 2k i1k 1k 1k 50k f c1 to
2+ ci1 z 1j f c50=1
+ i1 z 1 f n=1
3+ i1 z i1 s 1 f n=n+1
+ g 5 if i1 w 50 f gt 50
+ g 3 if ci1 u 0j f c(n)=0
+ i2 z i1 f m=n
4+ i2 z i2 s i1 f m=m+n
+ g 3 if i2 w 50 f gt 50
+ ci2 z 0j f c(m)=0
+ g 4 f goto 4
5+ i1 z 1 f n=1
6+ i1 z i1 s 1 f n=n+1
+ g 10 if i1 w 50 f gt 50
+ g 8 if ci1 u 0j f c(n)=0
7+ t i1 f pch n
8+ g 6 f goto 6
10+ h ff stop
prime number generator using the sieve of eratosthenes
converted to ibm 650 IT compliler
IT system syntax IT notation in manual c-like equivalent syntax
1+ 2k i1k 1k 1k 50k 1: 2,i1,1,1,50, for(num=1,num<=50;num++)
2+ ci1 z 1j 2: ci1 <- 1. prime(num) = 1.0
+ i1 z 1 i1 <- 1 num=1
3+ i1 z i1 s 1 3: i1 <- i1 + 1 loop1: num++
+ g 5 if i1 w 50 g 5 if i1 >= 50 if num >= 50 goto loope
+ g 3 if ci1 u 0j g 3 if ci1 = 0. if prime(num)=0 goto loop1
+ i2 z i1 i2 <- i1 mult=num
4+ i2 z i2 s i1 4: i2 <- i2 + i1 loop2: mult=mult+num
+ g 3 if i2 w 50 g 3 if i2 >= 50 if mult >= 50 goto loop1
+ ci2 z 0j ci2 <- 0. prime(mult) = 0.0
+ g 4 g 4 goto loop2
5+ i1 z 1 5: i1 <- 1 loope: num = 1
6+ i1 z i1 s 1 i1 <- i1 + 1 prt1: num++
+ g 10 if i1 w 50 g 10 if i1 >= 50 if num >= 50 goto prt3
+ g 8 if ci1 u 0j g 8 if ci1 = 0. if prime(num)=0 goto prt2
7+ t i1 t i1 punch num
8+ g 6 g 6 prt2: goto prt1
10+ h h prt3: end
control card is calculated as follows
number of i integer variables: 2 (i1 and i2)
number of y float variables: 0
number of c float variables: 50 (ci1 ranges from c1 to c50)
higher statement number: 10
using run time package p1 (265 words)
mem avail N = 1999 - (2 + 0 + 50 + 10 + 265) = 1672

254
I650/sw/it_package_p1.dck Normal file
View file

@ -0,0 +1,254 @@
6I1954195C 0000241833800?2417861789 e00aistdarthxai1 1-add
6I1954195C 0000241789800?2017941799 ai1 stlarthg 2-
6I1954195C 0000241799800?6918021805 ldd arthb 3-
6I1954195C 0000241802800?6780021767 ram 8002 4-store acc
6I1954195C 0000241767800?2017721894 stlarthf 5-power
6I1954195C 0000241894800?1819021759 smlarthe 6-
6I1954195C 0000241759800?3500011766 slt 0001 7-
6I1954195C 0000241766800?4417731771 nzuai12 8-find max
6I1954195C 0000241771800?6917741777 lddai3a 9-
6I1954195C 0000241777800?3000051790 srt 0005 10-power
6I1954195C 0000241790800?2217931796 sdaai3 11-set expnnts
6I1954195C 0000241796800?4618991754 bmi ai2 12-and then
6I1954195C 0000241899800?6719021817 ramarthe 13-perform
6I1954195C 0000241817800?2017721776 stlarthf 14-addition
6I1954195C 0000241776800?6517881943 ralarthh 15-
6I1954195C 0000241943800?6918241793 lddarthmai3 16-
6I1954195C 0000241793800?3000001811 ai3 srt 0000ai3b 17-
6I1954195C 0000241774800?3000001811 ai3a srt 0000ai3b 18-
6I1954195C 0000241811800?1580011770 ai3b alo 8001ai5 19-
6I1954195C 0000241754800?6518241779 ai2 ralarthm 20-
6I1954195C 0000241779800?6917881793 lddarthhai3 21-
6I1954195C 0000241770800?6080021780 ai5 rau 8002 22-clear arthe
6I1954195C 0000241780800?2019021762 stlarthearths 23-to scale
6I1954195C 0000241773800?4617781828 ai12 bmi ai13 24-
6I1954195C 0000241778800?6517941904 ralarthgai10 25-
6I1954195C 0000241828800?6500001786 ai13 ralacc arthx 26-
6I1954195C 0000241805800?2418081826 arthbstdarthy 27-break up exp
6I1954195C 0000241826800?3500081996 slt 0008 28-and mantissa
6I1954195C 0000241996800?2019021755 stlarthe 29-store power
6I1954195C 0000241755800?6080031763 rau 8003 30-and mantissa
6I1954195C 0000241763800?3500011769 slt 0001 31-of lower
6I1954195C 0000241769800?2118241997 stuarthm 32-
6I1954195C 0000241997800?6000001855 rauacc 33-
6I1954195C 0000241855800?3000021761 srt 0002 34-store power
6I1954195C 0000241761800?1680021819 slo 8002 35-and mantissa
6I1954195C 0000241819800?3500011775 slt 0001 36-of acc
6I1954195C 0000241775800?1580011783 alo 8001 37-
6I1954195C 0000241783800?2117881808 stuarthharthy 38-
6I1954195C 0000241762800?3600001782 arthssct 0000 39-normalize
6I1954195C 0000241782800?4719421787 bovai6 40-brnch if zro
6I1954195C 0000241787800?2017941797 stlarthg 41-shift count
6I1954195C 0000241797800?6580031905 ral 8003 42-round on
6I1954195C 0000241905800?3100021813 srd 0002 43-ninth digit
6I1954195C 0000241813800?3500021869 slt 0002 44-check for
6I1954195C 0000241869800?2018241877 stlarthm 45-roundoff
6I1954195C 0000241877800?4418311834 nzuai7 ai8 46-overflow
6I1954195C 0000241834800?6780031841 ai8 ram 8003 47-and
6I1954195C 0000241841800?1817941800 smlarthg 48-correct if
6I1954195C 0000241800800?1519031822 aloaj2 49-necessary
6I1954195C 0000241822800?3500081791 slt 0008 50-
6I1954195C 0000241791800?6580021849 ral 8002 51-
6I1954195C 0000241849800?1719021757 amlarthe 52-
6I1954195C 0000241757800?1517721827 aloarthf 53-
6I1954195C 0000241827800?4617521781 bmiai11a 54-pwr too smal
6I1954195C 0000241781800?4417851836 nzuai11 55-pwr too lrge
6I1954195C 0000241836800?3500021893 slt 0002 56-
6I1954195C 0000241893800?2119981901 stuacc1 57-
6I1954195C 0000241901800?6518241829 ralarthm 58-
6I1954195C 0000241829800?4619441995 bmi ai9 59-combine
6I1954195C 0000241944800?1619981904 sloacc1 ai10 60-
6I1954195C 0000241904800?2000001786 ai10 stlacc arthx 61-and
6I1954195C 0000241995800?1519981904 ai9 aloacc1 ai10 62-
6I1954195C 0000241831800?3000011792 ai7 srt 0001 63-adjust
6I1954195C 0000241792800?2018241927 stlarthm 64-
6I1954195C 0000241927800?3500011834 slt 0001ai8 65-
6I1954195C 0000241942800?6580031904 ai6 ral 8003ai10 66-
6I1954195C 0000241832800?2417861839 e00ajstdarthx 67-multiply
6I1954195C 0000241839800?6918521805 ldd arthb 68-
6I1954195C 0000241852800?6780021867 ram 8002 69-acc power
6I1954195C 0000241867800?1618201825 sloaj1 70-minus 48
6I1954195C 0000241825800?2017721875 stlarthf 71-
6I1954195C 0000241875800?6017881756 rauarthh 72-
6I1954195C 0000241756800?1918241762 mpyarthmarths 73-
6I1954195C 0000241830800?2417861889 e00agstdarthxag1 74-divide
6I1954195C 0000241889800?6918421805 ag1 ldd arthb 75-is divisor
6I1954195C 0000241842800?4418121846 nzu ag3 76-zer0
6I1954195C 0000241812800?6880021821 rsm 8002 77-divisor
6I1954195C 0000241821800?1518761895 aloag2 78-power minus
6I1954195C 0000241895800?2017721768 stlarthf 79-49
6I1954195C 0000241768800?6018241879 rauarthm 80-sh1ft
6I1954195C 0000241879800?3000011885 srt 0001 81-dividend
6I1954195C 0000241885800?6417881803 dvrarthh 82-do divide
6I1954195C 0000241803800?6080021762 rau 8002arths 83-
6I1954195C 0000241882800?2417861989 e00aostdarthx 84-div reverse
6I1954195C 0000241989800?2018431896 stlacc2 85-
6I1954195C 0000241896800?6500001810 ralacc 86-
6I1954195C 0000241810800?6918431897 lddacc2 87-
6I1954195C 0000241897800?2400001889 stdacc ag1 88-
6I1954195C 0000241947800?2418581911 e00afstdacc6 89-fl0at to lwr
6I1954195C 0000241911800?6919251928 lddae4 e00ae 90-and acc
6I1954195C 0000241925800?2000001858 ae4 stlacc acc6 91-
6I1954195C 0000241928800?2417861840 e00aestdarthx 92-float to lwr
6I1954195C 0000241840800?6080021753 rau 8002 93-only
6I1954195C 0000241753800?3600001975 sct 0000 94-normalize
6I1954195C 0000241975800?2018811784 stlacc3 95-
6I1954195C 0000241784800?4718511890 bovad1 96-zer0 check
6I1954195C 0000241890800?6580031798 ral 8003 97-
6I1954195C 0000241798800?3100021807 srd 0002 98-round for
6I1954195C 0000241807800?3500021764 slt 0002 99-placing exp
6I1954195C 0000241764800?4418181891 nzu ae6 100-check round
6I1954195C 0000241818800?6980031874 ldd 8003 101-overflow
6I1954195C 0000241874800?3000011884 srt 0001 102-
6I1954195C 0000241884800?1580011891 alo 8001ae6 103-
6I1954195C 0000241891800?4618441845 ae6 bmiae2 104-insert
6I1954195C 0000241845800?1518481804 aloaj3 ae5 105-exp0nent
6I1954195C 0000241844800?1618481804 ae2 sloaj3 ae5 106-
6I1954195C 0000241804800?1618811786 ae5 sloacc3 arthx 107-
6I1954195C 0000241932800?2417861990 e00thstdarthx 108-fix l0wer
6I1954195C 0000241990800?3500081859 slt 0008 109-to lower
6I1954195C 0000241859800?2118241878 stuarthm 110-
6I1954195C 0000241878800?6780021887 ram 8002 111-test exp
6I1954195C 0000241887800?1619401945 sloaj5 112-store zer0
6I1954195C 0000241945800?4618511850 bmiad1 113-if less than
6I1954195C 0000241850800?1618531758 sloaj4 114-50 alarm
6I1954195C 0000241758800?4618611862 bmi ad3 115-1f grtr than
6I1954195C 0000241861800?3000041921 srt 0004 116-59
6I1954195C 0000241921800?1519241929 aloar7 117-
6I1954195C 0000241929800?6918351838 lddad2a 118-modify
6I1954195C 0000241838800?2219911971 sdaad2 119-shift
6I1954195C 0000241971800?6518241930 ralarthm 120-
6I1954195C 0000241930800?3500021991 slt 0002ad2 121-
6I1954195C 0000241851800?6580031786 ad1 ral 8003arthx 122-store zero
6I1954195C 0000241991800?3000001786 ad2 srt 0000arthx 123-shift c0nst
6I1954195C 0000241835800?3000001786 ad2a srt 0000arthx 124-
6I1954195C 0000241862800?6917863031 ad3 lddarthx 3031 125-fix alarm
6I1954195C 0000241846800?6917863061 ag3 lddarthx 3061 126-divide alarm
6I1954195C 0000241785800?6917863081 ai11 lddarthx 3081 127-scale alarm
6I1954195C 0000241752800?0110811942 ai11ahlt 1081ai6 128-
6I1954195C 0000241876800?4900000000 ag2 49 0000 0000 129-
6I1954195C 0000241820800?4800000000 aj1 48 0000 0000 130-
6I1954195C 0000241903800?0000000001 aj2 00 0000 0001 131-
6I1954195C 0000241848800?0000000059 aj3 00 0000 0059 132-
6I1954195C 0000241853800?1000000000 aj4 10 0000 0000 133-
6I1954195C 0000241940800?5000000000 aj5 50 0000 0000 134-
6I1954195C 0000241974800?2419771880 e00aqstdj0001aq1 135-read
6I1954195C 0000241880800?7019761898 aq1 rd1 1976aq3 136-
6I1954195C 0000241898800?6719511806 aq3 ramp0001aq3a 137-
6I1954195C 0000241892800?6719511806 aq3b ramp0001aq3a 138-check for
6I1954195C 0000241806800?4518601837 aq3a nze aq8 139-last word
6I1954195C 0000241860800?6918631816 lddaq5 aq4 140-on card
6I1954195C 0000241816800?2418701873 aq4 stdacc4 141-
6I1954195C 0000241873800?1080031931 aup 8003 142-read in
6I1954195C 0000241931800?3000041941 srt 0004 143-label for
6I1954195C 0000241941800?2317951948 siaacc5 144-present
6I1954195C 0000241948800?1680011856 slo 8001 145-variable
6I1954195C 0000241856800?1518098002 alo 8002 146-get i y 0r c
6I1954195C 0000241809800?6000001987 rau 0000 147-address from
6I1954195C 0000241987800?1017951949 aupacc5 146-abcon dict
6I1954195C 0000241949800?3500041870 slt 0004acc4 149-generate
6I1954195C 0000241863800?1018661857 aq5 aupaq7 150-1nstruction
6I1954195C 0000241857800?1519601965 alop0010 151-
6I1954195C 0000241965800?1519688002 alo 8002 152-get and
6I1954195C 0000241968800?6919528003 lddp0002 8003 153-store word
6I1954195C 0000241866800?2400001907 aq7 std 0000 154-
6I1954195C 0000241907800?6519601915 ralp0010 155-increment
6I1954195C 0000241915800?1519181854 aloaq9 156-word count
6I1954195C 0000241854800?2019601963 stlp0010 157-
6I1954195C 0000241963800?1518928002 aloaq3b 8002 158-
6I1954195C 0000241837800?6519511765 aq8 ralp0001 159-check for
6I1954195C 0000241765800?4619771880 bmij0001aq1 160-last card
6I1954195C 0000241801800?2419551908 e00arstdp0005 161-punch 0ut
6I1954195C 0000241908800?2119791935 stuj0003 162-
6I1954195C 0000241935800?2319581912 siap0008 163-store stmnt
6I1954195C 0000241912800?2119801886 stuj0004 164-number
6I1954195C 0000241886800?2219541909 sdap0004 165-store word
6I1954195C 0000241909800?1680011917 slo 8001 166-count
6I1954195C 0000241917800?4519201872 nzear10 ar9 167-test zero
6I1954195C 0000241920800?2119811814 ar10 stuj0005 168-stmt number
6I1954195C 0000241814800?2419821972 stdj0006 169-set punch
6I1954195C 0000241972800?2419831864 stdj0007 170-band to
6I1954195C 0000241864800?2419841888 stdj0008 171-zeroes
6I1954195C 0000241888800?2419601913 stdp0010ar3 172-set counter
6I1954195C 0000241913800?6519541910 ar3 ralp0004 173-
6I1954195C 0000241910800?1619241936 sloar7 174-
6I1954195C 0000241936800?4619941992 bmiar8 175-test word
6I1954195C 0000241992800?2019541865 stlp0004ar4 176-count
6I1954195C 0000241865800?1518688002 ar4 alo 8002 177-get word
6I1954195C 0000241868800?6519501914 ralp0000 178-label from
6I1954195C 0000241914800?1080031922 aup 8003 179-punch consts
6I1954195C 0000241922800?3500011938 slt 0001 180-
6I1954195C 0000241938800?2219571961 sdap0007 181-modify label
6I1954195C 0000241961800?1680011919 slo 8001 182-
6I1954195C 0000241919800?3000011926 srt 0001 183-
6I1954195C 0000241926800?1519571962 alop0007 184-
6I1954195C 0000241962800?3500041923 slt 0004 185-insert stmnt
6I1954195C 0000241923800?1519581964 alop0008 186-number
6I1954195C 0000241964800?1019601916 aupp0010 187-
6I1954195C 0000241916800?1019698003 aup 8003 188-
6I1954195C 0000241969800?2019771988 stlj0001 189-store label
6I1954195C 0000241988800?6580021900 ral 8002 190-for punching
6I1954195C 0000241900800?6919061816 ldd aq4 191-modify label
6I1954195C 0000241906800?1019661934 aupar6 192-into drum
6I1954195C 0000241934800?1519601967 alop0010 193-loc in read
6I1954195C 0000241967800?1519708003 alo 8003 194-get word
6I1954195C 0000241970800?2419781993 stdj0002 195-store in
6I1954195C 0000241993800?6519601815 ralp0010 196-punch band
6I1954195C 0000241815800?1519181973 aloaq9 197-
6I1954195C 0000241973800?2019601913 stlp0010ar3 196-
6I1954195C 0000241966800?6900008002 ar6 ldd 0000 8002 199-
6I1954195C 0000241924800?0000010000 ar7 00 0001 0000 200-
6I1954195C 0000241994800?7119771955 ar8 pchj0001p0005 201-punch
6I1954195C 0000241872800?6580001937 ar9 ral 8000 202-if stmt nmbr
6I1954195C 0000241937800?4619201955 bmiar10 p0005 203-zro pch only
6I1954195C 0000241918800?0000020000 aq9 00 0002 0000 204-if 8000 neg
6I1954195C 0000241986800?8000008800 j0010 80 0000 8800 205-control cnst
6I1954195C 0000241976800?6719511744 1976ram 1951 206-read
6I1954195C 0000241744800?1080031741 aup 8003 207-up to
6I1954195C 0000241741800?3500041748 slt 0004 208-seven
6I1954195C 0000241748800?2219591737 sdap0009 209-contiguous
6I1954195C 0000241737800?3000041746 srt 0004 210-variables
6I1954195C 0000241746800?6917501816 ldd aq4 211-per card
6I1954195C 0000241750800?6580031749 ral 8003 212-
6I1954195C 0000241749800?1019591740 aupp0009 213-
6I1954195C 0000241740800?1580011751 alo 8001 214-
6I1954195C 0000241751800?1017381742 aupaq9b 215-
6I1954195C 0000241742800?1517451735 aloaq10 aq11 216-
6I1954195C 0000241735800?1117381743 aq11 supaq9b 217-
6I1954195C 0000241743800?4417471837 nzu aq8 218-
6I1954195C 0000241747800?1080011736 aup 8001 219-
6I1954195C 0000241736800?1119241739 supar7 220-
6I1954195C 0000241739800?1680018003 slo 8001 8003 221-
6I1954195C 0000241738800?6919528002 aq9b ldd 1952 8002 222-
6I1954195C 0000241745800?2400001735 aq10 std 0000aq11 223-
6I1954195C 0000241786800?0000000000 arthx 00 0000 0000 -
6I1954195C 0000241794800?0000000000 arthg 00 0000 0000 -
6I1954195C 0000241772800?0000000000 arthf 00 0000 0000 -
6I1954195C 0000241902800?0000000000 arthe 00 0000 0000 -
6I1954195C 0000241788800?0000000000 arthh 00 0000 0000 -
6I1954195C 0000241824800?0000000000 arthm 00 0000 0000 -
6I1954195C 0000241808800?0000000000 arthy 00 0000 0000 -
6I1954195C 0000240000800?0000000000 acc 00 0000 0000 -
6I1954195C 0000241998800?0000000000 acc1 00 0000 0000 -
6I1954195C 0000241843800?0000000000 acc2 00 0000 0000 -
6I1954195C 0000241881800?0000000000 acc3 00 0000 0000 -
6I1954195C 0000241870800?0000000000 acc4 00 0000 0000 -
6I1954195C 0000241795800?0000000000 acc5 00 0000 0000 -
6I1954195C 0000241858800?0000000000 acc6 00 0000 0000 -
6I1954195C 0000241977800?0000000000 j0001 00 0000 0000 -
6I1954195C 0000241978800?0000000000 j0002 00 0000 0000 -
6I1954195C 0000241979800?0000000000 j0003 00 0000 0000 -
6I1954195C 0000241980800?0000000000 j0004 00 0000 0000 -
6I1954195C 0000241981800?0000000000 j0005 00 0000 0000 -
6I1954195C 0000241982800?0000000000 j0006 00 0000 0000 -
6I1954195C 0000241983800?0000000000 j0007 00 0000 0000 -
6I1954195C 0000241984800?0000000000 j0008 00 0000 0000 -
6I1954195C 0000241950800?0000000000 p0000 00 0000 0000 -
6I1954195C 0000241951800?0000000000 p0001 00 0000 0000 -
6I1954195C 0000241952800?0000000000 p0002 00 0000 0000 -
6I1954195C 0000241954800?0000000000 p0004 00 0000 0000 -
6I1954195C 0000241955800?0000000000 p0005 00 0000 0000 -
6I1954195C 0000241957800?0000000000 p0007 00 0000 0000 -
6I1954195C 0000241958800?0000000000 p0008 00 0000 0000 -
6I1954195C 0000241959800?0000000000 p0009 00 0000 0000 -
6I1954195C 0000241960800?0000000000 p0010 00 0000 0000 -

267
I650/sw/it_package_p1_listing.txt Normal file
View file

@ -0,0 +1,267 @@
5 PACKAGE 1
5 CONTAINS FOLLOWING
5 ROUTINES
5 E00AI ADDITION
5 E00AJ MULTIPLICATION
5 E00AG DIVISION
5 E00AO DIVIDE REVERSE
5 E00AF FLOAT TO LOWER AND ACC
5 E00AE FLOAT TO LOWER
5 E00AQ READ
5 E00AR PUNCH
5 E00TH FIX TO LOWER
1 E00AI STD ARTHX AI1 ADD 1833 24 1786 1789
2 AI1 STL ARTHG 1789 20 1794 1799
3 LDD ARTHB 1799 69 1802 1805
4 RAM 8002 STORE ACC 1802 67 8002 1767
5 STL ARTHF POWER 1767 20 1772 1894
6 SML ARTHE 1894 18 1902 1759
7 SLT 0001 1759 35 0001 1766
8 NZU AI12 FIND MAX 1766 44 1773 1771
9 LDD AI3A 1771 69 1774 1777
10 SRT 0005 POWER 1777 30 0005 1790
11 SDA AI3 SET EXPNNTS 1790 22 1793 1796
12 BMI AI2 AND THEN 1796 46 1899 1754
13 RAM ARTHE PERFORM 1899 67 1902 1817
14 STL ARTHF ADDITION 1817 20 1772 1776
15 RAL ARTHH 1776 65 1788 1943
16 LDD ARTHM AI3 1943 69 1824 1793
17 AI3 SRT 0000 AI3B 1793 30 0000 1811
18 AI3A SRT 0000 AI3B 1774 30 0000 1811
19 AI3B ALO 8001 AI5 1811 15 8001 1770
20 AI2 RAL ARTHM 1754 65 1824 1779
21 LDD ARTHH AI3 1779 69 1788 1793
22 AI5 RAU 8002 CLEAR ARTHE 1770 60 8002 1780
23 STL ARTHE ARTHS TO SCALE 1780 20 1902 1762
24 AI12 BMI AI13 1773 46 1778 1828
25 RAL ARTHG AI10 1778 65 1794 1904
26 AI13 RAL ACC ARTHX 1828 65 0000 1786
27 ARTHB STD ARTHY BREAK UP EXP 1805 24 1808 1826
28 SLT 0008 AND MANTISSA 1826 35 0008 1996
29 STL ARTHE STORE POWER 1996 20 1902 1755
30 RAU 8003 AND MANTISSA 1755 60 8003 1763
31 SLT 0001 OF LOWER 1763 35 0001 1769
32 STU ARTHM 1769 21 1824 1997
33 RAU ACC 1997 60 0000 1855
34 SRT 0002 STORE POWER 1855 30 0002 1761
35 SLO 8002 AND MANTISSA 1761 16 8002 1819
36 SLT 0001 OF ACC 1819 35 0001 1775
37 ALO 8001 1775 15 8001 1783
38 STU ARTHH ARTHY 1783 21 1788 1808
39 ARTHS SCT 0000 NORMALIZE 1762 36 0000 1782
40 BOV AI6 BRNCH IF ZRO 1782 47 1942 1787
41 STL ARTHG SHIFT COUNT 1787 20 1794 1797
42 RAL 8003 ROUND ON 1797 65 8003 1905
43 SRD 0002 NINTH DIGIT 1905 31 0002 1813
44 SLT 0002 CHECK FOR 1813 35 0002 1869
45 STL ARTHM ROUNDOFF 1869 20 1824 1877
46 NZU AI7 AI8 OVERFLOW 1877 44 1831 1834
47 AI8 RAM 8003 AND 1834 67 8003 1841
48 SML ARTHG CORRECT IF 1841 18 1794 1800
49 ALO AJ2 NECESSARY 1800 15 1903 1822
50 SLT 0008 1822 35 0008 1791
51 RAL 8002 1791 65 8002 1849
52 AML ARTHE 1849 17 1902 1757
53 ALO ARTHF 1757 15 1772 1827
54 BMI AI11A PWR TOO SMAL 1827 46 1752 1781
55 NZU AI11 PWR TOO LRGE 1781 44 1785 1836
56 SLT 0002 1836 35 0002 1893
57 STU ACC1 1893 21 1998 1901
58 RAL ARTHM 1901 65 1824 1829
59 BMI AI9 COMBINE 1829 46 1944 1995
60 SLO ACC1 AI10 1944 16 1998 1904
61 AI10 STL ACC ARTHX AND 1904 20 0000 1786
62 AI9 ALO ACC1 AI10 1995 15 1998 1904
63 AI7 SRT 0001 ADJUST 1831 30 0001 1792
64 STL ARTHM 1792 20 1824 1927
65 SLT 0001 AI8 1927 35 0001 1834
66 AI6 RAL 8003 AI10 1942 65 8003 1904
67 E00AJ STD ARTHX MULTIPLY 1832 24 1786 1839
68 LDD ARTHB 1839 69 1852 1805
69 RAM 8002 ACC POWER 1852 67 8002 1867
70 SLO AJ1 MINUS 48 1867 16 1820 1825
71 STL ARTHF 1825 20 1772 1875
72 RAU ARTHH 1875 60 1788 1756
73 MPY ARTHM ARTHS 1756 19 1824 1762
74 E00AG STD ARTHX AG1 DIVIDE 1830 24 1786 1889
75 AG1 LDD ARTHB IS DIVISOR 1889 69 1842 1805
76 NZU AG3 ZER0 1842 44 1812 1846
77 RSM 8002 DIVISOR 1812 68 8002 1821
78 ALO AG2 POWER MINUS 1821 15 1876 1895
79 STL ARTHF 49 1895 20 1772 1768
80 RAU ARTHM SH1FT 1768 60 1824 1879
81 SRT 0001 DIVIDEND 1879 30 0001 1885
82 DVR ARTHH DO DIVIDE 1885 64 1788 1803
83 RAU 8002 ARTHS 1803 60 8002 1762
84 E00AO STD ARTHX DIV REVERSE 1882 24 1786 1989
85 STL ACC2 1989 20 1843 1896
86 RAL ACC 1896 65 0000 1810
87 LDD ACC2 1810 69 1843 1897
88 STD ACC AG1 1897 24 0000 1889
89 E00AF STD ACC6 FL0AT TO LWR 1947 24 1858 1911
90 LDD AE4 E00AE AND ACC 1911 69 1925 1928
91 AE4 STL ACC ACC6 1925 20 0000 1858
92 E00AE STD ARTHX FLOAT TO LWR 1928 24 1786 1840
93 RAU 8002 ONLY 1840 60 8002 1753
94 SCT 0000 NORMALIZE 1753 36 0000 1975
95 STL ACC3 1975 20 1881 1784
96 BOV AD1 ZER0 CHECK 1784 47 1851 1890
97 RAL 8003 1890 65 8003 1798
98 SRD 0002 ROUND FOR 1798 31 0002 1807
99 SLT 0002 PLACING EXP 1807 35 0002 1764
100 NZU AE6 CHECK ROUND 1764 44 1818 1891
101 LDD 8003 OVERFLOW 1818 69 8003 1874
102 SRT 0001 1874 30 0001 1884
103 ALO 8001 AE6 1884 15 8001 1891
104 AE6 BMI AE2 INSERT 1891 46 1844 1845
105 ALO AJ3 AE5 EXP0NENT 1845 15 1848 1804
106 AE2 SLO AJ3 AE5 1844 16 1848 1804
107 AE5 SLO ACC3 ARTHX 1804 16 1881 1786
108 E00TH STD ARTHX FIX L0WER 1932 24 1786 1990
109 SLT 0008 TO LOWER 1990 35 0008 1859
110 STU ARTHM 1859 21 1824 1878
111 RAM 8002 TEST EXP 1878 67 8002 1887
112 SLO AJ5 STORE ZER0 1887 16 1940 1945
113 BMI AD1 IF LESS THAN 1945 46 1851 1850
114 SLO AJ4 50 ALARM 1850 16 1853 1758
115 BMI AD3 1F GRTR THAN 1758 46 1861 1862
116 SRT 0004 59 1861 30 0004 1921
117 ALO AR7 1921 15 1924 1929
118 LDD AD2A MODIFY 1929 69 1835 1838
119 SDA AD2 SHIFT 1838 22 1991 1971
120 RAL ARTHM 1971 65 1824 1930
121 SLT 0002 AD2 1930 35 0002 1991
122 AD1 RAL 8003 ARTHX STORE ZERO 1851 65 8003 1786
123 AD2 SRT 0000 ARTHX SHIFT C0NST 1991 30 0000 1786
124 AD2A SRT 0000 ARTHX 1835 30 0000 1786
125 AD3 LDD ARTHX 3031 FIX ALARM 1862 69 1786 3031
126 AG3 LDD ARTHX 3061 DIVIDE ALARM 1846 69 1786 3061
127 AI11 LDD ARTHX 3081 SCALE ALARM 1785 69 1786 3081
128 AI11A HLT 1081 AI6 1752 01 1081 1942
129 AG2 49 0000 0000 1876 49 0000 0000
130 AJ1 48 0000 0000 1820 48 0000 0000
131 AJ2 00 0000 0001 1903 00 0000 0001
132 AJ3 00 0000 0059 1848 00 0000 0059
133 AJ4 10 0000 0000 1853 10 0000 0000
134 AJ5 50 0000 0000 1940 50 0000 0000
135 E00AQ STD J0001 AQ1 READ 1974 24 1977 1880
136 AQ1 RD1 1976 AQ3 1880 70 1976 1898
137 AQ3 RAM P0001 AQ3A 1898 67 1951 1806
138 AQ3B RAM P0001 AQ3A CHECK FOR 1892 67 1951 1806
139 AQ3A NZE AQ8 LAST WORD 1806 45 1860 1837
140 LDD AQ5 AQ4 ON CARD 1860 69 1863 1816
141 AQ4 STD ACC4 1816 24 1870 1873
142 AUP 8003 READ IN 1873 10 8003 1931
143 SRT 0004 LABEL FOR 1931 30 0004 1941
144 SIA ACC5 PRESENT 1941 23 1795 1948
145 SLO 8001 VARIABLE 1948 16 8001 1856
146 ALO 8002 GET I Y OR C 1856 15 1809 8002
147 RAU 0000 ADDRESS FROM 1809 60 0000 1987 was RAU A000 - 00 0000 0000
146 AUP ACC5 ABCON DICT 1987 10 1795 1949
149 SLT 0004 ACC4 GENERATE 1949 35 0004 1870
150 AQ5 AUP AQ7 INSTRUCTION 1863 10 1866 1857
151 ALO P0010 1857 15 1960 1965
152 ALO 8002 GET AND 1965 15 1968 8002
153 LDD P0002 8003 STORE WORD 1968 69 1952 8003
154 AQ7 STD 0000 1866 24 0000 1907
155 RAL P0010 INCREMENT 1907 65 1960 1915
156 ALO AQ9 WORD COUNT 1915 15 1918 1854
157 STL P0010 1854 20 1960 1963
158 ALO AQ3B 8002 1963 15 1892 8002
159 AQ8 RAL P0001 CHECK FOR 1837 65 1951 1765
160 BMI J0001 AQ1 LAST CARD 1765 46 1977 1880
161 E00AR STD P0005 PUNCH 0UT 1801 24 1955 1908
162 STU J0003 1908 21 1979 1935
163 SIA P0008 STORE STMNT 1935 23 1958 1912
164 STU J0004 NUMBER 1912 21 1980 1886
165 SDA P0004 STORE WORD 1886 22 1954 1909
166 SLO 8001 COUNT 1909 16 8001 1917
167 NZE AR10 AR9 TEST ZERO 1917 45 1920 1872
168 AR10 STU J0005 STMT NUMBER 1920 21 1981 1814
169 STD J0006 SET PUNCH 1814 24 1982 1972
170 STD J0007 BAND TO 1972 24 1983 1864
171 STD J0008 ZEROES 1864 24 1984 1888
172 STD P0010 AR3 SET COUNTER 1888 24 1960 1913
173 AR3 RAL P0004 1913 65 1954 1910
174 SLO AR7 1910 16 1924 1936
175 BMI AR8 TEST WORD 1936 46 1994 1992
176 STL P0004 AR4 COUNT 1992 20 1954 1865
177 AR4 ALO 8002 GET WORD 1865 15 1868 8002
178 RAL P0000 LABEL FROM 1868 65 1950 1914
179 AUP 8003 PUNCH CONSTS 1914 10 8003 1922
180 SLT 0001 1922 35 0001 1938
181 SDA P0007 MODIFY LABEL 1938 22 1957 1961
182 SLO 8001 1961 16 8001 1919
183 SRT 0001 1919 30 0001 1926
184 ALO P0007 1926 15 1957 1962
185 SLT 0004 INSERT STMNT 1962 35 0004 1923
186 ALO P0008 NUMBER 1923 15 1958 1964
187 AUP P0010 1964 10 1960 1916
188 AUP 8003 1916 10 1969 8003
189 STL J0001 STORE LABEL 1969 20 1977 1988
190 RAL 8002 FOR PUNCHING 1988 65 8002 1900
191 LDD AQ4 MODIFY LABEL 1900 69 1906 1816
192 AUP AR6 INTO DRUM 1906 10 1966 1934
193 ALO P0010 LOC IN READ 1934 15 1960 1967
194 ALO 8003 GET WORD 1967 15 1970 8003
195 STD J0002 STORE IN 1970 24 1978 1993
196 RAL P0010 PUNCH BAND 1993 65 1960 1815
197 ALO AQ9 1815 15 1918 1973
196 STL P0010 AR3 1973 20 1960 1913
199 AR6 LDD 0000 8002 1966 69 0000 8002
200 AR7 00 0001 0000 1924 00 0001 0000
201 AR8 PCH J0001 P0005 PUNCH 1994 71 1977 1955
202 AR9 RAL 8000 IF STMT NMBR 1872 65 8000 1937
203 BMI AR10 P0005 ZRO PCH ONLY 1937 46 1920 1955
204 AQ9 00 0002 0000 IF 8000 NEG 1918 00 0002 0000
205 J0010 80 0000 8800 CONTROL CNST 1986 80 0000 8800
206 1976 RAM 1951 READ 1976 67 1951 1744
207 AUP 8003 UP TO 1744 10 8003 1741
208 SLT 0004 SEVEN 1741 35 0004 1748
209 SDA P0009 CONTIGUOUS 1748 22 1959 1737
210 SRT 0004 VARIABLES 1737 30 0004 1746
211 LDD AQ4 PER CARD 1746 69 1750 1816
212 RAL 8003 1750 65 8003 1749
213 AUP P0009 1749 10 1959 1740
214 ALO 8001 1740 15 8001 1751
215 AUP AQ9B 1751 10 1738 1742
216 ALO AQ10 AQ11 1742 15 1745 1735
217 AQ11 SUP AQ9B 1735 11 1738 1743
218 NZU AQ8 1743 44 1747 1837
219 AUP 8001 1747 10 8001 1736
220 SUP AR7 1736 11 1924 1739
221 SLO 8001 8003 1739 16 8001 8003
222 AQ9B LDD 1952 8002 1738 69 1952 8002
223 AQ10 STD 0000 AQ11 1745 24 0000 1735
1 VARS
ARTHX 00 0000 0000 1786 00 0000 0000
ARTHG 00 0000 0000 1794 00 0000 0000
ARTHF 00 0000 0000 1772 00 0000 0000
ARTHE 00 0000 0000 1902 00 0000 0000
ARTHH 00 0000 0000 1788 00 0000 0000
ARTHM 00 0000 0000 1824 00 0000 0000
ARTHY 00 0000 0000 1808 00 0000 0000
ACC 00 0000 0000 0000 00 0000 0000
ACC1 00 0000 0000 1998 00 0000 0000
ACC2 00 0000 0000 1843 00 0000 0000
ACC3 00 0000 0000 1881 00 0000 0000
ACC4 00 0000 0000 1870 00 0000 0000
ACC5 00 0000 0000 1795 00 0000 0000
ACC6 00 0000 0000 1858 00 0000 0000
J0001 00 0000 0000 1977 00 0000 0000
J0002 00 0000 0000 1978 00 0000 0000
J0003 00 0000 0000 1979 00 0000 0000
J0004 00 0000 0000 1980 00 0000 0000
J0005 00 0000 0000 1981 00 0000 0000
J0006 00 0000 0000 1982 00 0000 0000
J0007 00 0000 0000 1983 00 0000 0000
J0008 00 0000 0000 1984 00 0000 0000
P0000 00 0000 0000 1950 00 0000 0000
P0001 00 0000 0000 1951 00 0000 0000
P0002 00 0000 0000 1952 00 0000 0000
P0004 00 0000 0000 1954 00 0000 0000
P0005 00 0000 0000 1955 00 0000 0000
P0007 00 0000 0000 1957 00 0000 0000
P0008 00 0000 0000 1958 00 0000 0000
P0009 00 0000 0000 1959 00 0000 0000
P0010 00 0000 0000 1960 00 0000 0000

370
I650/sw/it_package_p2.dck Normal file
View file

@ -0,0 +1,370 @@
6I1954195C 0000241833800?2417861789 e00aistdarthxai1 1-add
6I1954195C 0000241789800?2017941799 ai1 stlarthg 2-
6I1954195C 0000241799800?6918021805 ldd arthb 3-
6I1954195C 0000241802800?6780021767 ram 8002 4-store acc
6I1954195C 0000241767800?2017721894 stlarthf 5-power
6I1954195C 0000241894800?1819021759 smlarthe 6-
6I1954195C 0000241759800?3500011766 slt 0001 7-
6I1954195C 0000241766800?4417731771 nzuai12 8-find max
6I1954195C 0000241771800?6917741777 lddai3a 9-
6I1954195C 0000241777800?3000051790 srt 0005 10-power
6I1954195C 0000241790800?2217931796 sdaai3 11-set expnnts
6I1954195C 0000241796800?4618991754 bmi ai2 12-and then
6I1954195C 0000241899800?6719021817 ramarthe 13-perform
6I1954195C 0000241817800?2017721776 stlarthf 14-addition
6I1954195C 0000241776800?6517881943 ralarthh 15-
6I1954195C 0000241943800?6918241793 lddarthmai3 16-
6I1954195C 0000241793800?3000001811 ai3 srt 0000ai3b 17-
6I1954195C 0000241774800?3000001811 ai3a srt 0000ai3b 18-
6I1954195C 0000241811800?1580011770 ai3b alo 8001ai5 19-
6I1954195C 0000241754800?6518241779 ai2 ralarthm 20-
6I1954195C 0000241779800?6917881793 lddarthhai3 21-
6I1954195C 0000241770800?6080021780 ai5 rau 8002 22-clear arthe
6I1954195C 0000241780800?2019021762 stlarthearths 23-to scale
6I1954195C 0000241773800?4617781828 ai12 bmi ai13 24-
6I1954195C 0000241778800?6517941904 ralarthgai10 25-
6I1954195C 0000241828800?6500001786 ai13 ralacc arthx 26-
6I1954195C 0000241805800?2418081826 arthbstdarthy 27-break up exp
6I1954195C 0000241826800?3500081996 slt 0008 28-and mantissa
6I1954195C 0000241996800?2019021755 stlarthe 29-store power
6I1954195C 0000241755800?6080031763 rau 8003 30-and mantissa
6I1954195C 0000241763800?3500011769 slt 0001 31-of lower
6I1954195C 0000241769800?2118241997 stuarthm 32-
6I1954195C 0000241997800?6000001855 rauacc 33-
6I1954195C 0000241855800?3000021761 srt 0002 34-store power
6I1954195C 0000241761800?1680021819 slo 8002 35-and mantissa
6I1954195C 0000241819800?3500011775 slt 0001 36-of acc
6I1954195C 0000241775800?1580011783 alo 8001 37-
6I1954195C 0000241783800?2117881808 stuarthharthy 38-
6I1954195C 0000241762800?3600001782 arthssct 0000 39-normalize
6I1954195C 0000241782800?4719421787 bovai6 40-brnch if zro
6I1954195C 0000241787800?2017941797 stlarthg 41-shift count
6I1954195C 0000241797800?6580031905 ral 8003 42-round on
6I1954195C 0000241905800?3100021813 srd 0002 43-ninth digit
6I1954195C 0000241813800?3500021869 slt 0002 44-check for
6I1954195C 0000241869800?2018241877 stlarthm 45-roundoff
6I1954195C 0000241877800?4418311834 nzuai7 ai8 46-overflow
6I1954195C 0000241834800?6780031841 ai8 ram 8003 47-and
6I1954195C 0000241841800?1817941800 smlarthg 48-correct if
6I1954195C 0000241800800?1519031822 aloaj2 49-necessary
6I1954195C 0000241822800?3500081791 slt 0008 50-
6I1954195C 0000241791800?6580021849 ral 8002 51-
6I1954195C 0000241849800?1719021757 amlarthe 52-
6I1954195C 0000241757800?1517721827 aloarthf 53-
6I1954195C 0000241827800?4617521781 bmiai11a 54-pwr too smal
6I1954195C 0000241781800?4417851836 nzuai11 55-pwr too lrge
6I1954195C 0000241836800?3500021893 slt 0002 56-
6I1954195C 0000241893800?2119981901 stuacc1 57-
6I1954195C 0000241901800?6518241829 ralarthm 58-
6I1954195C 0000241829800?4619441995 bmi ai9 59-combine
6I1954195C 0000241944800?1619981904 sloacc1 ai10 60-
6I1954195C 0000241904800?2000001786 ai10 stlacc arthx 61-and
6I1954195C 0000241995800?1519981904 ai9 aloacc1 ai10 62-
6I1954195C 0000241831800?3000011792 ai7 srt 0001 63-adjust
6I1954195C 0000241792800?2018241927 stlarthm 64-
6I1954195C 0000241927800?3500011834 slt 0001ai8 65-
6I1954195C 0000241942800?6580031904 ai6 ral 8003ai10 66-
6I1954195C 0000241832800?2417861839 e00ajstdarthx 67-multiply
6I1954195C 0000241839800?6918521805 ldd arthb 68-
6I1954195C 0000241852800?6780021867 ram 8002 69-acc power
6I1954195C 0000241867800?1618201825 sloaj1 70-minus 48
6I1954195C 0000241825800?2017721875 stlarthf 71-
6I1954195C 0000241875800?6017881756 rauarthh 72-
6I1954195C 0000241756800?1918241762 mpyarthmarths 73-
6I1954195C 0000241830800?2417861889 e00agstdarthxag1 74-divide
6I1954195C 0000241889800?6918421805 ag1 ldd arthb 75-is divisor
6I1954195C 0000241842800?4418121846 nzu ag3 76-zer0
6I1954195C 0000241812800?6880021821 rsm 8002 77-divisor
6I1954195C 0000241821800?1518761895 aloag2 78-power minus
6I1954195C 0000241895800?2017721768 stlarthf 79-49
6I1954195C 0000241768800?6018241879 rauarthm 80-sh1ft
6I1954195C 0000241879800?3000011885 srt 0001 81-dividend
6I1954195C 0000241885800?6417881803 dvrarthh 82-do divide
6I1954195C 0000241803800?6080021762 rau 8002arths 83-
6I1954195C 0000241882800?2417861989 e00aostdarthx 84-div reverse
6I1954195C 0000241989800?2018431896 stlacc2 85-
6I1954195C 0000241896800?6500001810 ralacc 86-
6I1954195C 0000241810800?6918431897 lddacc2 87-
6I1954195C 0000241897800?2400001889 stdacc ag1 88-
6I1954195C 0000241947800?2418581911 e00afstdacc6 89-fl0at to lwr
6I1954195C 0000241911800?6919251928 lddae4 e00ae 90-and acc
6I1954195C 0000241925800?2000001858 ae4 stlacc acc6 91-
6I1954195C 0000241928800?2417861840 e00aestdarthx 92-float to lwr
6I1954195C 0000241840800?6080021753 rau 8002 93-only
6I1954195C 0000241753800?3600001975 sct 0000 94-normalize
6I1954195C 0000241975800?2018811784 stlacc3 95-
6I1954195C 0000241784800?4718511890 bovad1 96-zer0 check
6I1954195C 0000241890800?6580031798 ral 8003 97-
6I1954195C 0000241798800?3100021807 srd 0002 98-round for
6I1954195C 0000241807800?3500021764 slt 0002 99-placing exp
6I1954195C 0000241764800?4418181891 nzu ae6 100-check round
6I1954195C 0000241818800?6980031874 ldd 8003 101-overflow
6I1954195C 0000241874800?3000011884 srt 0001 102-
6I1954195C 0000241884800?1580011891 alo 8001ae6 103-
6I1954195C 0000241891800?4618441845 ae6 bmiae2 104-insert
6I1954195C 0000241845800?1518481804 aloaj3 ae5 105-exp0nent
6I1954195C 0000241844800?1618481804 ae2 sloaj3 ae5 106-
6I1954195C 0000241804800?1618811786 ae5 sloacc3 arthx 107-
6I1954195C 0000241932800?2417861990 e00thstdarthx 108-fix l0wer
6I1954195C 0000241990800?3500081859 slt 0008 109-to lower
6I1954195C 0000241859800?2118241878 stuarthm 110-
6I1954195C 0000241878800?6780021887 ram 8002 111-test exp
6I1954195C 0000241887800?1619401945 sloaj5 112-store zer0
6I1954195C 0000241945800?4618511850 bmiad1 113-if less than
6I1954195C 0000241850800?1618531758 sloaj4 114-50 alarm
6I1954195C 0000241758800?4618611862 bmi ad3 115-1f grtr than
6I1954195C 0000241861800?3000041921 srt 0004 116-59
6I1954195C 0000241921800?1519241929 aloar7 117-
6I1954195C 0000241929800?6918351838 lddad2a 118-modify
6I1954195C 0000241838800?2219911971 sdaad2 119-shift
6I1954195C 0000241971800?6518241930 ralarthm 120-
6I1954195C 0000241930800?3500021991 slt 0002ad2 121-
6I1954195C 0000241851800?6580031786 ad1 ral 8003arthx 122-store zero
6I1954195C 0000241991800?3000001786 ad2 srt 0000arthx 123-shift c0nst
6I1954195C 0000241835800?3000001786 ad2a srt 0000arthx 124-
6I1954195C 0000241862800?6917863031 ad3 lddarthx 3031 125-fix alarm
6I1954195C 0000241846800?6917863061 ag3 lddarthx 3061 126-divide alarm
6I1954195C 0000241785800?6917863081 ai11 lddarthx 3081 127-scale alarm
6I1954195C 0000241752800?0110811942 ai11ahlt 1081ai6 128-
6I1954195C 0000241876800?4900000000 ag2 49 0000 0000 129-
6I1954195C 0000241820800?4800000000 aj1 48 0000 0000 130-
6I1954195C 0000241903800?0000000001 aj2 00 0000 0001 131-
6I1954195C 0000241848800?0000000059 aj3 00 0000 0059 132-
6I1954195C 0000241853800?1000000000 aj4 10 0000 0000 133-
6I1954195C 0000241940800?5000000000 aj5 50 0000 0000 134-
6I1954195C 0000241974800?2419771880 e00aqstdj0001aq1 135-read
6I1954195C 0000241880800?7019761898 aq1 rd1 1976aq3 136-
6I1954195C 0000241898800?6719511806 aq3 ramp0001aq3a 137-
6I1954195C 0000241892800?6719511806 aq3b ramp0001aq3a 138-check for
6I1954195C 0000241806800?4518601837 aq3a nze aq8 139-last word
6I1954195C 0000241860800?6918631816 lddaq5 aq4 140-on card
6I1954195C 0000241816800?2418701873 aq4 stdacc4 141-
6I1954195C 0000241873800?1080031931 aup 8003 142-read in
6I1954195C 0000241931800?3000041941 srt 0004 143-label for
6I1954195C 0000241941800?2317951948 siaacc5 144-present
6I1954195C 0000241948800?1680011856 slo 8001 145-variable
6I1954195C 0000241856800?1518098002 alo 8002 146-get i y 0r c
6I1954195C 0000241809800?6000001987 rau 0000 147-address from
6I1954195C 0000241987800?1017951949 aupacc5 146-abcon dict
6I1954195C 0000241949800?3500041870 slt 0004acc4 149-generate
6I1954195C 0000241863800?1018661857 aq5 aupaq7 150-1nstruction
6I1954195C 0000241857800?1519601965 alop0010 151-
6I1954195C 0000241965800?1519688002 alo 8002 152-get and
6I1954195C 0000241968800?6919528003 lddp0002 8003 153-store word
6I1954195C 0000241866800?2400001907 aq7 std 0000 154-
6I1954195C 0000241907800?6519601915 ralp0010 155-increment
6I1954195C 0000241915800?1519181854 aloaq9 156-word count
6I1954195C 0000241854800?2019601963 stlp0010 157-
6I1954195C 0000241963800?1518928002 aloaq3b 8002 158-
6I1954195C 0000241837800?6519511765 aq8 ralp0001 159-check for
6I1954195C 0000241765800?4619771880 bmij0001aq1 160-last card
6I1954195C 0000241801800?2419551908 e00arstdp0005 161-punch 0ut
6I1954195C 0000241908800?2119791935 stuj0003 162-
6I1954195C 0000241935800?2319581912 siap0008 163-store stmnt
6I1954195C 0000241912800?2119801886 stuj0004 164-number
6I1954195C 0000241886800?2219541909 sdap0004 165-store word
6I1954195C 0000241909800?1680011917 slo 8001 166-count
6I1954195C 0000241917800?4519201872 nzear10 ar9 167-test zero
6I1954195C 0000241920800?2119811814 ar10 stuj0005 168-stmt number
6I1954195C 0000241814800?2419821972 stdj0006 169-set punch
6I1954195C 0000241972800?2419831864 stdj0007 170-band to
6I1954195C 0000241864800?2419841888 stdj0008 171-zeroes
6I1954195C 0000241888800?2419601913 stdp0010ar3 172-set counter
6I1954195C 0000241913800?6519541910 ar3 ralp0004 173-
6I1954195C 0000241910800?1619241936 sloar7 174-
6I1954195C 0000241936800?4619941992 bmiar8 175-test word
6I1954195C 0000241992800?2019541865 stlp0004ar4 176-count
6I1954195C 0000241865800?1518688002 ar4 alo 8002 177-get word
6I1954195C 0000241868800?6519501914 ralp0000 178-label from
6I1954195C 0000241914800?1080031922 aup 8003 179-punch consts
6I1954195C 0000241922800?3500011938 slt 0001 180-
6I1954195C 0000241938800?2219571961 sdap0007 181-modify label
6I1954195C 0000241961800?1680011919 slo 8001 182-
6I1954195C 0000241919800?3000011926 srt 0001 183-
6I1954195C 0000241926800?1519571962 alop0007 184-
6I1954195C 0000241962800?3500041923 slt 0004 185-insert stmnt
6I1954195C 0000241923800?1519581964 alop0008 186-number
6I1954195C 0000241964800?1019601916 aupp0010 187-
6I1954195C 0000241916800?1019698003 aup 8003 188-
6I1954195C 0000241969800?2019771988 stlj0001 189-store label
6I1954195C 0000241988800?6580021900 ral 8002 190-for punching
6I1954195C 0000241900800?6919061816 ldd aq4 191-modify label
6I1954195C 0000241906800?1019661934 aupar6 192-into drum
6I1954195C 0000241934800?1519601967 alop0010 193-loc in read
6I1954195C 0000241967800?1519708003 alo 8003 194-get word
6I1954195C 0000241970800?2419781993 stdj0002 195-store in
6I1954195C 0000241993800?6519601815 ralp0010 196-punch band
6I1954195C 0000241815800?1519181973 aloaq9 197-
6I1954195C 0000241973800?2019601913 stlp0010ar3 196-
6I1954195C 0000241966800?6900008002 ar6 ldd 0000 8002 199-
6I1954195C 0000241924800?0000010000 ar7 00 0001 0000 200-
6I1954195C 0000241994800?7119771955 ar8 pchj0001p0005 201-punch
6I1954195C 0000241872800?6580001937 ar9 ral 8000 202-if stmt nmbr
6I1954195C 0000241937800?4619201955 bmiar10 p0005 203-zro pch only
6I1954195C 0000241918800?0000020000 aq9 00 0002 0000 204-if 8000 neg
6I1954195C 0000241986800?8000008800 j0010 80 0000 8800 205-control cnst
6I1954195C 0000241654800?2418081732 e00alstdarthy 206-
6I1954195C 0000241732800?2017881694 stlarthh 207-
6I1954195C 0000241694800?6500001709 ralacc al17a 208-is power
6I1954195C 0000241709800?2418701723 al17astdacc4 209-two
6I1954195C 0000241723800?2417861739 stdarthx 210-if so
6I1954195C 0000241739800?1616861692 sloal16 211-multiply
6I1954195C 0000241692800?4517311751 nzeal18 212-
6I1954195C 0000241751800?6517881645 ralarthh 213-
6I1954195C 0000241645800?2400001655 stdacc 214-
6I1954195C 0000241655800?6918081832 lddarthye00aj 215-
6I1954195C 0000241731800?6517881693 al18 ralarthhal17 216-
6I1954195C 0000241693800?3500081661 al17 slt 0008 217-
6I1954195C 0000241661800?1680021720 slo 8002 218-
6I1954195C 0000241720800?3500021677 slt 0002 219-q equals
6I1954195C 0000241677800?1580011690 alo 8001 220-mantissa
6I1954195C 0000241690800?2117721675 stuarthf 221-of argument
6I1954195C 0000241675800?6780021683 ram 8002 222-
6I1954195C 0000241683800?1617361691 sloal1 223-store expnnt
6I1954195C 0000241691800?3500021698 slt 0002 224-of argmnt
6I1954195C 0000241698800?2119021706 stuarthe 225-
6I1954195C 0000241706800?6516601666 ralal2 226-mantissa of
6I1954195C 0000241666800?2018241678 stlarthm 227-z is one
6I1954195C 0000241678800?6517361695 ralal1 228-
6I1954195C 0000241695800?3500021702 slt 0002 229-exp of z is
6I1954195C 0000241702800?2117941747 stuarthgal3 230-50
6I1954195C 0000241747800?6000001708 al3 rauacc 231-k is grtst
6I1954195C 0000241708800?1917361738 mpyal1 232-integer in
6I1954195C 0000241738800?2100001658 stuacc 233-k over two
6I1954195C 0000241658800?6580021667 ral 8002 234-is remainder
6I1954195C 0000241667800?4516701646 nze al4 235-zer0
6I1954195C 0000241670800?6018241729 rauarthm 236-if not set z
6I1954195C 0000241729800?6916821737 ldd al5 237-equals to
6I1954195C 0000241682800?1517941715 aloarthg 238-z times q
6I1954195C 0000241715800?2017941699 stlarthg 239-via
6I1954195C 0000241699800?6516651669 ralarthd 240-subroutine
6I1954195C 0000241669800?2018241638 stlarthm 241-
6I1954195C 0000241638800?4516461741 nzeal4 al20 242-
6I1954195C 0000241646800?6000001712 al4 rauacc 243-if k nonzero
6I1954195C 0000241712800?4416681721 nzu al7 244-q equals
6I1954195C 0000241668800?6017721679 rauarthf 245-
6I1954195C 0000241679800?6916841737 ldd al5 246-via subrtne
6I1954195C 0000241684800?1519021714 aloarthe 247-
6I1954195C 0000241714800?2019021662 stlarthe 248-
6I1954195C 0000241662800?6516651719 ralarthd 249-
6I1954195C 0000241719800?2017721747 stlarthfal3 250-
6I1954195C 0000241721800?6017941700 al7 rauarthg 251-set exponnts
6I1954195C 0000241700800?3000021663 srt 0002 252-arths
6I1954195C 0000241663800?4417851722 nzuai11 253-exp overscal
6I1954195C 0000241722800?2019021664 stlarthe 254-
6I1954195C 0000241664800?2117721671 stuarthf 255-
6I1954195C 0000241671800?6018241680 rauarthm 256-
6I1954195C 0000241680800?3000011741 srt 0001al20 257-
6I1954195C 0000241741800?6917161724 al20 lddal8 258-
6I1954195C 0000241724800?2417861762 stdarthxarths 259-
6I1954195C 0000241716800?6518701648 al8 ralacc4 260-
6I1954195C 0000241648800?4617011743 bmial10 261-
6I1954195C 0000241743800?6500001808 ralacc arthy 262-
6I1954195C 0000241701800?6500001672 al10 ralacc 263-z equals one
6I1954195C 0000241672800?4516761681 nze al12 264-over z if
6I1954195C 0000241676800?6516851649 ralal11 265-k neg and z
6I1954195C 0000241649800?6918081830 lddarthye00ag 266-non zero
6I1954195C 0000241681800?6918083111 al12 lddarthy 3111 267-alarm if zro
6I1954195C 0000241737800?2417861652 al5 stdarthx 268-
6I1954195C 0000241652800?1917721673 mpyarthf 269-
6I1954195C 0000241673800?3000091644 srt 0009 270-
6I1954195C 0000241644800?4416501639 nzual14 271-
6I1954195C 0000241639800?2016651640 stlarthd 272-
6I1954195C 0000241640800?6580031641 ral 8003al15 273-
6I1954195C 0000241641800?1519021786 al15 aloarthearthx 274-
6I1954195C 0000241650800?3000011643 al14 srt 0001 275-
6I1954195C 0000241643800?2016651642 stlarthd 276-
6I1954195C 0000241642800?6519031641 ralaj2 al15 277-
6I1954195C 0000241736800?5000000000 al1 50 0000 0000 278-
6I1954195C 0000241660800?1000000000 al2 10 0000 0000 279-
6I1954195C 0000241685800?1000000050 al11 10 0000 0050 280-
6I1954195C 0000241686800?0000000002 al16 00 0000 0002 281-
6I1954195C 0000241903800?0000000001 aj2 00 0000 0001 282-
6I1954195C 0000241651800?2418081687 e00anstdarthy 283-power
6I1954195C 0000241687800?6900001674 lddacc 284-float fix
6I1954195C 0000241674800?2417881745 stdarthh 285-reverse
6I1954195C 0000241745800?2000001709 stlacc al17a 286-
6I1954195C 0000241704800?2418081711 e00akstdarthy 287-power fixfix
6I1954195C 0000241711800?2017941647 stlarthgak1 288-q is argmnt
6I1954195C 0000241647800?6700001705 ak1 ramacc 289-k equals
6I1954195C 0000241705800?2017721725 stlarthf 290-abval power
6I1954195C 0000241725800?6519031707 ralaj2 291-z equals
6I1954195C 0000241707800?2017881718 stlarthhak3 292-one
6I1954195C 0000241718800?6017721727 ak3 rauarthf 293-k is gtst
6I1954195C 0000241727800?1917301717 mpyak4 294-intgr in
6I1954195C 0000241717800?2117721726 stuarthf 295-k over two
6I1954195C 0000241726800?6580021735 ral 8002 296-is remainder
6I1954195C 0000241735800?4517341742 nze ak5 297-zero
6I1954195C 0000241734800?6017881688 rauarthh 298-if not z is
6I1954195C 0000241688800?1917941733 mpyarthg 299-z times q
6I1954195C 0000241733800?2017881742 stlarthhak5 300-
6I1954195C 0000241742800?6017721728 ak5 rauarthf 301-
6I1954195C 0000241728800?4417401746 nzu ak6 302-1s k zero
6I1954195C 0000241740800?6017941749 rauarthg 303-if not
6I1954195C 0000241749800?1980011689 mpy 8001 304-q equals
6I1954195C 0000241689800?2017941718 stlarthgak3 305-q squared
6I1954195C 0000241746800?6000001656 ak6 rauacc 306-is power neg
6I1954195C 0000241656800?4616591713 bmi ak7 307-if so is z
6I1954195C 0000241659800?6717881744 ramarthh 308-zero
6I1954195C 0000241744800?4517481750 nze ak8 309-if not is z
6I1954195C 0000241748800?1619031657 sloaj2 310-one
6I1954195C 0000241657800?4517101713 nzeak10 ak7 311-
6I1954195C 0000241713800?6517881808 ak7 ralarthharthy 312-exhibit z
6I1954195C 0000241710800?6580031808 ak10 ral 8003arthy 313-
6I1954195C 0000241750800?6918083101 ak8 lddarthy 3101 314-alarm
6I1954195C 0000241730800?5000000000 ak4 50 0000 0000 315-
6I1954195C 0000241903800?0000000001 aj2 00 0000 0001 316-
6I1954195C 0000241653800?2418081696 e00amstdarthy 317-interchge
6I1954195C 0000241696800?6900001703 lddacc 318-acc and
6I1954195C 0000241703800?2417941697 stdarthg 319-lower
6I1954195C 0000241697800?2000001647 stlacc ak1 320-then e00ak
6I1954195C 0000241976800?6719511623 1976ram 1951 321-
6I1954195C 0000241623800?1080031632 aup 8003 322-
6I1954195C 0000241632800?3500041624 slt 0004 323-
6I1954195C 0000241624800?2219591626 sdap0009 324-
6I1954195C 0000241626800?3000041637 srt 0004 325-
6I1954195C 0000241637800?6916271816 ldd aq4 326-
6I1954195C 0000241627800?6580031636 ral 8003 327-
6I1954195C 0000241636800?1019591633 aupp0009 328-
6I1954195C 0000241633800?1580011631 alo 8001 329-
6I1954195C 0000241631800?1016251628 aupaq9b 330-
6I1954195C 0000241628800?1516341622 aloaq10 aq11 331-
6I1954195C 0000241622800?1116251630 aq11 supaq9b 332-
6I1954195C 0000241630800?4416351837 nzu aq8 333-
6I1954195C 0000241635800?1080011621 aup 8001 334-
6I1954195C 0000241621800?1119241629 supar7 335-
6I1954195C 0000241629800?1680018003 slo 8001 8003 336-
6I1954195C 0000241625800?6919528002 aq9b ldd 1952 8002 337-
6I1954195C 0000241634800?2400001622 aq10 std 0000aq11 338-
6I1954195C 0000241786800?0000000000 arthx 00 0000 0000 -
6I1954195C 0000241665800?0000000000 arthd 00 0000 0000 -
6I1954195C 0000241794800?0000000000 arthg 00 0000 0000 -
6I1954195C 0000241772800?0000000000 arthf 00 0000 0000 -
6I1954195C 0000241902800?0000000000 arthe 00 0000 0000 -
6I1954195C 0000241788800?0000000000 arthh 00 0000 0000 -
6I1954195C 0000241824800?0000000000 arthm 00 0000 0000 -
6I1954195C 0000241808800?0000000000 arthy 00 0000 0000 -
6I1954195C 0000240000800?0000000000 acc 00 0000 0000 -
6I1954195C 0000241998800?0000000000 acc1 00 0000 0000 -
6I1954195C 0000241843800?0000000000 acc2 00 0000 0000 -
6I1954195C 0000241881800?0000000000 acc3 00 0000 0000 -
6I1954195C 0000241870800?0000000000 acc4 00 0000 0000 -
6I1954195C 0000241795800?0000000000 acc5 00 0000 0000 -
6I1954195C 0000241858800?0000000000 acc6 00 0000 0000 -
6I1954195C 0000241977800?0000000000 j0001 00 0000 0000 -
6I1954195C 0000241978800?0000000000 j0002 00 0000 0000 -
6I1954195C 0000241979800?0000000000 j0003 00 0000 0000 -
6I1954195C 0000241980800?0000000000 j0004 00 0000 0000 -
6I1954195C 0000241981800?0000000000 j0005 00 0000 0000 -
6I1954195C 0000241982800?0000000000 j0006 00 0000 0000 -
6I1954195C 0000241983800?0000000000 j0007 00 0000 0000 -
6I1954195C 0000241984800?0000000000 j0008 00 0000 0000 -
6I1954195C 0000241950800?0000000000 p0000 00 0000 0000 -
6I1954195C 0000241951800?0000000000 p0001 00 0000 0000 -
6I1954195C 0000241952800?0000000000 p0002 00 0000 0000 -
6I1954195C 0000241954800?0000000000 p0004 00 0000 0000 -
6I1954195C 0000241955800?0000000000 p0005 00 0000 0000 -
6I1954195C 0000241957800?0000000000 p0007 00 0000 0000 -
6I1954195C 0000241958800?0000000000 p0008 00 0000 0000 -
6I1954195C 0000241959800?0000000000 p0009 00 0000 0000 -
6I1954195C 0000241960800?0000000000 p0010 00 0000 0000 -

379
I650/sw/it_package_p2_listing.txt Normal file
View file

@ -0,0 +1,379 @@
5 PACKAGE 2
5 CONTAINS PACKAGE 1
5 PLUS THE FOLLOWING
5 ROUTINES
5 E00AK POWER FIX FIX
5 E00Am POWER FIX FIX REVERSE
5 E00AL POWER FLOAT FIX
5 E00AN POWER FLOAT FIX REVERSE
1 E00AI STD ARTHX AI1 ADD 1833 24 1786 1789
2 AI1 STL ARTHG 1789 20 1794 1799
3 LDD ARTHB 1799 69 1802 1805
4 RAM 8002 STORE ACC 1802 67 8002 1767
5 STL ARTHF POWER 1767 20 1772 1894
6 SML ARTHE 1894 18 1902 1759
7 SLT 0001 1759 35 0001 1766
8 NZU AI12 FIND MAX 1766 44 1773 1771
9 LDD AI3A 1771 69 1774 1777
10 SRT 0005 POWER 1777 30 0005 1790
11 SDA AI3 SET EXPNNTS 1790 22 1793 1796
12 BMI AI2 AND THEN 1796 46 1899 1754
13 RAM ARTHE PERFORM 1899 67 1902 1817
14 STL ARTHF ADDITION 1817 20 1772 1776
15 RAL ARTHH 1776 65 1788 1943
16 LDD ARTHM AI3 1943 69 1824 1793
17 AI3 SRT 0000 AI3B 1793 30 0000 1811
18 AI3A SRT 0000 AI3B 1774 30 0000 1811
19 AI3B ALO 8001 AI5 1811 15 8001 1770
20 AI2 RAL ARTHM 1754 65 1824 1779
21 LDD ARTHH AI3 1779 69 1788 1793
22 AI5 RAU 8002 CLEAR ARTHE 1770 60 8002 1780
23 STL ARTHE ARTHS TO SCALE 1780 20 1902 1762
24 AI12 BMI AI13 1773 46 1778 1828
25 RAL ARTHG AI10 1778 65 1794 1904
26 AI13 RAL ACC ARTHX 1828 65 0000 1786
27 ARTHB STD ARTHY BREAK UP EXP 1805 24 1808 1826
28 SLT 0008 AND MANTISSA 1826 35 0008 1996
29 STL ARTHE STORE POWER 1996 20 1902 1755
30 RAU 8003 AND MANTISSA 1755 60 8003 1763
31 SLT 0001 OF LOWER 1763 35 0001 1769
32 STU ARTHM 1769 21 1824 1997
33 RAU ACC 1997 60 0000 1855
34 SRT 0002 STORE POWER 1855 30 0002 1761
35 SLO 8002 AND MANTISSA 1761 16 8002 1819
36 SLT 0001 OF ACC 1819 35 0001 1775
37 ALO 8001 1775 15 8001 1783
38 STU ARTHH ARTHY 1783 21 1788 1808
39 ARTHS SCT 0000 NORMALIZE 1762 36 0000 1782
40 BOV AI6 BRNCH IF ZRO 1782 47 1942 1787
41 STL ARTHG SHIFT COUNT 1787 20 1794 1797
42 RAL 8003 ROUND ON 1797 65 8003 1905
43 SRD 0002 NINTH DIGIT 1905 31 0002 1813
44 SLT 0002 CHECK FOR 1813 35 0002 1869
45 STL ARTHM ROUNDOFF 1869 20 1824 1877
46 NZU AI7 AI8 OVERFLOW 1877 44 1831 1834
47 AI8 RAM 8003 AND 1834 67 8003 1841
48 SML ARTHG CORRECT IF 1841 18 1794 1800
49 ALO AJ2 NECESSARY 1800 15 1903 1822
50 SLT 0008 1822 35 0008 1791
51 RAL 8002 1791 65 8002 1849
52 AML ARTHE 1849 17 1902 1757
53 ALO ARTHF 1757 15 1772 1827
54 BMI AI11A PWR TOO SMAL 1827 46 1752 1781
55 NZU AI11 PWR TOO LRGE 1781 44 1785 1836
56 SLT 0002 1836 35 0002 1893
57 STU ACC1 1893 21 1998 1901
58 RAL ARTHM 1901 65 1824 1829
59 BMI AI9 COMBINE 1829 46 1944 1995
60 SLO ACC1 AI10 1944 16 1998 1904
61 AI10 STL ACC ARTHX AND 1904 20 0000 1786
62 AI9 ALO ACC1 AI10 1995 15 1998 1904
63 AI7 SRT 0001 ADJUST 1831 30 0001 1792
64 STL ARTHM 1792 20 1824 1927
65 SLT 0001 AI8 1927 35 0001 1834
66 AI6 RAL 8003 AI10 1942 65 8003 1904
67 E00AJ STD ARTHX MULTIPLY 1832 24 1786 1839
68 LDD ARTHB 1839 69 1852 1805
69 RAM 8002 ACC POWER 1852 67 8002 1867
70 SLO AJ1 MINUS 48 1867 16 1820 1825
71 STL ARTHF 1825 20 1772 1875
72 RAU ARTHH 1875 60 1788 1756
73 MPY ARTHM ARTHS 1756 19 1824 1762
74 E00AG STD ARTHX AG1 DIVIDE 1830 24 1786 1889
75 AG1 LDD ARTHB IS DIVISOR 1889 69 1842 1805
76 NZU AG3 ZER0 1842 44 1812 1846
77 RSM 8002 DIVISOR 1812 68 8002 1821
78 ALO AG2 POWER MINUS 1821 15 1876 1895
79 STL ARTHF 49 1895 20 1772 1768
80 RAU ARTHM SH1FT 1768 60 1824 1879
81 SRT 0001 DIVIDEND 1879 30 0001 1885
82 DVR ARTHH DO DIVIDE 1885 64 1788 1803
83 RAU 8002 ARTHS 1803 60 8002 1762
84 E00AO STD ARTHX DIV REVERSE 1882 24 1786 1989
85 STL ACC2 1989 20 1843 1896
86 RAL ACC 1896 65 0000 1810
87 LDD ACC2 1810 69 1843 1897
88 STD ACC AG1 1897 24 0000 1889
89 E00AF STD ACC6 FL0AT TO LWR 1947 24 1858 1911
90 LDD AE4 E00AE AND ACC 1911 69 1925 1928
91 AE4 STL ACC ACC6 1925 20 0000 1858
92 E00AE STD ARTHX FLOAT TO LWR 1928 24 1786 1840
93 RAU 8002 ONLY 1840 60 8002 1753
94 SCT 0000 NORMALIZE 1753 36 0000 1975
95 STL ACC3 1975 20 1881 1784
96 BOV AD1 ZER0 CHECK 1784 47 1851 1890
97 RAL 8003 1890 65 8003 1798
98 SRD 0002 ROUND FOR 1798 31 0002 1807
99 SLT 0002 PLACING EXP 1807 35 0002 1764
100 NZU AE6 CHECK ROUND 1764 44 1818 1891
101 LDD 8003 OVERFLOW 1818 69 8003 1874
102 SRT 0001 1874 30 0001 1884
103 ALO 8001 AE6 1884 15 8001 1891
104 AE6 BMI AE2 INSERT 1891 46 1844 1845
105 ALO AJ3 AE5 EXP0NENT 1845 15 1848 1804
106 AE2 SLO AJ3 AE5 1844 16 1848 1804
107 AE5 SLO ACC3 ARTHX 1804 16 1881 1786
108 E00TH STD ARTHX FIX L0WER 1932 24 1786 1990
109 SLT 0008 TO LOWER 1990 35 0008 1859
110 STU ARTHM 1859 21 1824 1878
111 RAM 8002 TEST EXP 1878 67 8002 1887
112 SLO AJ5 STORE ZER0 1887 16 1940 1945
113 BMI AD1 IF LESS THAN 1945 46 1851 1850
114 SLO AJ4 50 ALARM 1850 16 1853 1758
115 BMI AD3 1F GRTR THAN 1758 46 1861 1862
116 SRT 0004 59 1861 30 0004 1921
117 ALO AR7 1921 15 1924 1929
118 LDD AD2A MODIFY 1929 69 1835 1838
119 SDA AD2 SHIFT 1838 22 1991 1971
120 RAL ARTHM 1971 65 1824 1930
121 SLT 0002 AD2 1930 35 0002 1991
122 AD1 RAL 8003 ARTHX STORE ZERO 1851 65 8003 1786
123 AD2 SRT 0000 ARTHX SHIFT C0NST 1991 30 0000 1786
124 AD2A SRT 0000 ARTHX 1835 30 0000 1786
125 AD3 LDD ARTHX 3031 FIX ALARM 1862 69 1786 3031
126 AG3 LDD ARTHX 3061 DIVIDE ALARM 1846 69 1786 3061
127 AI11 LDD ARTHX 3081 SCALE ALARM 1785 69 1786 3081
128 AI11A HLT 1081 AI6 1752 01 1081 1942
129 AG2 49 0000 0000 1876 49 0000 0000
130 AJ1 48 0000 0000 1820 48 0000 0000
131 AJ2 00 0000 0001 1903 00 0000 0001
132 AJ3 00 0000 0059 1848 00 0000 0059
133 AJ4 10 0000 0000 1853 10 0000 0000
134 AJ5 50 0000 0000 1940 50 0000 0000
135 E00AQ STD J0001 AQ1 READ 1974 24 1977 1880
136 AQ1 RD1 1976 AQ3 1880 70 1976 1898
137 AQ3 RAM P0001 AQ3A 1898 67 1951 1806
138 AQ3B RAM P0001 AQ3A CHECK FOR 1892 67 1951 1806
139 AQ3A NZE AQ8 LAST WORD 1806 45 1860 1837
140 LDD AQ5 AQ4 ON CARD 1860 69 1863 1816
141 AQ4 STD ACC4 1816 24 1870 1873
142 AUP 8003 READ IN 1873 10 8003 1931
143 SRT 0004 LABEL FOR 1931 30 0004 1941
144 SIA ACC5 PRESENT 1941 23 1795 1948
145 SLO 8001 VARIABLE 1948 16 8001 1856
146 ALO 8002 GET I Y 0R C 1856 15 1809 8002
147 RAU 0000 ADDRESS FROM 1809 60 0000 1987 was RAU A000 - 00 0000 0000
146 AUP ACC5 ABCON DICT 1987 10 1795 1949
149 SLT 0004 ACC4 GENERATE 1949 35 0004 1870
150 AQ5 AUP AQ7 1NSTRUCTION 1863 10 1866 1857
151 ALO P0010 1857 15 1960 1965
152 ALO 8002 GET AND 1965 15 1968 8002
153 LDD P0002 8003 STORE WORD 1968 69 1952 8003
154 AQ7 STD 0000 1866 24 0000 1907
155 RAL P0010 INCREMENT 1907 65 1960 1915
156 ALO AQ9 WORD COUNT 1915 15 1918 1854
157 STL P0010 1854 20 1960 1963
158 ALO AQ3B 8002 1963 15 1892 8002
159 AQ8 RAL P0001 CHECK FOR 1837 65 1951 1765
160 BMI J0001 AQ1 LAST CARD 1765 46 1977 1880
161 E00AR STD P0005 PUNCH 0UT 1801 24 1955 1908
162 STU J0003 1908 21 1979 1935
163 SIA P0008 STORE STMNT 1935 23 1958 1912
164 STU J0004 NUMBER 1912 21 1980 1886
165 SDA P0004 STORE WORD 1886 22 1954 1909
166 SLO 8001 COUNT 1909 16 8001 1917
167 NZE AR10 AR9 TEST ZERO 1917 45 1920 1872
168 AR10 STU J0005 STMT NUMBER 1920 21 1981 1814
169 STD J0006 SET PUNCH 1814 24 1982 1972
170 STD J0007 BAND TO 1972 24 1983 1864
171 STD J0008 ZEROES 1864 24 1984 1888
172 STD P0010 AR3 SET COUNTER 1888 24 1960 1913
173 AR3 RAL P0004 1913 65 1954 1910
174 SLO AR7 1910 16 1924 1936
175 BMI AR8 TEST WORD 1936 46 1994 1992
176 STL P0004 AR4 COUNT 1992 20 1954 1865
177 AR4 ALO 8002 GET WORD 1865 15 1868 8002
178 RAL P0000 LABEL FROM 1868 65 1950 1914
179 AUP 8003 PUNCH CONSTS 1914 10 8003 1922
180 SLT 0001 1922 35 0001 1938
181 SDA P0007 MODIFY LABEL 1938 22 1957 1961
182 SLO 8001 1961 16 8001 1919
183 SRT 0001 1919 30 0001 1926
184 ALO P0007 1926 15 1957 1962
185 SLT 0004 INSERT STMNT 1962 35 0004 1923
186 ALO P0008 NUMBER 1923 15 1958 1964
187 AUP P0010 1964 10 1960 1916
188 AUP 8003 1916 10 1969 8003
189 STL J0001 STORE LABEL 1969 20 1977 1988
190 RAL 8002 FOR PUNCHING 1988 65 8002 1900
191 LDD AQ4 MODIFY LABEL 1900 69 1906 1816
192 AUP AR6 INTO DRUM 1906 10 1966 1934
193 ALO P0010 LOC IN READ 1934 15 1960 1967
194 ALO 8003 GET WORD 1967 15 1970 8003
195 STD J0002 STORE IN 1970 24 1978 1993
196 RAL P0010 PUNCH BAND 1993 65 1960 1815
197 ALO AQ9 1815 15 1918 1973
196 STL P0010 AR3 1973 20 1960 1913
199 AR6 LDD 0000 8002 1966 69 0000 8002
200 AR7 00 0001 0000 1924 00 0001 0000
201 AR8 PCH J0001 P0005 PUNCH 1994 71 1977 1955
202 AR9 RAL 8000 IF STMT NMBR 1872 65 8000 1937
203 BMI AR10 P0005 ZRO PCH ONLY 1937 46 1920 1955
204 AQ9 00 0002 0000 IF 8000 NEG 1918 00 0002 0000
205 J0010 80 0000 8800 CONTROL CNST 1986 80 0000 8800
206 E00AL STD ARTHY 1654 24 1808 1732
207 STL ARTHH 1732 20 1788 1694
208 RAL ACC AL17A IS POWER 1694 65 0000 1709
209 AL17A STD ACC4 TWO 1709 24 1870 1723
210 STD ARTHX IF SO 1723 24 1786 1739
211 SLO AL16 MULTIPLY 1739 16 1686 1692
212 NZE AL18 1692 45 1731 1751
213 RAL ARTHH 1751 65 1788 1645
214 STD ACC 1645 24 0000 1655
215 LDD ARTHY E00AJ 1655 69 1808 1832
216 AL18 RAL ARTHH AL17 1731 65 1788 1693
217 AL17 SLT 0008 1693 35 0008 1661
218 SLO 8002 1661 16 8002 1720
219 SLT 0002 Q EQUALS 1720 35 0002 1677
220 ALO 8001 MANTISSA 1677 15 8001 1690
221 STU ARTHF OF ARGUMENT 1690 21 1772 1675
222 RAM 8002 1675 67 8002 1683
223 SLO AL1 STORE EXPNNT 1683 16 1736 1691
224 SLT 0002 OF ARGMNT 1691 35 0002 1698
225 STU ARTHE 1698 21 1902 1706
226 RAL AL2 MANTISSA OF 1706 65 1660 1666
227 STL ARTHM Z IS ONE 1666 20 1824 1678
228 RAL AL1 1678 65 1736 1695
229 SLT 0002 EXP OF Z IS 1695 35 0002 1702
230 STU ARTHG AL3 50 1702 21 1794 1747
231 AL3 RAU ACC K IS GRTST 1747 60 0000 1708
232 MPY AL1 INTEGER IN 1708 19 1736 1738
233 STU ACC K OVER TWO 1738 21 0000 1658
234 RAL 8002 IS REMAINDER 1658 65 8002 1667
235 NZE AL4 ZER0 1667 45 1670 1646
236 RAU ARTHM IF NOT SET Z 1670 60 1824 1729
237 LDD AL5 EQUALS TO 1729 69 1682 1737
238 ALO ARTHG Z TIMES Q 1682 15 1794 1715
239 STL ARTHG VIA 1715 20 1794 1699
240 RAL ARTHD SUBROUTINE 1699 65 1665 1669
241 STL ARTHM 1669 20 1824 1638
242 NZE AL4 AL20 1638 45 1646 1741
243 AL4 RAU ACC IF K NONZERO 1646 60 0000 1712
244 NZU AL7 Q EQUALS 1712 44 1668 1721
245 RAU ARTHF 1668 60 1772 1679
246 LDD AL5 VIA SUBRTNE 1679 69 1684 1737
247 ALO ARTHE 1684 15 1902 1714
248 STL ARTHE 1714 20 1902 1662
249 RAL ARTHD 1662 65 1665 1719
250 STL ARTHF AL3 1719 20 1772 1747
251 AL7 RAU ARTHG SET EXPONNTS 1721 60 1794 1700
252 SRT 0002 ARTHS 1700 30 0002 1663
253 NZU AI11 EXP OVERSCAL 1663 44 1785 1722
254 STL ARTHE 1722 20 1902 1664
255 STU ARTHF 1664 21 1772 1671
256 RAU ARTHM 1671 60 1824 1680
257 SRT 0001 AL20 1680 30 0001 1741
258 AL20 LDD AL8 1741 69 1716 1724
259 STD ARTHX ARTHS 1724 24 1786 1762
260 AL8 RAL ACC4 1716 65 1870 1648
261 BMI AL10 1648 46 1701 1743
262 RAL ACC ARTHY 1743 65 0000 1808
263 AL10 RAL ACC Z EQUALS ONE 1701 65 0000 1672
264 NZE AL12 OVER Z IF 1672 45 1676 1681
265 RAL AL11 K NEG AND Z 1676 65 1685 1649
266 LDD ARTHY E00AG NON ZERO 1649 69 1808 1830
267 AL12 LDD ARTHY 3111 ALARM IF ZRO 1681 69 1808 3111
268 AL5 STD ARTHX 1737 24 1786 1652
269 MPY ARTHF 1652 19 1772 1673
270 SRT 0009 1673 30 0009 1644
271 NZU AL14 1644 44 1650 1639
272 STL ARTHD 1639 20 1665 1640
273 RAL 8003 AL15 1640 65 8003 1641
274 AL15 ALO ARTHE ARTHX 1641 15 1902 1786
275 AL14 SRT 0001 1650 30 0001 1643
276 STL ARTHD 1643 20 1665 1642
277 RAL AJ2 AL15 1642 65 1903 1641
278 AL1 50 0000 0000 1736 50 0000 0000
279 AL2 10 0000 0000 1660 10 0000 0000
280 AL11 10 0000 0050 1685 10 0000 0050
281 AL16 00 0000 0002 1686 00 0000 0002
282 AJ2 00 0000 0001 1903 00 0000 0001
283 E00AN STD ARTHY POWER 1651 24 1808 1687
284 LDD ACC FLOAT FIX 1687 69 0000 1674
285 STD ARTHH REVERSE 1674 24 1788 1745
286 STL ACC AL17A 1745 20 0000 1709
287 E00AK STD ARTHY POWER FIXFIX 1704 24 1808 1711
288 STL ARTHG AK1 Q IS ARGMNT 1711 20 1794 1647
289 AK1 RAM ACC K EQUALS 1647 67 0000 1705
290 STL ARTHF ABVAL POWER 1705 20 1772 1725
291 RAL AJ2 Z EQUALS 1725 65 1903 1707
292 STL ARTHH AK3 ONE 1707 20 1788 1718
293 AK3 RAU ARTHF K IS GTST 1718 60 1772 1727
294 MPY AK4 INTGR IN 1727 19 1730 1717
295 STU ARTHF K OVER TWO 1717 21 1772 1726
296 RAL 8002 IS REMAINDER 1726 65 8002 1735
297 NZE AK5 ZERO 1735 45 1734 1742
298 RAU ARTHH IF NOT Z IS 1734 60 1788 1688
299 MPY ARTHG Z TIMES Q 1688 19 1794 1733
300 STL ARTHH AK5 1733 20 1788 1742
301 AK5 RAU ARTHF 1742 60 1772 1728
302 NZU AK6 1S K ZERO 1728 44 1740 1746
303 RAU ARTHG IF NOT 1740 60 1794 1749
304 MPY 8001 Q EQUALS 1749 19 8001 1689
305 STL ARTHG AK3 Q SQUARED 1689 20 1794 1718
306 AK6 RAU ACC IS POWER NEG 1746 60 0000 1656
307 BMI AK7 IF SO IS Z 1656 46 1659 1713
308 RAM ARTHH ZERO 1659 67 1788 1744
309 NZE AK8 IF NOT IS Z 1744 45 1748 1750
310 SLO AJ2 ONE 1748 16 1903 1657
311 NZE AK10 AK7 1657 45 1710 1713
312 AK7 RAL ARTHH ARTHY EXHIBIT Z 1713 65 1788 1808
313 AK10 RAL 8003 ARTHY 1710 65 8003 1808
314 AK8 LDD ARTHY 3101 ALARM 1750 69 1808 3101
315 AK4 50 0000 0000 1730 50 0000 0000
316 AJ2 00 0000 0001 1903 00 0000 0001
317 E00AM STD ARTHY INTERCHGE 1653 24 1808 1696
318 LDD ACC ACC AND 1696 69 0000 1703
319 STD ARTHG LOWER 1703 24 1794 1697
320 STL ACC AK1 THEN E00AK 1697 20 0000 1647
321 1976 RAM 1951 1976 67 1951 1623
322 AUP 8003 1623 10 8003 1632
323 SLT 0004 1632 35 0004 1624
324 SDA P0009 1624 22 1959 1626
325 SRT 0004 1626 30 0004 1637
326 LDD AQ4 1637 69 1627 1816
327 RAL 8003 1627 65 8003 1636
328 AUP P0009 1636 10 1959 1633
329 ALO 8001 1633 15 8001 1631
330 AUP AQ9B 1631 10 1625 1628
331 ALO AQ10 AQ11 1628 15 1634 1622
332 AQ11 SUP AQ9B 1622 11 1625 1630
333 NZU AQ8 1630 44 1635 1837
334 AUP 8001 1635 10 8001 1621
335 SUP AR7 1621 11 1924 1629
336 SLO 8001 8003 1629 16 8001 8003
337 AQ9B LDD 1952 8002 1625 69 1952 8002
338 AQ10 STD 0000 AQ11 1634 24 0000 1622
1 VARS
ARTHX 00 0000 0000 1786 00 0000 0000
ARTHD 00 0000 0000 1665 00 0000 0000
ARTHG 00 0000 0000 1794 00 0000 0000
ARTHF 00 0000 0000 1772 00 0000 0000
ARTHE 00 0000 0000 1902 00 0000 0000
ARTHH 00 0000 0000 1788 00 0000 0000
ARTHM 00 0000 0000 1824 00 0000 0000
ARTHY 00 0000 0000 1808 00 0000 0000
ACC 00 0000 0000 0000 00 0000 0000
ACC1 00 0000 0000 1998 00 0000 0000
ACC2 00 0000 0000 1843 00 0000 0000
ACC3 00 0000 0000 1881 00 0000 0000
ACC4 00 0000 0000 1870 00 0000 0000
ACC5 00 0000 0000 1795 00 0000 0000
ACC6 00 0000 0000 1858 00 0000 0000
J0001 00 0000 0000 1977 00 0000 0000
J0002 00 0000 0000 1978 00 0000 0000
J0003 00 0000 0000 1979 00 0000 0000
J0004 00 0000 0000 1980 00 0000 0000
J0005 00 0000 0000 1981 00 0000 0000
J0006 00 0000 0000 1982 00 0000 0000
J0007 00 0000 0000 1983 00 0000 0000
J0008 00 0000 0000 1984 00 0000 0000
P0000 00 0000 0000 1950 00 0000 0000
P0001 00 0000 0000 1951 00 0000 0000
P0002 00 0000 0000 1952 00 0000 0000
P0004 00 0000 0000 1954 00 0000 0000
P0005 00 0000 0000 1955 00 0000 0000
P0007 00 0000 0000 1957 00 0000 0000
P0008 00 0000 0000 1958 00 0000 0000
P0009 00 0000 0000 1959 00 0000 0000
P0010 00 0000 0000 1960 00 0000 0000

377
I650/sw/it_package_p3.dck Normal file
View file

@ -0,0 +1,377 @@
6I1954195C 0000241833800?2417861789 e00aistdarthxai1 1-add
6I1954195C 0000241789800?2017941799 ai1 stlarthg 2-
6I1954195C 0000241799800?6918021805 ldd arthb 3-
6I1954195C 0000241802800?6780021767 ram 8002 4-store acc
6I1954195C 0000241767800?2017721894 stlarthf 5-power
6I1954195C 0000241894800?1819021759 smlarthe 6-
6I1954195C 0000241759800?3500011766 slt 0001 7-
6I1954195C 0000241766800?4417731771 nzuai12 8-find max
6I1954195C 0000241771800?6917741777 lddai3a 9-
6I1954195C 0000241777800?3000051790 srt 0005 10-power
6I1954195C 0000241790800?2217931796 sdaai3 11-set expnnts
6I1954195C 0000241796800?4618991754 bmi ai2 12-and then
6I1954195C 0000241899800?6719021817 ramarthe 13-perform
6I1954195C 0000241817800?2017721776 stlarthf 14-addition
6I1954195C 0000241776800?6517881943 ralarthh 15-
6I1954195C 0000241943800?6918241793 lddarthmai3 16-
6I1954195C 0000241793800?3000001811 ai3 srt 0000ai3b 17-
6I1954195C 0000241774800?3000001811 ai3a srt 0000ai3b 18-
6I1954195C 0000241811800?1580011770 ai3b alo 8001ai5 19-
6I1954195C 0000241754800?6518241779 ai2 ralarthm 20-
6I1954195C 0000241779800?6917881793 lddarthhai3 21-
6I1954195C 0000241770800?6080021780 ai5 rau 8002 22-clear arthe
6I1954195C 0000241780800?2019021762 stlarthearths 23-to scale
6I1954195C 0000241773800?4617781828 ai12 bmi ai13 24-
6I1954195C 0000241778800?6517941904 ralarthgai10 25-
6I1954195C 0000241828800?6500001786 ai13 ralacc arthx 26-
6I1954195C 0000241805800?2418081826 arthbstdarthy 27-break up exp
6I1954195C 0000241826800?3500081996 slt 0008 28-and mantissa
6I1954195C 0000241996800?2019021755 stlarthe 29-store power
6I1954195C 0000241755800?6080031763 rau 8003 30-and mantissa
6I1954195C 0000241763800?3500011769 slt 0001 31-of lower
6I1954195C 0000241769800?2118241997 stuarthm 32-
6I1954195C 0000241997800?6000001855 rauacc 33-
6I1954195C 0000241855800?3000021761 srt 0002 34-store power
6I1954195C 0000241761800?1680021819 slo 8002 35-and mantissa
6I1954195C 0000241819800?3500011775 slt 0001 36-of acc
6I1954195C 0000241775800?1580011783 alo 8001 37-
6I1954195C 0000241783800?2117881808 stuarthharthy 38-
6I1954195C 0000241762800?3600001782 arthssct 0000 39-normalize
6I1954195C 0000241782800?4719421787 bovai6 40-brnch if zro
6I1954195C 0000241787800?2017941797 stlarthg 41-shift count
6I1954195C 0000241797800?6580031905 ral 8003 42-round on
6I1954195C 0000241905800?3100021813 srd 0002 43-ninth digit
6I1954195C 0000241813800?3500021869 slt 0002 44-check for
6I1954195C 0000241869800?2018241877 stlarthm 45-roundoff
6I1954195C 0000241877800?4418311834 nzuai7 ai8 46-overflow
6I1954195C 0000241834800?6780031841 ai8 ram 8003 47-and
6I1954195C 0000241841800?1817941800 smlarthg 48-correct if
6I1954195C 0000241800800?1519031822 aloaj2 49-necessary
6I1954195C 0000241822800?3500081791 slt 0008 50-
6I1954195C 0000241791800?6580021849 ral 8002 51-
6I1954195C 0000241849800?1719021757 amlarthe 52-
6I1954195C 0000241757800?1517721827 aloarthf 53-
6I1954195C 0000241827800?4617521781 bmiai11a 54-pwr too smal
6I1954195C 0000241781800?4417851836 nzuai11 55-pwr too lrge
6I1954195C 0000241836800?3500021893 slt 0002 56-
6I1954195C 0000241893800?2119981901 stuacc1 57-
6I1954195C 0000241901800?6518241829 ralarthm 58-
6I1954195C 0000241829800?4619441995 bmi ai9 59-combine
6I1954195C 0000241944800?1619981904 sloacc1 ai10 60-
6I1954195C 0000241904800?2000001786 ai10 stlacc arthx 61-and
6I1954195C 0000241995800?1519981904 ai9 aloacc1 ai10 62-
6I1954195C 0000241831800?3000011792 ai7 srt 0001 63-adjust
6I1954195C 0000241792800?2018241927 stlarthm 64-
6I1954195C 0000241927800?3500011834 slt 0001ai8 65-
6I1954195C 0000241942800?6580031904 ai6 ral 8003ai10 66-
6I1954195C 0000241832800?2417861839 e00ajstdarthx 67-multiply
6I1954195C 0000241839800?6918521805 ldd arthb 68-
6I1954195C 0000241852800?6780021867 ram 8002 69-acc power
6I1954195C 0000241867800?1618201825 sloaj1 70-minus 48
6I1954195C 0000241825800?2017721875 stlarthf 71-
6I1954195C 0000241875800?6017881756 rauarthh 72-
6I1954195C 0000241756800?1918241762 mpyarthmarths 73-
6I1954195C 0000241830800?2417861889 e00agstdarthxag1 74-divide
6I1954195C 0000241889800?6918421805 ag1 ldd arthb 75-is divisor
6I1954195C 0000241842800?4418121846 nzu ag3 76-zer0
6I1954195C 0000241812800?6880021821 rsm 8002 77-divisor
6I1954195C 0000241821800?1518761895 aloag2 78-power minus
6I1954195C 0000241895800?2017721768 stlarthf 79-49
6I1954195C 0000241768800?6018241879 rauarthm 80-sh1ft
6I1954195C 0000241879800?3000011885 srt 0001 81-dividend
6I1954195C 0000241885800?6417881803 dvrarthh 82-do divide
6I1954195C 0000241803800?6080021762 rau 8002arths 83-
6I1954195C 0000241882800?2417861989 e00aostdarthx 84-div reverse
6I1954195C 0000241989800?2018431896 stlacc2 85-
6I1954195C 0000241896800?6500001810 ralacc 86-
6I1954195C 0000241810800?6918431897 lddacc2 87-
6I1954195C 0000241897800?2400001889 stdacc ag1 88-
6I1954195C 0000241947800?2418581911 e00afstdacc6 89-fl0at to lwr
6I1954195C 0000241911800?6919251928 lddae4 e00ae 90-and acc
6I1954195C 0000241925800?2000001858 ae4 stlacc acc6 91-
6I1954195C 0000241928800?2417861840 e00aestdarthx 92-float to lwr
6I1954195C 0000241840800?6080021753 rau 8002 93-only
6I1954195C 0000241753800?3600001975 sct 0000 94-normalize
6I1954195C 0000241975800?2018811784 stlacc3 95-
6I1954195C 0000241784800?4718511890 bovad1 96-zer0 check
6I1954195C 0000241890800?6580031798 ral 8003 97-
6I1954195C 0000241798800?3100021807 srd 0002 98-round for
6I1954195C 0000241807800?3500021764 slt 0002 99-placing exp
6I1954195C 0000241764800?4418181891 nzu ae6 100-check round
6I1954195C 0000241818800?6980031874 ldd 8003 101-overflow
6I1954195C 0000241874800?3000011884 srt 0001 102-
6I1954195C 0000241884800?1580011891 alo 8001ae6 103-
6I1954195C 0000241891800?4618441845 ae6 bmiae2 104-insert
6I1954195C 0000241845800?1518481804 aloaj3 ae5 105-exp0nent
6I1954195C 0000241844800?1618481804 ae2 sloaj3 ae5 106-
6I1954195C 0000241804800?1618811786 ae5 sloacc3 arthx 107-
6I1954195C 0000241932800?2417861990 e00thstdarthx 108-fix l0wer
6I1954195C 0000241990800?3500081859 slt 0008 109-to lower
6I1954195C 0000241859800?2118241878 stuarthm 110-
6I1954195C 0000241878800?6780021887 ram 8002 111-test exp
6I1954195C 0000241887800?1619401945 sloaj5 112-store zer0
6I1954195C 0000241945800?4618511850 bmiad1 113-if less than
6I1954195C 0000241850800?1618531758 sloaj4 114-50 alarm
6I1954195C 0000241758800?4618611862 bmi ad3 115-1f grtr than
6I1954195C 0000241861800?3000041921 srt 0004 116-59
6I1954195C 0000241921800?1519241929 aloar7 117-
6I1954195C 0000241929800?6918351838 lddad2a 118-modify
6I1954195C 0000241838800?2219911971 sdaad2 119-shift
6I1954195C 0000241971800?6518241930 ralarthm 120-
6I1954195C 0000241930800?3500021991 slt 0002ad2 121-
6I1954195C 0000241851800?6580031786 ad1 ral 8003arthx 122-store zero
6I1954195C 0000241991800?3000001786 ad2 srt 0000arthx 123-shift c0nst
6I1954195C 0000241835800?3000001786 ad2a srt 0000arthx 124-
6I1954195C 0000241862800?6917863031 ad3 lddarthx 3031 125-fix alarm
6I1954195C 0000241846800?6917863061 ag3 lddarthx 3061 126-divide alarm
6I1954195C 0000241785800?6917863081 ai11 lddarthx 3081 127-scale alarm
6I1954195C 0000241752800?0110811942 ai11ahlt 1081ai6 128-
6I1954195C 0000241876800?4900000000 ag2 49 0000 0000 129-
6I1954195C 0000241820800?4800000000 aj1 48 0000 0000 130-
6I1954195C 0000241903800?0000000001 aj2 00 0000 0001 131-
6I1954195C 0000241848800?0000000059 aj3 00 0000 0059 132-
6I1954195C 0000241853800?1000000000 aj4 10 0000 0000 133-
6I1954195C 0000241940800?5000000000 aj5 50 0000 0000 134-
6I1954195C 0000241974800?2419771880 e00aqstdj0001aq1 135-read
6I1954195C 0000241880800?7019761898 aq1 rd1 1976aq3 136-
6I1954195C 0000241898800?6719511806 aq3 ramp0001aq3a 137-
6I1954195C 0000241892800?6719511806 aq3b ramp0001aq3a 138-check for
6I1954195C 0000241806800?4518601837 aq3a nze aq8 139-last word
6I1954195C 0000241860800?6918631816 lddaq5 aq4 140-on card
6I1954195C 0000241816800?2418701873 aq4 stdacc4 141-
6I1954195C 0000241873800?1080031931 aup 8003 142-read in
6I1954195C 0000241931800?3000041941 srt 0004 143-label for
6I1954195C 0000241941800?2317951948 siaacc5 144-present
6I1954195C 0000241948800?1680011856 slo 8001 145-variable
6I1954195C 0000241856800?1518098002 alo 8002 146-get i y 0r c
6I1954195C 0000241809800?6000001987 rau 0000 147-address from
6I1954195C 0000241987800?1017951949 aupacc5 146-abcon dict
6I1954195C 0000241949800?3500041870 slt 0004acc4 149-generate
6I1954195C 0000241863800?1018661857 aq5 aupaq7 150-1nstruction
6I1954195C 0000241857800?1519601965 alop0010 151-
6I1954195C 0000241965800?1519688002 alo 8002 152-get and
6I1954195C 0000241968800?6919528003 lddp0002 8003 153-store word
6I1954195C 0000241866800?2400001907 aq7 std 0000 154-
6I1954195C 0000241907800?6519601915 ralp0010 155-increment
6I1954195C 0000241915800?1519181854 aloaq9 156-word count
6I1954195C 0000241854800?2019601963 stlp0010 157-
6I1954195C 0000241963800?1518928002 aloaq3b 8002 158-
6I1954195C 0000241837800?6519511765 aq8 ralp0001 159-check for
6I1954195C 0000241765800?4619771880 bmij0001aq1 160-last card
6I1954195C 0000241801800?2419551908 e00arstdp0005 161-punch 0ut
6I1954195C 0000241908800?2119791935 stuj0003 162-
6I1954195C 0000241935800?2319581912 siap0008 163-store stmnt
6I1954195C 0000241912800?2119801886 stuj0004 164-number
6I1954195C 0000241886800?2219541909 sdap0004 165-store word
6I1954195C 0000241909800?1680011917 slo 8001 166-count
6I1954195C 0000241917800?4519201872 nzear10 ar9 167-test zero
6I1954195C 0000241920800?2119811814 ar10 stuj0005 168-stmt number
6I1954195C 0000241814800?2419821972 stdj0006 169-set punch
6I1954195C 0000241972800?2419831864 stdj0007 170-band to
6I1954195C 0000241864800?2419841888 stdj0008 171-zeroes
6I1954195C 0000241888800?2419601913 stdp0010ar3 172-set counter
6I1954195C 0000241913800?6519541910 ar3 ralp0004 173-
6I1954195C 0000241910800?1619241936 sloar7 174-
6I1954195C 0000241936800?4619941992 bmiar8 175-test word
6I1954195C 0000241992800?2019541865 stlp0004ar4 176-count
6I1954195C 0000241865800?1518688002 ar4 alo 8002 177-get word
6I1954195C 0000241868800?6519501914 ralp0000 178-label from
6I1954195C 0000241914800?1080031922 aup 8003 179-punch consts
6I1954195C 0000241922800?3500011938 slt 0001 180-
6I1954195C 0000241938800?2219571961 sdap0007 181-modify label
6I1954195C 0000241961800?1680011919 slo 8001 182-
6I1954195C 0000241919800?3000011926 srt 0001 183-
6I1954195C 0000241926800?1519571962 alop0007 184-
6I1954195C 0000241962800?3500041923 slt 0004 185-insert stmnt
6I1954195C 0000241923800?1519581964 alop0008 186-number
6I1954195C 0000241964800?1019601916 aupp0010 187-
6I1954195C 0000241916800?1019698003 aup 8003 188-
6I1954195C 0000241969800?2019771988 stlj0001 189-store label
6I1954195C 0000241988800?6580021900 ral 8002 190-for punching
6I1954195C 0000241900800?6919061816 ldd aq4 191-modify label
6I1954195C 0000241906800?1019661934 aupar6 192-into drum
6I1954195C 0000241934800?1519601967 alop0010 193-loc in read
6I1954195C 0000241967800?1519708003 alo 8003 194-get word
6I1954195C 0000241970800?2419781993 stdj0002 195-store in
6I1954195C 0000241993800?6519601815 ralp0010 196-punch band
6I1954195C 0000241815800?1519181973 aloaq9 197-
6I1954195C 0000241973800?2019601913 stlp0010ar3 196-
6I1954195C 0000241966800?6900008002 ar6 ldd 0000 8002 199-
6I1954195C 0000241924800?0000010000 ar7 00 0001 0000 200-
6I1954195C 0000241994800?7119771955 ar8 pchj0001p0005 201-punch
6I1954195C 0000241872800?6580001937 ar9 ral 8000 202-if stmt nmbr
6I1954195C 0000241937800?4619201955 bmiar10 p0005 203-zro pch only
6I1954195C 0000241918800?0000020000 aq9 00 0002 0000 204-if 8000 neg
6I1954195C 0000241986800?8000008800 j0010 80 0000 8800 205-control cnst
6I1954195C 0000241976800?6719511744 1976ram 1951 206-read
6I1954195C 0000241744800?1080031741 aup 8003 207-up to
6I1954195C 0000241741800?3500041748 slt 0004 208-seven
6I1954195C 0000241748800?2219591737 sdap0009 209-contiguous
6I1954195C 0000241737800?3000041746 srt 0004 210-variables
6I1954195C 0000241746800?6917501816 ldd aq4 211-per card
6I1954195C 0000241750800?6580031749 ral 8003 212-
6I1954195C 0000241749800?1019591740 aupp0009 213-
6I1954195C 0000241740800?1580011751 alo 8001 214-
6I1954195C 0000241751800?1017381742 aupaq9b 215-
6I1954195C 0000241742800?1517451735 aloaq10 aq11 216-
6I1954195C 0000241735800?1117381743 aq11 supaq9b 217-
6I1954195C 0000241743800?4417471837 nzu aq8 218-
6I1954195C 0000241747800?1080011736 aup 8001 219-
6I1954195C 0000241736800?1119241739 supar7 220-
6I1954195C 0000241739800?1680018003 slo 8001 8003 221-
6I1954195C 0000241738800?6919528002 aq9b ldd 1952 8002 222-
6I1954195C 0000241745800?2400001735 aq10 std 0000aq11 223-
6I1954195C 0000241705800?2418581711 e00acstdacc6 224-exponential
6I1954195C 0000241711800?4517151710 nze ac5 225-is argument
6I1954195C 0000241715800?3500081683 slt 0008 226-zero
6I1954195C 0000241683800?2117881692 stuarthh 227-if not let
6I1954195C 0000241692800?6880021701 rsm 8002 228-n be mantsa
6I1954195C 0000241701800?1517041709 aloac3 229-x be power
6I1954195C 0000241709800?4616631713 bmiac4 230-1s x grtr
6I1954195C 0000241713800?3500011719 slt 0001 231-than two
6I1954195C 0000241719800?4417101724 nzuac5 232-or less than
6I1954195C 0000241724800?3000051687 srt 0005 233-minus eight
6I1954195C 0000241687800?1516901695 aloac6 234-if x within
6I1954195C 0000241695800?2016651718 stlarthd 235-bounds gen
6I1954195C 0000241718800?6017881693 rauarthh 236-int and
6I1954195C 0000241693800?3000061665 srt 0006arthd 237-fract parts
6I1954195C 0000241704800?5100000000 ac3 51 0000 0000 238-of argument
6I1954195C 0000241690800?3000001684 ac6 srt 0000 239-is arg neg
6I1954195C 0000241684800?4616891702 bmiac8 240-if so int is
6I1954195C 0000241702800?2116651685 stuarthdac1 241-int minus 1
6I1954195C 0000241689800?1119031707 ac8 supaj2 242-and fract is
6I1954195C 0000241707800?2116651668 stuarthd 243-fract plus 1
6I1954195C 0000241668800?6580021677 ral 8002 244-
6I1954195C 0000241677800?1516801685 aloac2 ac1 245-
6I1954195C 0000241680800?9999999999 ac2 99 9999 9999 246-
6I1954195C 0000241685800?2017881694 ac1 stlarthh 247-
6I1954195C 0000241694800?6080021703 rau 8002 248-
6I1954195C 0000241703800?1917061708 mpyac18 249-generate
6I1954195C 0000241708800?6080031716 rau 8003 250-
6I1954195C 0000241716800?1017201686 aupac17 251-polynomial
6I1954195C 0000241686800?1917881691 mpyarthh 252-
6I1954195C 0000241691800?6080031661 rau 8003 253-approxim
6I1954195C 0000241661800?1016661682 aupac16 254-ation
6I1954195C 0000241682800?1917881696 mpyarthh 255-
6I1954195C 0000241696800?6080031712 rau 8003 256-for
6I1954195C 0000241712800?1017171678 aupac15 257-
6I1954195C 0000241678800?1917881650 mpyarthh 258-exponential
6I1954195C 0000241650800?6080031714 rau 8003 259-
6I1954195C 0000241714800?1016671679 aupac14 260-
6I1954195C 0000241679800?1917881698 mpyarthh 261-
6I1954195C 0000241698800?6080031655 rau 8003 262-
6I1954195C 0000241655800?1016601676 aupac13 263-
6I1954195C 0000241676800?1917881652 mpyarthh 264-
6I1954195C 0000241652800?6080031659 rau 8003 265-
6I1954195C 0000241659800?1016641672 aupac12 266-
6I1954195C 0000241672800?1917881673 mpyarthh 267-square
6I1954195C 0000241673800?6080031700 rau 8003 268-result
6I1954195C 0000241700800?1018531671 aupaj4 269-scale and
6I1954195C 0000241671800?1980031657 mpy 8003 270-float then
6I1954195C 0000241657800?3000011688 srt 0001 271-exit
6I1954195C 0000241688800?2118431697 stuacc2 272-
6I1954195C 0000241697800?6016511656 rauac19 273-
6I1954195C 0000241656800?1016651933 auparthd 274-
6I1954195C 0000241933800?4618581669 bmiacc6 a274-
6I1954195C 0000241669800?3000021675 srt 0002 275-
6I1954195C 0000241675800?4416741681 nzuac21 276-
6I1954195C 0000241681800?1018431699 aupacc2 277-
6I1954195C 0000241699800?3000081858 srt 0008acc6 278-
6I1954195C 0000241663800?6517881653 ac4 ralarthh 279-
6I1954195C 0000241653800?4616251674 bmi ac21 280-
6I1954195C 0000241625800?6580031858 ral 8003acc6 281-
6I1954195C 0000241710800?6516271858 ac5 ralac20 acc6 282-argmnt zero
6I1954195C 0000241674800?6918583021 ac21 lddacc6 3021 283-alarm stop
6I1954195C 0000241664800?1151292776 ac12 11 5129 2776 286-
6I1954195C 0000241660800?0662730884 ac13 06 6273 0884 287-
6I1954195C 0000241667800?0254393575 ac14 02 5439 3575 288-
6I1954195C 0000241717800?0072951737 ac15 00 7295 1737 289-
6I1954195C 0000241666800?0017421120 ac16 00 1742 1120 290-
6I1954195C 0000241720800?0002554918 ac17 00 0255 4918 291-
6I1954195C 0000241706800?0000932643 ac18 00 0093 2643 292-
6I1954195C 0000241651800?0000000050 ac19 00 0000 0050 293-
6I1954195C 0000241627800?1000000050 ac20 10 0000 0050 294-
6I1954195C 0000241638800?4516621632 e00abnze ab10 295-is arg zero
6I1954195C 0000241662800?2416651670 stdarthd 296-
6I1954195C 0000241670800?4616321624 bmiab10 297-is arg neg
6I1954195C 0000241624800?3500081643 slt 0008 298-
6I1954195C 0000241643800?2019021658 stlarthe 299-store power
6I1954195C 0000241658800?6080031615 rau 8003 300-form z
6I1954195C 0000241615800?1016181623 aupab1 301-equal arg
6I1954195C 0000241623800?2118811635 stuacc3 302-minus root
6I1954195C 0000241635800?1117231728 supab2 303-ten over arg
6I1954195C 0000241728800?6418811731 dvracc3 304-plus root
6I1954195C 0000241731800?2017861639 stlarthx 305-ten
6I1954195C 0000241639800?6080021647 rau 8002 306-
6I1954195C 0000241647800?1980011721 mpy 8001 307-z square
6I1954195C 0000241721800?2118811636 stuacc3 308-
6I1954195C 0000241636800?6080031644 rau 8003 309-generate
6I1954195C 0000241644800?1916481654 mpyab7 310-
6I1954195C 0000241654800?6080031614 rau 8003 311-polynomial
6I1954195C 0000241614800?1016171726 aupab6 312-
6I1954195C 0000241726800?1918811730 mpyacc3 313-approximatn
6I1954195C 0000241730800?6080031640 rau 8003 314-
6I1954195C 0000241640800?1016491727 aupab5 315-
6I1954195C 0000241727800?1918811613 mpyacc3 316-
6I1954195C 0000241613800?6080031616 rau 8003 317-
6I1954195C 0000241616800?1016191628 aupab4 318-
6I1954195C 0000241628800?1918811633 mpyacc3 319-
6I1954195C 0000241633800?6080031641 rau 8003 320-
6I1954195C 0000241641800?1016451733 aupab3 321-
6I1954195C 0000241733800?1917861722 mpyarthx 322-
6I1954195C 0000241722800?6580031729 ral 8003 323-
6I1954195C 0000241729800?1517321637 aloab8 324-
6I1954195C 0000241637800?3000021646 srt 0002 325-
6I1954195C 0000241646800?1519021725 aloarthe 326-add power
6I1954195C 0000241725800?1617321642 sloab8 327-
6I1954195C 0000241642800?3100021620 srd 0002 328-round
6I1954195C 0000241620800?6080021734 rau 8002 329-
6I1954195C 0000241734800?3600001621 sct 0000 330-normalize
6I1954195C 0000241621800?4716311626 bovab12 331-
6I1954195C 0000241626800?4616291630 bmi ab13 332-
6I1954195C 0000241629800?1116341622 supab9 ab11 333-adjust
6I1954195C 0000241622800?1180021631 ab11 sup 8002ab12 334-power
6I1954195C 0000241631800?6580031665 ab12 ral 8003arthd 335-
6I1954195C 0000241630800?1016341622 ab13 aupab9 ab11 336-
6I1954195C 0000241632800?6916653011 ab10 lddarthd 3011 337-alarm
6I1954195C 0000241618800?0031622780 ab1 00 3162 2780 338-
6I1954195C 0000241723800?0063245560 ab2 00 6324 5560 339-
6I1954195C 0000241645800?8685917180 ab3 86 8591 7180 340-
6I1954195C 0000241619800?2893355240 ab4 28 9335 5240 341-
6I1954195C 0000241649800?1775220710 ab5 17 7522 0710 342-
6I1954195C 0000241617800?0943764760 ab6 09 4376 4760 343-
6I1954195C 0000241648800?1913377140 ab7 19 1337 7140 344-
6I1954195C 0000241732800?5000000000 ab8 50 0000 0000 345-
6I1954195C 0000241634800?0000000053 ab9 00 0000 0053 346-
6I1954195C 0000241665800?0000000000 arthd 00 0000 0000 -
6I1954195C 0000241786800?0000000000 arthx 00 0000 0000 -
6I1954195C 0000241794800?0000000000 arthg 00 0000 0000 -
6I1954195C 0000241772800?0000000000 arthf 00 0000 0000 -
6I1954195C 0000241902800?0000000000 arthe 00 0000 0000 -
6I1954195C 0000241788800?0000000000 arthh 00 0000 0000 -
6I1954195C 0000241824800?0000000000 arthm 00 0000 0000 -
6I1954195C 0000241808800?0000000000 arthy 00 0000 0000 -
6I1954195C 0000240000800?0000000000 acc 00 0000 0000 -
6I1954195C 0000241998800?0000000000 acc1 00 0000 0000 -
6I1954195C 0000241843800?0000000000 acc2 00 0000 0000 -
6I1954195C 0000241881800?0000000000 acc3 00 0000 0000 -
6I1954195C 0000241870800?0000000000 acc4 00 0000 0000 -
6I1954195C 0000241795800?0000000000 acc5 00 0000 0000 -
6I1954195C 0000241858800?0000000000 acc6 00 0000 0000 -
6I1954195C 0000241977800?0000000000 j0001 00 0000 0000 -
6I1954195C 0000241978800?0000000000 j0002 00 0000 0000 -
6I1954195C 0000241979800?0000000000 j0003 00 0000 0000 -
6I1954195C 0000241980800?0000000000 j0004 00 0000 0000 -
6I1954195C 0000241981800?0000000000 j0005 00 0000 0000 -
6I1954195C 0000241982800?0000000000 j0006 00 0000 0000 -
6I1954195C 0000241983800?0000000000 j0007 00 0000 0000 -
6I1954195C 0000241984800?0000000000 j0008 00 0000 0000 -
6I1954195C 0000241950800?0000000000 p0000 00 0000 0000 -
6I1954195C 0000241951800?0000000000 p0001 00 0000 0000 -
6I1954195C 0000241952800?0000000000 p0002 00 0000 0000 -
6I1954195C 0000241954800?0000000000 p0004 00 0000 0000 -
6I1954195C 0000241955800?0000000000 p0005 00 0000 0000 -
6I1954195C 0000241957800?0000000000 p0007 00 0000 0000 -
6I1954195C 0000241958800?0000000000 p0008 00 0000 0000 -
6I1954195C 0000241959800?0000000000 p0009 00 0000 0000 -
6I1954195C 0000241960800?0000000000 p0010 00 0000 0000 -

386
I650/sw/it_package_p3_listing.txt Normal file
View file

@ -0,0 +1,386 @@
5 PACKAGE 3
5 CONTAINS PACKAGE 1
5 PLUS THE FOLLOWING
5 ROUTINES
5 E00AC EXPONENTIAL SUBROUTINE
5 E00A8 L0G SUBROUTINE
1 E00AI STD ARTHX AI1 ADD 1833 24 1786 1789
2 AI1 STL ARTHG 1789 20 1794 1799
3 LDD ARTHB 1799 69 1802 1805
4 RAM 8002 STORE ACC 1802 67 8002 1767
5 STL ARTHF POWER 1767 20 1772 1894
6 SML ARTHE 1894 18 1902 1759
7 SLT 0001 1759 35 0001 1766
8 NZU AI12 FIND MAX 1766 44 1773 1771
9 LDD AI3A 1771 69 1774 1777
10 SRT 0005 POWER 1777 30 0005 1790
11 SDA AI3 SET EXPNNTS 1790 22 1793 1796
12 BMI AI2 AND THEN 1796 46 1899 1754
13 RAM ARTHE PERFORM 1899 67 1902 1817
14 STL ARTHF ADDITION 1817 20 1772 1776
15 RAL ARTHH 1776 65 1788 1943
16 LDD ARTHM AI3 1943 69 1824 1793
17 AI3 SRT 0000 AI3B 1793 30 0000 1811
18 AI3A SRT 0000 AI3B 1774 30 0000 1811
19 AI3B ALO 8001 AI5 1811 15 8001 1770
20 AI2 RAL ARTHM 1754 65 1824 1779
21 LDD ARTHH AI3 1779 69 1788 1793
22 AI5 RAU 8002 CLEAR ARTHE 1770 60 8002 1780
23 STL ARTHE ARTHS TO SCALE 1780 20 1902 1762
24 AI12 BMI AI13 1773 46 1778 1828
25 RAL ARTHG AI10 1778 65 1794 1904
26 AI13 RAL ACC ARTHX 1828 65 0000 1786
27 ARTHB STD ARTHY BREAK UP EXP 1805 24 1808 1826
28 SLT 0008 AND MANTISSA 1826 35 0008 1996
29 STL ARTHE STORE POWER 1996 20 1902 1755
30 RAU 8003 AND MANTISSA 1755 60 8003 1763
31 SLT 0001 OF LOWER 1763 35 0001 1769
32 STU ARTHM 1769 21 1824 1997
33 RAU ACC 1997 60 0000 1855
34 SRT 0002 STORE POWER 1855 30 0002 1761
35 SLO 8002 AND MANTISSA 1761 16 8002 1819
36 SLT 0001 OF ACC 1819 35 0001 1775
37 ALO 8001 1775 15 8001 1783
38 STU ARTHH ARTHY 1783 21 1788 1808
39 ARTHS SCT 0000 NORMALIZE 1762 36 0000 1782
40 BOV AI6 BRNCH IF ZRO 1782 47 1942 1787
41 STL ARTHG SHIFT COUNT 1787 20 1794 1797
42 RAL 8003 ROUND ON 1797 65 8003 1905
43 SRD 0002 NINTH DIGIT 1905 31 0002 1813
44 SLT 0002 CHECK FOR 1813 35 0002 1869
45 STL ARTHM ROUNDOFF 1869 20 1824 1877
46 NZU AI7 AI8 OVERFLOW 1877 44 1831 1834
47 AI8 RAM 8003 AND 1834 67 8003 1841
48 SML ARTHG CORRECT IF 1841 18 1794 1800
49 ALO AJ2 NECESSARY 1800 15 1903 1822
50 SLT 0008 1822 35 0008 1791
51 RAL 8002 1791 65 8002 1849
52 AML ARTHE 1849 17 1902 1757
53 ALO ARTHF 1757 15 1772 1827
54 BMI AI11A PWR TOO SMAL 1827 46 1752 1781
55 NZU AI11 PWR TOO LRGE 1781 44 1785 1836
56 SLT 0002 1836 35 0002 1893
57 STU ACC1 1893 21 1998 1901
58 RAL ARTHM 1901 65 1824 1829
59 BMI AI9 COMBINE 1829 46 1944 1995
60 SLO ACC1 AI10 1944 16 1998 1904
61 AI10 STL ACC ARTHX AND 1904 20 0000 1786
62 AI9 ALO ACC1 AI10 1995 15 1998 1904
63 AI7 SRT 0001 ADJUST 1831 30 0001 1792
64 STL ARTHM 1792 20 1824 1927
65 SLT 0001 AI8 1927 35 0001 1834
66 AI6 RAL 8003 AI10 1942 65 8003 1904
67 E00AJ STD ARTHX MULTIPLY 1832 24 1786 1839
68 LDD ARTHB 1839 69 1852 1805
69 RAM 8002 ACC POWER 1852 67 8002 1867
70 SLO AJ1 MINUS 48 1867 16 1820 1825
71 STL ARTHF 1825 20 1772 1875
72 RAU ARTHH 1875 60 1788 1756
73 MPY ARTHM ARTHS 1756 19 1824 1762
74 E00AG STD ARTHX AG1 DIVIDE 1830 24 1786 1889
75 AG1 LDD ARTHB IS DIVISOR 1889 69 1842 1805
76 NZU AG3 ZER0 1842 44 1812 1846
77 RSM 8002 DIVISOR 1812 68 8002 1821
78 ALO AG2 POWER MINUS 1821 15 1876 1895
79 STL ARTHF 49 1895 20 1772 1768
80 RAU ARTHM SH1FT 1768 60 1824 1879
81 SRT 0001 DIVIDEND 1879 30 0001 1885
82 DVR ARTHH DO DIVIDE 1885 64 1788 1803
83 RAU 8002 ARTHS 1803 60 8002 1762
84 E00AO STD ARTHX DIV REVERSE 1882 24 1786 1989
85 STL ACC2 1989 20 1843 1896
86 RAL ACC 1896 65 0000 1810
87 LDD ACC2 1810 69 1843 1897
88 STD ACC AG1 1897 24 0000 1889
89 E00AF STD ACC6 FL0AT TO LWR 1947 24 1858 1911
90 LDD AE4 E00AE AND ACC 1911 69 1925 1928
91 AE4 STL ACC ACC6 1925 20 0000 1858
92 E00AE STD ARTHX FLOAT TO LWR 1928 24 1786 1840
93 RAU 8002 ONLY 1840 60 8002 1753
94 SCT 0000 NORMALIZE 1753 36 0000 1975
95 STL ACC3 1975 20 1881 1784
96 BOV AD1 ZER0 CHECK 1784 47 1851 1890
97 RAL 8003 1890 65 8003 1798
98 SRD 0002 ROUND FOR 1798 31 0002 1807
99 SLT 0002 PLACING EXP 1807 35 0002 1764
100 NZU AE6 CHECK ROUND 1764 44 1818 1891
101 LDD 8003 OVERFLOW 1818 69 8003 1874
102 SRT 0001 1874 30 0001 1884
103 ALO 8001 AE6 1884 15 8001 1891
104 AE6 BMI AE2 INSERT 1891 46 1844 1845
105 ALO AJ3 AE5 EXP0NENT 1845 15 1848 1804
106 AE2 SLO AJ3 AE5 1844 16 1848 1804
107 AE5 SLO ACC3 ARTHX 1804 16 1881 1786
108 E00TH STD ARTHX FIX L0WER 1932 24 1786 1990
109 SLT 0008 TO LOWER 1990 35 0008 1859
110 STU ARTHM 1859 21 1824 1878
111 RAM 8002 TEST EXP 1878 67 8002 1887
112 SLO AJ5 STORE ZER0 1887 16 1940 1945
113 BMI AD1 IF LESS THAN 1945 46 1851 1850
114 SLO AJ4 50 ALARM 1850 16 1853 1758
115 BMI AD3 1F GRTR THAN 1758 46 1861 1862
116 SRT 0004 59 1861 30 0004 1921
117 ALO AR7 1921 15 1924 1929
118 LDD AD2A MODIFY 1929 69 1835 1838
119 SDA AD2 SHIFT 1838 22 1991 1971
120 RAL ARTHM 1971 65 1824 1930
121 SLT 0002 AD2 1930 35 0002 1991
122 AD1 RAL 8003 ARTHX STORE ZERO 1851 65 8003 1786
123 AD2 SRT 0000 ARTHX SHIFT C0NST 1991 30 0000 1786
124 AD2A SRT 0000 ARTHX 1835 30 0000 1786
125 AD3 LDD ARTHX 3031 FIX ALARM 1862 69 1786 3031
126 AG3 LDD ARTHX 3061 DIVIDE ALARM 1846 69 1786 3061
127 AI11 LDD ARTHX 3081 SCALE ALARM 1785 69 1786 3081
128 AI11A HLT 1081 AI6 1752 01 1081 1942
129 AG2 49 0000 0000 1876 49 0000 0000
130 AJ1 48 0000 0000 1820 48 0000 0000
131 AJ2 00 0000 0001 1903 00 0000 0001
132 AJ3 00 0000 0059 1848 00 0000 0059
133 AJ4 10 0000 0000 1853 10 0000 0000
134 AJ5 50 0000 0000 1940 50 0000 0000
135 E00AQ STD J0001 AQ1 READ 1974 24 1977 1880
136 AQ1 RD1 1976 AQ3 1880 70 1976 1898
137 AQ3 RAM P0001 AQ3A 1898 67 1951 1806
138 AQ3B RAM P0001 AQ3A CHECK FOR 1892 67 1951 1806
139 AQ3A NZE AQ8 LAST WORD 1806 45 1860 1837
140 LDD AQ5 AQ4 ON CARD 1860 69 1863 1816
141 AQ4 STD ACC4 1816 24 1870 1873
142 AUP 8003 READ IN 1873 10 8003 1931
143 SRT 0004 LABEL FOR 1931 30 0004 1941
144 SIA ACC5 PRESENT 1941 23 1795 1948
145 SLO 8001 VARIABLE 1948 16 8001 1856
146 ALO 8002 GET I Y 0R C 1856 15 1809 8002
147 RAU 0000 ADDRESS FROM 1809 60 0000 1987 was RAU A000 - 00 0000 0000
146 AUP ACC5 ABCON DICT 1987 10 1795 1949
149 SLT 0004 ACC4 GENERATE 1949 35 0004 1870
150 AQ5 AUP AQ7 1NSTRUCTION 1863 10 1866 1857
151 ALO P0010 1857 15 1960 1965
152 ALO 8002 GET AND 1965 15 1968 8002
153 LDD P0002 8003 STORE WORD 1968 69 1952 8003
154 AQ7 STD 0000 1866 24 0000 1907
155 RAL P0010 INCREMENT 1907 65 1960 1915
156 ALO AQ9 WORD COUNT 1915 15 1918 1854
157 STL P0010 1854 20 1960 1963
158 ALO AQ3B 8002 1963 15 1892 8002
159 AQ8 RAL P0001 CHECK FOR 1837 65 1951 1765
160 BMI J0001 AQ1 LAST CARD 1765 46 1977 1880
161 E00AR STD P0005 PUNCH 0UT 1801 24 1955 1908
162 STU J0003 1908 21 1979 1935
163 SIA P0008 STORE STMNT 1935 23 1958 1912
164 STU J0004 NUMBER 1912 21 1980 1886
165 SDA P0004 STORE WORD 1886 22 1954 1909
166 SLO 8001 COUNT 1909 16 8001 1917
167 NZE AR10 AR9 TEST ZERO 1917 45 1920 1872
168 AR10 STU J0005 STMT NUMBER 1920 21 1981 1814
169 STD J0006 SET PUNCH 1814 24 1982 1972
170 STD J0007 BAND TO 1972 24 1983 1864
171 STD J0008 ZEROES 1864 24 1984 1888
172 STD P0010 AR3 SET COUNTER 1888 24 1960 1913
173 AR3 RAL P0004 1913 65 1954 1910
174 SLO AR7 1910 16 1924 1936
175 BMI AR8 TEST WORD 1936 46 1994 1992
176 STL P0004 AR4 COUNT 1992 20 1954 1865
177 AR4 ALO 8002 GET WORD 1865 15 1868 8002
178 RAL P0000 LABEL FROM 1868 65 1950 1914
179 AUP 8003 PUNCH CONSTS 1914 10 8003 1922
180 SLT 0001 1922 35 0001 1938
181 SDA P0007 MODIFY LABEL 1938 22 1957 1961
182 SLO 8001 1961 16 8001 1919
183 SRT 0001 1919 30 0001 1926
184 ALO P0007 1926 15 1957 1962
185 SLT 0004 INSERT STMNT 1962 35 0004 1923
186 ALO P0008 NUMBER 1923 15 1958 1964
187 AUP P0010 1964 10 1960 1916
188 AUP 8003 1916 10 1969 8003
189 STL J0001 STORE LABEL 1969 20 1977 1988
190 RAL 8002 FOR PUNCHING 1988 65 8002 1900
191 LDD AQ4 MODIFY LABEL 1900 69 1906 1816
192 AUP AR6 INTO DRUM 1906 10 1966 1934
193 ALO P0010 LOC IN READ 1934 15 1960 1967
194 ALO 8003 GET WORD 1967 15 1970 8003
195 STD J0002 STORE IN 1970 24 1978 1993
196 RAL P0010 PUNCH BAND 1993 65 1960 1815
197 ALO AQ9 1815 15 1918 1973
196 STL P0010 AR3 1973 20 1960 1913
199 AR6 LDD 0000 8002 1966 69 0000 8002
200 AR7 00 0001 0000 1924 00 0001 0000
201 AR8 PCH J0001 P0005 PUNCH 1994 71 1977 1955
202 AR9 RAL 8000 IF STMT NMBR 1872 65 8000 1937
203 BMI AR10 P0005 ZRO PCH ONLY 1937 46 1920 1955
204 AQ9 00 0002 0000 IF 8000 NEG 1918 00 0002 0000
205 J0010 80 0000 8800 CONTROL CNST 1986 80 0000 8800
206 1976 RAM 1951 READ 1976 67 1951 1744
207 AUP 8003 UP TO 1744 10 8003 1741
208 SLT 0004 SEVEN 1741 35 0004 1748
209 SDA P0009 CONTIGUOUS 1748 22 1959 1737
210 SRT 0004 VARIABLES 1737 30 0004 1746
211 LDD AQ4 PER CARD 1746 69 1750 1816
212 RAL 8003 1750 65 8003 1749
213 AUP P0009 1749 10 1959 1740
214 ALO 8001 1740 15 8001 1751
215 AUP AQ9B 1751 10 1738 1742
216 ALO AQ10 AQ11 1742 15 1745 1735
217 AQ11 SUP AQ9B 1735 11 1738 1743
218 NZU AQ8 1743 44 1747 1837
219 AUP 8001 1747 10 8001 1736
220 SUP AR7 1736 11 1924 1739
221 SLO 8001 8003 1739 16 8001 8003
222 AQ9B LDD 1952 8002 1738 69 1952 8002
223 AQ10 STD 0000 AQ11 1745 24 0000 1735
224 E00AC STD ACC6 EXPONENTIAL 1705 24 1858 1711
225 NZE AC5 IS ARGUMENT 1711 45 1715 1710
226 SLT 0008 ZERO 1715 35 0008 1683
227 STU ARTHH IF NOT LET 1683 21 1788 1692
228 RSM 8002 N BE MANTSA 1692 68 8002 1701
229 ALO AC3 X BE POWER 1701 15 1704 1709
230 BMI AC4 1S X GRTR 1709 46 1663 1713
231 SLT 0001 THAN TWO 1713 35 0001 1719
232 NZU AC5 OR LESS THAN 1719 44 1710 1724
233 SRT 0005 MINUS EIGHT 1724 30 0005 1687
234 ALO AC6 IF X WITHIN 1687 15 1690 1695
235 STL ARTHD BOUNDS GEN 1695 20 1665 1718
236 RAU ARTHH INT AND 1718 60 1788 1693
237 SRT 0006 ARTHD FRACT PARTS 1693 30 0006 1665
238 AC3 51 0000 0000 OF ARGUMENT 1704 51 0000 0000
239 AC6 SRT 0000 IS ARG NEG 1690 30 0000 1684
240 BMI AC8 IF SO INT IS 1684 46 1689 1702
241 STU ARTHD AC1 INT MINUS 1 1702 21 1665 1685
242 AC8 SUP AJ2 AND FRACT IS 1689 11 1903 1707
243 STU ARTHD FRACT PLUS 1 1707 21 1665 1668
244 RAL 8002 1668 65 8002 1677
245 ALO AC2 AC1 1677 15 1680 1685
246 AC2 99 9999 9999 1680 99 9999 9999
247 AC1 STL ARTHH 1685 20 1788 1694
248 RAU 8002 1694 60 8002 1703
249 MPY AC18 GENERATE 1703 19 1706 1708
250 RAU 8003 1708 60 8003 1716
251 AUP AC17 POLYNOMIAL 1716 10 1720 1686
252 MPY ARTHH 1686 19 1788 1691
253 RAU 8003 APPROXIM 1691 60 8003 1661
254 AUP AC16 ATION 1661 10 1666 1682
255 MPY ARTHH 1682 19 1788 1696
256 RAU 8003 FOR 1696 60 8003 1712
257 AUP AC15 1712 10 1717 1678
258 MPY ARTHH EXPONENTIAL 1678 19 1788 1650
259 RAU 8003 1650 60 8003 1714
260 AUP AC14 1714 10 1667 1679
261 MPY ARTHH 1679 19 1788 1698
262 RAU 8003 1698 60 8003 1655
263 AUP AC13 1655 10 1660 1676
264 MPY ARTHH 1676 19 1788 1652
265 RAU 8003 1652 60 8003 1659
266 AUP AC12 1659 10 1664 1672
267 MPY ARTHH SQUARE 1672 19 1788 1673
268 RAU 8003 RESULT 1673 60 8003 1700
269 AUP AJ4 SCALE AND 1700 10 1853 1671
270 MPY 8003 FLOAT THEN 1671 19 8003 1657
271 SRT 0001 EXIT 1657 30 0001 1688
272 STU ACC2 1688 21 1843 1697
273 RAU AC19 1697 60 1651 1656
274 AUP ARTHD 1656 10 1665 1933
A274 BMI ACC6 1933 46 1858 1669
275 SRT 0002 1669 30 0002 1675
276 NZU AC21 1675 44 1674 1681
277 AUP ACC2 1681 10 1843 1699
278 SRT 0008 ACC6 1699 30 0008 1858
279 AC4 RAL ARTHH 1663 65 1788 1653
280 BMI AC21 1653 46 1625 1674
281 RAL 8003 ACC6 1625 65 8003 1858
282 AC5 RAL AC20 ACC6 ARGMNT ZERO 1710 65 1627 1858
283 AC21 LDD ACC6 3021 ALARM STOP 1674 69 1858 3021
284 1 AC10 00 0000 0001 1903 00 0000 0001 AC10 same as AJ3
285 1 AC11 10 0000 0000 1853 10 0000 0000
286 AC12 11 5129 2776 1664 11 5129 2776
287 AC13 06 6273 0884 1660 06 6273 0884
288 AC14 02 5439 3575 1667 02 5439 3575
289 AC15 00 7295 1737 1717 00 7295 1737
290 AC16 00 1742 1120 1666 00 1742 1120
291 AC17 00 0255 4918 1720 00 0255 4918
292 AC18 00 0093 2643 1706 00 0093 2643
293 AC19 00 0000 0050 1651 00 0000 0050
294 AC20 10 0000 0050 1627 10 0000 0050
295 E00AB NZE AB10 IS ARG ZERO 1638 45 1662 1632
296 STD ARTHD 1662 24 1665 1670
297 BMI AB10 IS ARG NEG 1670 46 1632 1624
298 SLT 0008 1624 35 0008 1643
299 STL ARTHE STORE POWER 1643 20 1902 1658
300 RAU 8003 FORM Z 1658 60 8003 1615
301 AUP AB1 EQUAL ARG 1615 10 1618 1623
302 STU ACC3 MINUS ROOT 1623 21 1881 1635
303 SUP AB2 TEN OVER ARG 1635 11 1723 1728
304 DVR ACC3 PLUS ROOT 1728 64 1881 1731
305 STL ARTHX TEN 1731 20 1786 1639
306 RAU 8002 1639 60 8002 1647
307 MPY 8001 Z SQUARE 1647 19 8001 1721
308 STU ACC3 1721 21 1881 1636
309 RAU 8003 GENERATE 1636 60 8003 1644
310 MPY AB7 1644 19 1648 1654
311 RAU 8003 POLYNOMIAL 1654 60 8003 1614
312 AUP AB6 1614 10 1617 1726
313 MPY ACC3 APPROXIMATN 1726 19 1881 1730
314 RAU 8003 1730 60 8003 1640
315 AUP AB5 1640 10 1649 1727
316 MPY ACC3 1727 19 1881 1613
317 RAU 8003 1613 60 8003 1616
318 AUP AB4 1616 10 1619 1628
319 MPY ACC3 1628 19 1881 1633
320 RAU 8003 1633 60 8003 1641
321 AUP AB3 1641 10 1645 1733
322 MPY ARTHX 1733 19 1786 1722
323 RAL 8003 1722 65 8003 1729
324 ALO AB8 1729 15 1732 1637
325 SRT 0002 1637 30 0002 1646
326 ALO ARTHE ADD POWER 1646 15 1902 1725
327 SLO AB8 1725 16 1732 1642
328 SRD 0002 ROUND 1642 31 0002 1620
329 RAU 8002 1620 60 8002 1734
330 SCT 0000 NORMALIZE 1734 36 0000 1621
331 BOV AB12 1621 47 1631 1626
332 BMI AB13 1626 46 1629 1630
333 SUP AB9 AB11 ADJUST 1629 11 1634 1622
334 AB11 SUP 8002 AB12 POWER 1622 11 8002 1631
335 AB12 RAL 8003 ARTHD 1631 65 8003 1665
336 AB13 AUP AB9 AB11 1630 10 1634 1622
337 AB10 LDD ARTHD 3011 ALARM 1632 69 1665 3011
338 AB1 00 3162 2780 1618 00 3162 2780
339 AB2 00 6324 5560 1723 00 6324 5560
340 AB3 86 8591 7180 1645 86 8591 7180
341 AB4 28 9335 5240 1619 28 9335 5240
342 AB5 17 7522 0710 1649 17 7522 0710
343 AB6 09 4376 4760 1617 09 4376 4760
344 AB7 19 1337 7140 1648 19 1337 7140
345 AB8 50 0000 0000 1732 50 0000 0000
346 AB9 00 0000 0053 1634 00 0000 0053
1 VARS
ARTHD 00 0000 0000 1665 00 0000 0000
ARTHX 00 0000 0000 1786 00 0000 0000
ARTHG 00 0000 0000 1794 00 0000 0000
ARTHF 00 0000 0000 1772 00 0000 0000
ARTHE 00 0000 0000 1902 00 0000 0000
ARTHH 00 0000 0000 1788 00 0000 0000
ARTHM 00 0000 0000 1824 00 0000 0000
ARTHY 00 0000 0000 1808 00 0000 0000
ACC 00 0000 0000 0000 00 0000 0000
ACC1 00 0000 0000 1998 00 0000 0000
ACC2 00 0000 0000 1843 00 0000 0000
ACC3 00 0000 0000 1881 00 0000 0000
ACC4 00 0000 0000 1870 00 0000 0000
ACC5 00 0000 0000 1795 00 0000 0000
ACC6 00 0000 0000 1858 00 0000 0000
J0001 00 0000 0000 1977 00 0000 0000
J0002 00 0000 0000 1978 00 0000 0000
J0003 00 0000 0000 1979 00 0000 0000
J0004 00 0000 0000 1980 00 0000 0000
J0005 00 0000 0000 1981 00 0000 0000
J0006 00 0000 0000 1982 00 0000 0000
J0007 00 0000 0000 1983 00 0000 0000
J0008 00 0000 0000 1984 00 0000 0000
P0000 00 0000 0000 1950 00 0000 0000
P0001 00 0000 0000 1951 00 0000 0000
P0002 00 0000 0000 1952 00 0000 0000
P0004 00 0000 0000 1954 00 0000 0000
P0005 00 0000 0000 1955 00 0000 0000
P0007 00 0000 0000 1957 00 0000 0000
P0008 00 0000 0000 1958 00 0000 0000
P0009 00 0000 0000 1959 00 0000 0000
P0010 00 0000 0000 1960 00 0000 0000

494
I650/sw/it_package_p4.dck Normal file
View file

@ -0,0 +1,494 @@
6I1954195C 0000241833800?2417861789 e00aistdarthxai1 6-add
6I1954195C 0000241789800?2017941799 ai1 stlarthg 7-
6I1954195C 0000241799800?6918021805 ldd arthb 8-
6I1954195C 0000241802800?6780021767 ram 8002 9-store acc
6I1954195C 0000241767800?2017721894 stlarthf 10-power
6I1954195C 0000241894800?1819021759 smlarthe 11-
6I1954195C 0000241759800?3500011766 slt 0001 12-
6I1954195C 0000241766800?4417731771 nzuai12 13-find max
6I1954195C 0000241771800?6917741777 lddai3a 14-
6I1954195C 0000241777800?3000051790 srt 0005 15-power
6I1954195C 0000241790800?2217931796 sdaai3 16-set expnnts
6I1954195C 0000241796800?4618991754 bmi ai2 17-and then
6I1954195C 0000241899800?6719021817 ramarthe 18-perform
6I1954195C 0000241817800?2017721776 stlarthf 19-addition
6I1954195C 0000241776800?6517881943 ralarthh 20-
6I1954195C 0000241943800?6918241793 lddarthmai3 21-
6I1954195C 0000241793800?3000001811 ai3 srt 0000ai3b 22-
6I1954195C 0000241774800?3000001811 ai3a srt 0000ai3b 23-
6I1954195C 0000241811800?1580011770 ai3b alo 8001ai5 24-
6I1954195C 0000241754800?6518241779 ai2 ralarthm 25-
6I1954195C 0000241779800?6917881793 lddarthhai3 26-
6I1954195C 0000241770800?6080021780 ai5 rau 8002 27-clear arthe
6I1954195C 0000241780800?2019021762 stlarthearths 28-to scale
6I1954195C 0000241773800?4617781828 ai12 bmi ai13 29-
6I1954195C 0000241778800?6517941904 ralarthgai10 30-
6I1954195C 0000241828800?6500001786 ai13 ralacc arthx 31-
6I1954195C 0000241805800?2418081826 arthbstdarthy 32-break up exp
6I1954195C 0000241826800?3500081996 slt 0008 33-and mantissa
6I1954195C 0000241996800?2019021755 stlarthe 34-store power
6I1954195C 0000241755800?6080031763 rau 8003 35-and mantissa
6I1954195C 0000241763800?3500011769 slt 0001 36-of lower
6I1954195C 0000241769800?2118241997 stuarthm 37-
6I1954195C 0000241997800?6000001855 rauacc 38-
6I1954195C 0000241855800?3000021761 srt 0002 39-store power
6I1954195C 0000241761800?1680021819 slo 8002 40-and mantissa
6I1954195C 0000241819800?3500011775 slt 0001 41-of acc
6I1954195C 0000241775800?1580011783 alo 8001 42-
6I1954195C 0000241783800?2117881808 stuarthharthy 43-
6I1954195C 0000241762800?3600001782 arthssct 0000 44-normalize
6I1954195C 0000241782800?4719421787 bovai6 45-brnch if zro
6I1954195C 0000241787800?2017941797 stlarthg 46-shift count
6I1954195C 0000241797800?6580031905 ral 8003 47-round on
6I1954195C 0000241905800?3100021813 srd 0002 48-ninth digit
6I1954195C 0000241813800?3500021869 slt 0002 49-check for
6I1954195C 0000241869800?2018241877 stlarthm 50-roundoff
6I1954195C 0000241877800?4418311834 nzuai7 ai8 51-overflow
6I1954195C 0000241834800?6780031841 ai8 ram 8003 52-and
6I1954195C 0000241841800?1817941800 smlarthg 53-correct if
6I1954195C 0000241800800?1519031822 aloaj2 54-necessary
6I1954195C 0000241822800?3500081791 slt 0008 55-
6I1954195C 0000241791800?6580021849 ral 8002 56-
6I1954195C 0000241849800?1719021757 amlarthe 57-
6I1954195C 0000241757800?1517721827 aloarthf 58-
6I1954195C 0000241827800?4617521781 bmiai11a 59-pwr too smal
6I1954195C 0000241781800?4417851836 nzuai11 60-pwr too lrge
6I1954195C 0000241836800?3500021893 slt 0002 61-
6I1954195C 0000241893800?2119981901 stuacc1 62-
6I1954195C 0000241901800?6518241829 ralarthm 63-
6I1954195C 0000241829800?4619441995 bmi ai9 64-combine
6I1954195C 0000241944800?1619981904 sloacc1 ai10 65-
6I1954195C 0000241904800?2000001786 ai10 stlacc arthx 66-and
6I1954195C 0000241995800?1519981904 ai9 aloacc1 ai10 67-
6I1954195C 0000241831800?3000011792 ai7 srt 0001 68-adjust
6I1954195C 0000241792800?2018241927 stlarthm 69-
6I1954195C 0000241927800?3500011834 slt 0001ai8 70-
6I1954195C 0000241942800?6580031904 ai6 ral 8003ai10 71-
6I1954195C 0000241832800?2417861839 e00ajstdarthx 72-multiply
6I1954195C 0000241839800?6918521805 ldd arthb 73-
6I1954195C 0000241852800?6780021867 ram 8002 74-acc power
6I1954195C 0000241867800?1618201825 sloaj1 75-minus 48
6I1954195C 0000241825800?2017721875 stlarthf 76-
6I1954195C 0000241875800?6017881756 rauarthh 77-
6I1954195C 0000241756800?1918241762 mpyarthmarths 78-
6I1954195C 0000241830800?2417861889 e00agstdarthxag1 79-divide
6I1954195C 0000241889800?6918421805 ag1 ldd arthb 80-is divisor
6I1954195C 0000241842800?4418121846 nzu ag3 81-zer0
6I1954195C 0000241812800?6880021821 rsm 8002 82-divisor
6I1954195C 0000241821800?1518761895 aloag2 83-power minus
6I1954195C 0000241895800?2017721768 stlarthf 84-49
6I1954195C 0000241768800?6018241879 rauarthm 85-sh1ft
6I1954195C 0000241879800?3000011885 srt 0001 86-dividend
6I1954195C 0000241885800?6417881803 dvrarthh 87-do divide
6I1954195C 0000241803800?6080021762 rau 8002arths 88-
6I1954195C 0000241882800?2417861989 e00aostdarthx 89-div reverse
6I1954195C 0000241989800?2018431896 stlacc2 90-
6I1954195C 0000241896800?6500001810 ralacc 91-
6I1954195C 0000241810800?6918431897 lddacc2 92-
6I1954195C 0000241897800?2400001889 stdacc ag1 93-
6I1954195C 0000241947800?2418581911 e00afstdacc6 94-fl0at to lwr
6I1954195C 0000241911800?6919251928 lddae4 e00ae 95-and acc
6I1954195C 0000241925800?2000001858 ae4 stlacc acc6 96-
6I1954195C 0000241928800?2417861840 e00aestdarthx 97-float to lwr
6I1954195C 0000241840800?6080021753 rau 8002 98-only
6I1954195C 0000241753800?3600001975 sct 0000 99-normalize
6I1954195C 0000241975800?2018811784 stlacc3 100-
6I1954195C 0000241784800?4718511890 bovad1 101-zer0 check
6I1954195C 0000241890800?6580031798 ral 8003 102-
6I1954195C 0000241798800?3100021807 srd 0002 103-round for
6I1954195C 0000241807800?3500021764 slt 0002 104-placing exp
6I1954195C 0000241764800?4418181891 nzu ae6 105-check round
6I1954195C 0000241818800?6980031874 ldd 8003 106-overflow
6I1954195C 0000241874800?3000011884 srt 0001 107-
6I1954195C 0000241884800?1580011891 alo 8001ae6 108-
6I1954195C 0000241891800?4618441845 ae6 bmiae2 109-insert
6I1954195C 0000241845800?1518481804 aloaj3 ae5 110-exp0nent
6I1954195C 0000241844800?1618481804 ae2 sloaj3 ae5 111-
6I1954195C 0000241804800?1618811786 ae5 sloacc3 arthx 112-
6I1954195C 0000241932800?2417861990 e00thstdarthx 113-fix l0wer
6I1954195C 0000241990800?3500081859 slt 0008 114-to lower
6I1954195C 0000241859800?2118241878 stuarthm 115-
6I1954195C 0000241878800?6780021887 ram 8002 116-test exp
6I1954195C 0000241887800?1619401945 sloaj5 117-store zer0
6I1954195C 0000241945800?4618511850 bmiad1 118-if less than
6I1954195C 0000241850800?1618531758 sloaj4 119-50 alarm
6I1954195C 0000241758800?4618611862 bmi ad3 120-1f grtr than
6I1954195C 0000241861800?3000041921 srt 0004 121-59
6I1954195C 0000241921800?1519241929 aloar7 122-
6I1954195C 0000241929800?6918351838 lddad2a 123-modify
6I1954195C 0000241838800?2219911971 sdaad2 124-shift
6I1954195C 0000241971800?6518241930 ralarthm 125-
6I1954195C 0000241930800?3500021991 slt 0002ad2 126-
6I1954195C 0000241851800?6580031786 ad1 ral 8003arthx 127-store zero
6I1954195C 0000241991800?3000001786 ad2 srt 0000arthx 128-shift c0nst
6I1954195C 0000241835800?3000001786 ad2a srt 0000arthx 129-
6I1954195C 0000241862800?6917863031 ad3 lddarthx 3031 130-fix alarm
6I1954195C 0000241846800?6917863061 ag3 lddarthx 3061 131-divide alarm
6I1954195C 0000241785800?6917863081 ai11 lddarthx 3081 132-scale alarm
6I1954195C 0000241752800?0110811942 ai11ahlt 1081ai6 133-
6I1954195C 0000241876800?4900000000 ag2 49 0000 0000 134-
6I1954195C 0000241820800?4800000000 aj1 48 0000 0000 135-
6I1954195C 0000241903800?0000000001 aj2 00 0000 0001 136-
6I1954195C 0000241848800?0000000059 aj3 00 0000 0059 137-
6I1954195C 0000241853800?1000000000 aj4 10 0000 0000 138-
6I1954195C 0000241940800?5000000000 aj5 50 0000 0000 139-
6I1954195C 0000241974800?2419771880 e00aqstdj0001aq1 140-read
6I1954195C 0000241880800?7019761898 aq1 rd1 1976aq3 141-
6I1954195C 0000241898800?6719511806 aq3 ramp0001aq3a 142-
6I1954195C 0000241892800?6719511806 aq3b ramp0001aq3a 143-check for
6I1954195C 0000241806800?4518601837 aq3a nze aq8 144-last word
6I1954195C 0000241860800?6918631816 lddaq5 aq4 145-on card
6I1954195C 0000241816800?2418701873 aq4 stdacc4 146-
6I1954195C 0000241873800?1080031931 aup 8003 147-read in
6I1954195C 0000241931800?3000041941 srt 0004 148-label for
6I1954195C 0000241941800?2317951948 siaacc5 149-present
6I1954195C 0000241948800?1680011856 slo 8001 150-variable
6I1954195C 0000241856800?1518098002 alo 8002 151-get i y 0r c
6I1954195C 0000241809800?6000001987 rau 0000 152-address from
6I1954195C 0000241987800?1017951949 aupacc5 153-abcon dict
6I1954195C 0000241949800?3500041870 slt 0004acc4 154-generate
6I1954195C 0000241863800?1018661857 aq5 aupaq7 155-1nstruction
6I1954195C 0000241857800?1519601965 alop0010 156-
6I1954195C 0000241965800?1519688002 alo 8002 157-get and
6I1954195C 0000241968800?6919528003 lddp0002 8003 158-store word
6I1954195C 0000241866800?2400001907 aq7 std 0000 159-
6I1954195C 0000241907800?6519601915 ralp0010 160-increment
6I1954195C 0000241915800?1519181854 aloaq9 161-word count
6I1954195C 0000241854800?2019601963 stlp0010 162-
6I1954195C 0000241963800?1518928002 aloaq3b 8002 163-
6I1954195C 0000241837800?6519511765 aq8 ralp0001 164-check for
6I1954195C 0000241765800?4619771880 bmij0001aq1 165-last card
6I1954195C 0000241801800?2419551908 e00arstdp0005 166-punch 0ut
6I1954195C 0000241908800?2119791935 stuj0003 167-
6I1954195C 0000241935800?2319581912 siap0008 168-store stmnt
6I1954195C 0000241912800?2119801886 stuj0004 169-number
6I1954195C 0000241886800?2219541909 sdap0004 170-store word
6I1954195C 0000241909800?1680011917 slo 8001 171-count
6I1954195C 0000241917800?4519201872 nzear10 ar9 172-test zero
6I1954195C 0000241920800?2119811814 ar10 stuj0005 173-stmt number
6I1954195C 0000241814800?2419821972 stdj0006 174-set punch
6I1954195C 0000241972800?2419831864 stdj0007 175-band to
6I1954195C 0000241864800?2419841888 stdj0008 176-zeroes
6I1954195C 0000241888800?2419601913 stdp0010ar3 177-set counter
6I1954195C 0000241913800?6519541910 ar3 ralp0004 178-
6I1954195C 0000241910800?1619241936 sloar7 179-
6I1954195C 0000241936800?4619941992 bmiar8 180-test word
6I1954195C 0000241992800?2019541865 stlp0004ar4 181-count
6I1954195C 0000241865800?1518688002 ar4 alo 8002 182-get word
6I1954195C 0000241868800?6519501914 ralp0000 183-label from
6I1954195C 0000241914800?1080031922 aup 8003 184-punch consts
6I1954195C 0000241922800?3500011938 slt 0001 185-
6I1954195C 0000241938800?2219571961 sdap0007 186-modify label
6I1954195C 0000241961800?1680011919 slo 8001 187-
6I1954195C 0000241919800?3000011926 srt 0001 188-
6I1954195C 0000241926800?1519571962 alop0007 189-
6I1954195C 0000241962800?3500041923 slt 0004 190-insert stmnt
6I1954195C 0000241923800?1519581964 alop0008 191-number
6I1954195C 0000241964800?1019601916 aupp0010 192-
6I1954195C 0000241916800?1019698003 aup 8003 193-
6I1954195C 0000241969800?2019771988 stlj0001 194-store label
6I1954195C 0000241988800?6580021900 ral 8002 195-for punching
6I1954195C 0000241900800?6919061816 ldd aq4 196-modify label
6I1954195C 0000241906800?1019661934 aupar6 197-into drum
6I1954195C 0000241934800?1519601967 alop0010 198-loc in read
6I1954195C 0000241967800?1519708003 alo 8003 199-get word
6I1954195C 0000241970800?2419781993 stdj0002 200-store in
6I1954195C 0000241993800?6519601815 ralp0010 201-punch band
6I1954195C 0000241815800?1519181973 aloaq9 202-
6I1954195C 0000241973800?2019601913 stlp0010ar3 203-
6I1954195C 0000241966800?6900008002 ar6 ldd 0000 8002 204-
6I1954195C 0000241924800?0000010000 ar7 00 0001 0000 205-
6I1954195C 0000241994800?7119771955 ar8 pchj0001p0005 206-punch
6I1954195C 0000241872800?6580001937 ar9 ral 8000 207-if stmt nmbr
6I1954195C 0000241937800?4619201955 bmiar10 p0005 208-zro pch only
6I1954195C 0000241918800?0000020000 aq9 00 0002 0000 209-if 8000 neg
6I1954195C 0000241986800?8000008800 j0010 80 0000 8800 210-control cnst
6I1954195C 0000241654800?2418081732 e00alstdarthy 211-
6I1954195C 0000241732800?2017881694 stlarthh 212-
6I1954195C 0000241694800?6500001709 ralacc al17a 213-is power
6I1954195C 0000241709800?2418701723 al17astdacc4 214-two
6I1954195C 0000241723800?2417861739 stdarthx 215-if so
6I1954195C 0000241739800?1616861692 sloal16 216-multiply
6I1954195C 0000241692800?4517311751 nzeal18 217-
6I1954195C 0000241751800?6517881645 ralarthh 218-
6I1954195C 0000241645800?2400001655 stdacc 219-
6I1954195C 0000241655800?6918081832 lddarthye00aj 220-
6I1954195C 0000241731800?6517881693 al18 ralarthhal17 221-
6I1954195C 0000241693800?3500081661 al17 slt 0008 222-
6I1954195C 0000241661800?1680021720 slo 8002 223-
6I1954195C 0000241720800?3500021677 slt 0002 224-q equals
6I1954195C 0000241677800?1580011690 alo 8001 225-mantissa
6I1954195C 0000241690800?2117721675 stuarthf 226-of argument
6I1954195C 0000241675800?6780021683 ram 8002 227-
6I1954195C 0000241683800?1617361691 sloal1 228-store expnnt
6I1954195C 0000241691800?3500021698 slt 0002 229-of argmnt
6I1954195C 0000241698800?2119021706 stuarthe 230-
6I1954195C 0000241706800?6516601666 ralal2 231-mantissa of
6I1954195C 0000241666800?2018241678 stlarthm 232-z is one
6I1954195C 0000241678800?6517361695 ralal1 233-
6I1954195C 0000241695800?3500021702 slt 0002 234-exp of z is
6I1954195C 0000241702800?2117941747 stuarthgal3 235-50
6I1954195C 0000241747800?6000001708 al3 rauacc 236-k is grtst
6I1954195C 0000241708800?1917361738 mpyal1 237-integer in
6I1954195C 0000241738800?2100001658 stuacc 238-k over two
6I1954195C 0000241658800?6580021667 ral 8002 239-is remainder
6I1954195C 0000241667800?4516701646 nze al4 240-zer0
6I1954195C 0000241670800?6018241729 rauarthm 241-if not set z
6I1954195C 0000241729800?6916821737 ldd al5 242-equals to
6I1954195C 0000241682800?1517941715 aloarthg 243-z times q
6I1954195C 0000241715800?2017941699 stlarthg 244-via
6I1954195C 0000241699800?6516651669 ralarthd 245-subroutine
6I1954195C 0000241669800?2018241638 stlarthm 246-
6I1954195C 0000241638800?4516461741 nzeal4 al20 247-
6I1954195C 0000241646800?6000001712 al4 rauacc 248-if k nonzero
6I1954195C 0000241712800?4416681721 nzu al7 249-q equals
6I1954195C 0000241668800?6017721679 rauarthf 250-
6I1954195C 0000241679800?6916841737 ldd al5 251-via subrtne
6I1954195C 0000241684800?1519021714 aloarthe 252-
6I1954195C 0000241714800?2019021662 stlarthe 253-
6I1954195C 0000241662800?6516651719 ralarthd 254-
6I1954195C 0000241719800?2017721747 stlarthfal3 255-
6I1954195C 0000241721800?6017941700 al7 rauarthg 256-set exponnts
6I1954195C 0000241700800?3000021663 srt 0002 257-arths
6I1954195C 0000241663800?4417851722 nzuai11 258-exp overscal
6I1954195C 0000241722800?2019021664 stlarthe 259-
6I1954195C 0000241664800?2117721671 stuarthf 260-
6I1954195C 0000241671800?6018241680 rauarthm 261-
6I1954195C 0000241680800?3000011741 srt 0001al20 262-
6I1954195C 0000241741800?6917161724 al20 lddal8 263-
6I1954195C 0000241724800?2417861762 stdarthxarths 264-
6I1954195C 0000241716800?6518701648 al8 ralacc4 265-
6I1954195C 0000241648800?4617011743 bmial10 266-
6I1954195C 0000241743800?6500001808 ralacc arthy 267-
6I1954195C 0000241701800?6500001672 al10 ralacc 268-z equals one
6I1954195C 0000241672800?4516761681 nze al12 269-over z if
6I1954195C 0000241676800?6516851649 ralal11 270-k neg and z
6I1954195C 0000241649800?6918081830 lddarthye00ag 271-non zero
6I1954195C 0000241681800?6918083111 al12 lddarthy 3111 272-alarm if zro
6I1954195C 0000241737800?2417861652 al5 stdarthx 273-
6I1954195C 0000241652800?1917721673 mpyarthf 274-
6I1954195C 0000241673800?3000091644 srt 0009 275-
6I1954195C 0000241644800?4416501639 nzual14 276-
6I1954195C 0000241639800?2016651640 stlarthd 277-
6I1954195C 0000241640800?6580031641 ral 8003al15 278-
6I1954195C 0000241641800?1519021786 al15 aloarthearthx 279-
6I1954195C 0000241650800?3000011643 al14 srt 0001 280-
6I1954195C 0000241643800?2016651642 stlarthd 281-
6I1954195C 0000241642800?6519031641 ralaj2 al15 282-
6I1954195C 0000241736800?5000000000 al1 50 0000 0000 283-
6I1954195C 0000241660800?1000000000 al2 10 0000 0000 284-
6I1954195C 0000241685800?1000000050 al11 10 0000 0050 285-
6I1954195C 0000241686800?0000000002 al16 00 0000 0002 286-
6I1954195C 0000241903800?0000000001 aj2 00 0000 0001 287-
6I1954195C 0000241651800?2418081687 e00anstdarthy 288-power
6I1954195C 0000241687800?6900001674 lddacc 289-float fix
6I1954195C 0000241674800?2417881745 stdarthh 290-reverse
6I1954195C 0000241745800?2000001709 stlacc al17a 291-
6I1954195C 0000241704800?2418081711 e00akstdarthy 292-power fixfix
6I1954195C 0000241711800?2017941647 stlarthgak1 293-q is argmnt
6I1954195C 0000241647800?6700001705 ak1 ramacc 294-k equals
6I1954195C 0000241705800?2017721725 stlarthf 295-abval power
6I1954195C 0000241725800?6519031707 ralaj2 296-z equals
6I1954195C 0000241707800?2017881718 stlarthhak3 297-one
6I1954195C 0000241718800?6017721727 ak3 rauarthf 298-k is gtst
6I1954195C 0000241727800?1917301717 mpyak4 299-intgr in
6I1954195C 0000241717800?2117721726 stuarthf 300-k over two
6I1954195C 0000241726800?6580021735 ral 8002 301-is remainder
6I1954195C 0000241735800?4517341742 nze ak5 302-zero
6I1954195C 0000241734800?6017881688 rauarthh 303-if not z is
6I1954195C 0000241688800?1917941733 mpyarthg 304-z times q
6I1954195C 0000241733800?2017881742 stlarthhak5 305-
6I1954195C 0000241742800?6017721728 ak5 rauarthf 306-
6I1954195C 0000241728800?4417401746 nzu ak6 307-1s k zero
6I1954195C 0000241740800?6017941749 rauarthg 308-if not
6I1954195C 0000241749800?1980011689 mpy 8001 309-q equals
6I1954195C 0000241689800?2017941718 stlarthgak3 310-q squared
6I1954195C 0000241746800?6000001656 ak6 rauacc 311-is power neg
6I1954195C 0000241656800?4616591713 bmi ak7 312-if so is z
6I1954195C 0000241659800?6717881744 ramarthh 313-zero
6I1954195C 0000241744800?4517481750 nze ak8 314-if not is z
6I1954195C 0000241748800?1619031657 sloaj2 315-one
6I1954195C 0000241657800?4517101713 nzeak10 ak7 316-
6I1954195C 0000241713800?6517881808 ak7 ralarthharthy 317-exhibit z
6I1954195C 0000241710800?6580031808 ak10 ral 8003arthy 318-
6I1954195C 0000241750800?6918083101 ak8 lddarthy 3101 319-alarm
6I1954195C 0000241730800?5000000000 ak4 50 0000 0000 320-
6I1954195C 0000241903800?0000000001 aj2 00 0000 0001 321-
6I1954195C 0000241653800?2418081696 e00amstdarthy 322-interchge
6I1954195C 0000241696800?6900001703 lddacc 323-acc and
6I1954195C 0000241703800?2417941697 stdarthg 324-lower
6I1954195C 0000241697800?2000001647 stlacc ak1 325-then e00ak
6I1954195C 0000241976800?6719511623 1976ram 1951 326-
6I1954195C 0000241623800?1080031632 aup 8003 327-
6I1954195C 0000241632800?3500041624 slt 0004 328-
6I1954195C 0000241624800?2219591626 sdap0009 329-
6I1954195C 0000241626800?3000041637 srt 0004 330-
6I1954195C 0000241637800?6916271816 ldd aq4 331-
6I1954195C 0000241627800?6580031636 ral 8003 332-
6I1954195C 0000241636800?1019591633 aupp0009 333-
6I1954195C 0000241633800?1580011631 alo 8001 334-
6I1954195C 0000241631800?1016251628 aupaq9b 335-
6I1954195C 0000241628800?1516341622 aloaq10 aq11 336-
6I1954195C 0000241622800?1116251630 aq11 supaq9b 337-
6I1954195C 0000241630800?4416351837 nzu aq8 338-
6I1954195C 0000241635800?1080011621 aup 8001 339-
6I1954195C 0000241621800?1119241629 supar7 340-
6I1954195C 0000241629800?1680018003 slo 8001 8003 341-
6I1954195C 0000241625800?6919528002 aq9b ldd 1952 8002 342-
6I1954195C 0000241634800?2400001622 aq10 std 0000aq11 343-
6I1954195C 0000241605800?2418581611 e00acstdacc6 344-exponential
6I1954195C 0000241611800?4516151504 nze ac5 345-is argument
6I1954195C 0000241615800?3500081583 slt 0008 346-zero
6I1954195C 0000241583800?2117881592 stuarthh 347-if not let
6I1954195C 0000241592800?6880021601 rsm 8002 348-n be mantsa
6I1954195C 0000241601800?1516041609 aloac3 349-x be power
6I1954195C 0000241609800?4615131613 bmiac4 350-is x grtr
6I1954195C 0000241613800?3500011619 slt 0001 351-than two
6I1954195C 0000241619800?4415041574 nzuac5 352-or less than
6I1954195C 0000241574800?3000051587 srt 0005 353-minus eight
6I1954195C 0000241587800?1515901595 aloac6 354-if x within
6I1954195C 0000241595800?2016651618 stlarthd 355-bounds gen
6I1954195C 0000241618800?6017881593 rauarthh 356-int and
6I1954195C 0000241593800?3000061665 srt 0006arthd 357-fract parts
6I1954195C 0000241604800?5100000000 ac3 51 0000 0000 358-of argument
6I1954195C 0000241590800?3000001584 ac6 srt 0000 359-is arg neg
6I1954195C 0000241584800?4615891602 bmiac8 360-1f so int is
6I1954195C 0000241602800?2116651585 stuarthdac1 361-int minus 1
6I1954195C 0000241589800?1119031607 ac8 supaj2 362-and fract is
6I1954195C 0000241607800?2116651568 stuarthd 363-fract plus 1
6I1954195C 0000241568800?6580021577 ral 8002 364-
6I1954195C 0000241577800?1515801585 aloac2 ac1 365-
6I1954195C 0000241580800?9999999999 ac2 99 9999 9999 366-
6I1954195C 0000241585800?2017881594 ac1 stlarthh 367-
6I1954195C 0000241594800?6080021603 rau 8002 368-
6I1954195C 0000241603800?1916061608 mpyac18 369-generate
6I1954195C 0000241608800?6080031616 rau 8003 370-
6I1954195C 0000241616800?1016201586 aupac17 371-polynomial
6I1954195C 0000241586800?1917881591 mpyarthh 372-
6I1954195C 0000241591800?6080031561 rau 8003 373-approxim
6I1954195C 0000241561800?1015661582 aupac16 374-ation
6I1954195C 0000241582800?1917881596 mpyarthh 375-
6I1954195C 0000241596800?6080031612 rau 8003 376-for
6I1954195C 0000241612800?1016171578 aupac15 377-
6I1954195C 0000241578800?1917881550 mpyarthh 378-exponential
6I1954195C 0000241550800?6080031614 rau 8003 379-
6I1954195C 0000241614800?1015671579 aupac14 380-
6I1954195C 0000241579800?1917881598 mpyarthh 381-
6I1954195C 0000241598800?6080031555 rau 8003 382-
6I1954195C 0000241555800?1015601576 aupac13 383-
6I1954195C 0000241576800?1917881552 mpyarthh 384-
6I1954195C 0000241552800?6080031559 rau 8003 385-
6I1954195C 0000241559800?1015641572 aupac12 386-
6I1954195C 0000241572800?1917881573 mpyarthh 387-square
6I1954195C 0000241573800?6080031600 rau 8003 388-result
6I1954195C 0000241600800?1018531571 aupaj4 389-scale and
6I1954195C 0000241571800?1980031557 mpy 8003 390-float then
6I1954195C 0000241557800?3000011588 srt 0001 391-exit
6I1954195C 0000241588800?2118431597 stuacc2 392-
6I1954195C 0000241597800?6015511556 rauac19 393-
6I1954195C 0000241556800?1016651933 auparthd 394-
6I1954195C 0000241933800?4618581569 bmiacc6 a394-
6I1954195C 0000241569800?3000021575 srt 0002 395-
6I1954195C 0000241575800?4415141581 nzuac21 396-
6I1954195C 0000241581800?1018431599 aupacc2 397-
6I1954195C 0000241599800?3000081858 srt 0008acc6 398-
6I1954195C 0000241513800?6517881503 ac4 ralarthh 399-
6I1954195C 0000241503800?4615101514 bmi ac21 400-
6I1954195C 0000241510800?6580031858 ral 8003acc6 401-
6I1954195C 0000241504800?6515651858 ac5 ralac20 acc6 402-argmnt zero
6I1954195C 0000241514800?6918583021 ac21 lddacc6 3021 403-alarm stop
6I1954195C 0000241903800?0000000001 aj2 00 0000 0001 404-
6I1954195C 0000241853800?1000000000 aj4 10 0000 0000 405-
6I1954195C 0000241564800?1151292776 ac12 11 5129 2776 406-
6I1954195C 0000241560800?0662730884 ac13 06 6273 0884 407-
6I1954195C 0000241567800?0254393575 ac14 02 5439 3575 408-
6I1954195C 0000241617800?0072951737 ac15 00 7295 1737 409-
6I1954195C 0000241566800?0017421120 ac16 00 1742 1120 410-
6I1954195C 0000241620800?0002554918 ac17 00 0255 4918 411-
6I1954195C 0000241606800?0000932643 ac18 00 0093 2643 412-
6I1954195C 0000241551800?0000000050 ac19 00 0000 0050 413-
6I1954195C 0000241565800?1000000050 ac20 10 0000 0050 414-
6I1954195C 0000241507800?4515621505 e00a8nze ab10 415-is arg zero
6I1954195C 0000241562800?2416651570 stdarthd 416-
6I1954195C 0000241570800?4615051524 bmiab10 417-is arg neg
6I1954195C 0000241524800?3500081543 slt 0008 418-
6I1954195C 0000241543800?2019021558 stlarthe 419-store power
6I1954195C 0000241558800?6080031515 rau 8003 420-form z
6I1954195C 0000241515800?1015181523 aupab1 421-equal arg
6I1954195C 0000241523800?2118811535 stuacc3 422-minus root
6I1954195C 0000241535800?1115531563 supab2 423-ten over arg
6I1954195C 0000241563800?6418811500 dvracc3 424-plus root
6I1954195C 0000241500800?2018081511 stlarthy 425-ten
6I1954195C 0000241511800?6080021519 rau 8002 426-
6I1954195C 0000241519800?1980011521 mpy 8001 427-z square
6I1954195C 0000241521800?2118811536 stuacc3 428-
6I1954195C 0000241536800?6080031544 rau 8003 429-generate
6I1954195C 0000241544800?1915481554 mpyab7 430-
6I1954195C 0000241554800?6080031512 rau 8003 431-polynomial
6I1954195C 0000241512800?1015161526 aupab6 432-
6I1954195C 0000241526800?1918811531 mpyacc3 433-approximatn
6I1954195C 0000241531800?6080031540 rau 8003 434-
6I1954195C 0000241540800?1015491527 aupab5 435-
6I1954195C 0000241527800?1918811538 mpyacc3 436-
6I1954195C 0000241538800?6080031502 rau 8003 437-
6I1954195C 0000241502800?1016101528 aupab4 438-
6I1954195C 0000241528800?1918811533 mpyacc3 439-
6I1954195C 0000241533800?6080031541 rau 8003 440-
6I1954195C 0000241541800?1015451501 aupab3 441-
6I1954195C 0000241501800?1918081508 mpyarthy 442-
6I1954195C 0000241508800?6580031517 ral 8003 443-
6I1954195C 0000241517800?1515201525 aloab8 444-
6I1954195C 0000241525800?3000021532 srt 0002 445-
6I1954195C 0000241532800?1519021509 aloarthe 446-add power
6I1954195C 0000241509800?1615201529 sloab8 447-
6I1954195C 0000241529800?3100021537 srd 0002 448-round
6I1954195C 0000241537800?6080021546 rau 8002 449-
6I1954195C 0000241546800?3600001522 sct 0000 450-normalize
6I1954195C 0000241522800?4715061530 bovab12 451-
6I1954195C 0000241530800?4615341539 bmi ab13 452-
6I1954195C 0000241534800?1115421547 supab9 ab11 453-adjust
6I1954195C 0000241547800?1180021506 ab11 sup 8002ab12 454-power
6I1954195C 0000241506800?6580031665 ab12 ral 8003arthd 455-
6I1954195C 0000241539800?1015421547 ab13 aupab9 ab11 456-
6I1954195C 0000241505800?6916653011 ab10 lddarthd 3011 457-alarm
6I1954195C 0000241518800?0031622780 ab1 00 3162 2780 458-
6I1954195C 0000241553800?0063245560 ab2 00 6324 5560 459-
6I1954195C 0000241545800?8685917180 ab3 86 8591 7180 460-
6I1954195C 0000241610800?2893355240 ab4 28 9335 5240 461-
6I1954195C 0000241549800?1775220710 ab5 17 7522 0710 462-
6I1954195C 0000241516800?0943764760 ab6 09 4376 4760 463-
6I1954195C 0000241548800?1913377140 ab7 19 1337 7140 464-
6I1954195C 0000241520800?5000000000 ab8 50 0000 0000 465-
6I1954195C 0000241542800?0000000053 ab9 00 0000 0053 466-
6I1954195C 0000241786800?0000000000 arthx 00 0000 0000 -
6I1954195C 0000241665800?0000000000 arthd 00 0000 0000 -
6I1954195C 0000241794800?0000000000 arthg 00 0000 0000 -
6I1954195C 0000241772800?0000000000 arthf 00 0000 0000 -
6I1954195C 0000241902800?0000000000 arthe 00 0000 0000 -
6I1954195C 0000241788800?0000000000 arthh 00 0000 0000 -
6I1954195C 0000241824800?0000000000 arthm 00 0000 0000 -
6I1954195C 0000241808800?0000000000 arthy 00 0000 0000 -
6I1954195C 0000240000800?0000000000 acc 00 0000 0000 -
6I1954195C 0000241998800?0000000000 acc1 00 0000 0000 -
6I1954195C 0000241843800?0000000000 acc2 00 0000 0000 -
6I1954195C 0000241881800?0000000000 acc3 00 0000 0000 -
6I1954195C 0000241870800?0000000000 acc4 00 0000 0000 -
6I1954195C 0000241795800?0000000000 acc5 00 0000 0000 -
6I1954195C 0000241858800?0000000000 acc6 00 0000 0000 -
6I1954195C 0000241977800?0000000000 j0001 00 0000 0000 -
6I1954195C 0000241978800?0000000000 j0002 00 0000 0000 -
6I1954195C 0000241979800?0000000000 j0003 00 0000 0000 -
6I1954195C 0000241980800?0000000000 j0004 00 0000 0000 -
6I1954195C 0000241981800?0000000000 j0005 00 0000 0000 -
6I1954195C 0000241982800?0000000000 j0006 00 0000 0000 -
6I1954195C 0000241983800?0000000000 j0007 00 0000 0000 -
6I1954195C 0000241984800?0000000000 j0008 00 0000 0000 -
6I1954195C 0000241950800?0000000000 p0000 00 0000 0000 -
6I1954195C 0000241951800?0000000000 p0001 00 0000 0000 -
6I1954195C 0000241952800?0000000000 p0002 00 0000 0000 -
6I1954195C 0000241954800?0000000000 p0004 00 0000 0000 -
6I1954195C 0000241955800?0000000000 p0005 00 0000 0000 -
6I1954195C 0000241957800?0000000000 p0007 00 0000 0000 -
6I1954195C 0000241958800?0000000000 p0008 00 0000 0000 -
6I1954195C 0000241959800?0000000000 p0009 00 0000 0000 -
6I1954195C 0000241960800?0000000000 p0010 00 0000 0000 -

500
I650/sw/it_package_p4_listing.txt Normal file
View file

@ -0,0 +1,500 @@
5 PACKAGE 4 IS
5 PACKAGE 2
5 PLUS
5 LOG AND EXPONENTIAL
5 SUBROUTINES
6 E00AI STD ARTHX AI1 ADD 1833 24 1786 1789
7 AI1 STL ARTHG 1789 20 1794 1799
8 LDD ARTHB 1799 69 1802 1805
9 RAM 8002 STORE ACC 1802 67 8002 1767
10 STL ARTHF POWER 1767 20 1772 1894
11 SML ARTHE 1894 18 1902 1759
12 SLT 0001 1759 35 0001 1766
13 NZU AI12 FIND MAX 1766 44 1773 1771
14 LDD AI3A 1771 69 1774 1777
15 SRT 0005 POWER 1777 30 0005 1790
16 SDA AI3 SET EXPNNTS 1790 22 1793 1796
17 BMI AI2 AND THEN 1796 46 1899 1754
18 RAM ARTHE PERFORM 1899 67 1902 1817
19 STL ARTHF ADDITION 1817 20 1772 1776
20 RAL ARTHH 1776 65 1788 1943
21 LDD ARTHM AI3 1943 69 1824 1793
22 AI3 SRT 0000 AI3B 1793 30 0000 1811
23 AI3A SRT 0000 AI3B 1774 30 0000 1811
24 AI3B ALO 8001 AI5 1811 15 8001 1770
25 AI2 RAL ARTHM 1754 65 1824 1779
26 LDD ARTHH AI3 1779 69 1788 1793
27 AI5 RAU 8002 CLEAR ARTHE 1770 60 8002 1780
28 STL ARTHE ARTHS TO SCALE 1780 20 1902 1762
29 AI12 BMI AI13 1773 46 1778 1828
30 RAL ARTHG AI10 1778 65 1794 1904
31 AI13 RAL ACC ARTHX 1828 65 0000 1786
32 ARTHB STD ARTHY BREAK UP EXP 1805 24 1808 1826
33 SLT 0008 AND MANTISSA 1826 35 0008 1996
34 STL ARTHE STORE POWER 1996 20 1902 1755
35 RAU 8003 AND MANTISSA 1755 60 8003 1763
36 SLT 0001 OF LOWER 1763 35 0001 1769
37 STU ARTHM 1769 21 1824 1997
38 RAU ACC 1997 60 0000 1855
39 SRT 0002 STORE POWER 1855 30 0002 1761
40 SLO 8002 AND MANTISSA 1761 16 8002 1819
41 SLT 0001 OF ACC 1819 35 0001 1775
42 ALO 8001 1775 15 8001 1783
43 STU ARTHH ARTHY 1783 21 1788 1808
44 ARTHS SCT 0000 NORMALIZE 1762 36 0000 1782
45 BOV AI6 BRNCH IF ZRO 1782 47 1942 1787
46 STL ARTHG SHIFT COUNT 1787 20 1794 1797
47 RAL 8003 ROUND ON 1797 65 8003 1905
48 SRD 0002 NINTH DIGIT 1905 31 0002 1813
49 SLT 0002 CHECK FOR 1813 35 0002 1869
50 STL ARTHM ROUNDOFF 1869 20 1824 1877
51 NZU AI7 AI8 OVERFLOW 1877 44 1831 1834
52 AI8 RAM 8003 AND 1834 67 8003 1841
53 SML ARTHG CORRECT IF 1841 18 1794 1800
54 ALO AJ2 NECESSARY 1800 15 1903 1822
55 SLT 0008 1822 35 0008 1791
56 RAL 8002 1791 65 8002 1849
57 AML ARTHE 1849 17 1902 1757
58 ALO ARTHF 1757 15 1772 1827
59 BMI AI11A PWR TOO SMAL 1827 46 1752 1781
60 NZU AI11 PWR TOO LRGE 1781 44 1785 1836
61 SLT 0002 1836 35 0002 1893
62 STU ACC1 1893 21 1998 1901
63 RAL ARTHM 1901 65 1824 1829
64 BMI AI9 COMBINE 1829 46 1944 1995
65 SLO ACC1 AI10 1944 16 1998 1904
66 AI10 STL ACC ARTHX AND 1904 20 0000 1786
67 AI9 ALO ACC1 AI10 1995 15 1998 1904
68 AI7 SRT 0001 ADJUST 1831 30 0001 1792
69 STL ARTHM 1792 20 1824 1927
70 SLT 0001 AI8 1927 35 0001 1834
71 AI6 RAL 8003 AI10 1942 65 8003 1904
72 E00AJ STD ARTHX MULTIPLY 1832 24 1786 1839
73 LDD ARTHB 1839 69 1852 1805
74 RAM 8002 ACC POWER 1852 67 8002 1867
75 SLO AJ1 MINUS 48 1867 16 1820 1825
76 STL ARTHF 1825 20 1772 1875
77 RAU ARTHH 1875 60 1788 1756
78 MPY ARTHM ARTHS 1756 19 1824 1762
79 E00AG STD ARTHX AG1 DIVIDE 1830 24 1786 1889
80 AG1 LDD ARTHB IS DIVISOR 1889 69 1842 1805
81 NZU AG3 ZER0 1842 44 1812 1846
82 RSM 8002 DIVISOR 1812 68 8002 1821
83 ALO AG2 POWER MINUS 1821 15 1876 1895
84 STL ARTHF 49 1895 20 1772 1768
85 RAU ARTHM SH1FT 1768 60 1824 1879
86 SRT 0001 DIVIDEND 1879 30 0001 1885
87 DVR ARTHH DO DIVIDE 1885 64 1788 1803
88 RAU 8002 ARTHS 1803 60 8002 1762
89 E00AO STD ARTHX DIV REVERSE 1882 24 1786 1989
90 STL ACC2 1989 20 1843 1896
91 RAL ACC 1896 65 0000 1810
92 LDD ACC2 1810 69 1843 1897
93 STD ACC AG1 1897 24 0000 1889
94 E00AF STD ACC6 FL0AT TO LWR 1947 24 1858 1911
95 LDD AE4 E00AE AND ACC 1911 69 1925 1928
96 AE4 STL ACC ACC6 1925 20 0000 1858
97 E00AE STD ARTHX FLOAT TO LWR 1928 24 1786 1840
98 RAU 8002 ONLY 1840 60 8002 1753
99 SCT 0000 NORMALIZE 1753 36 0000 1975
100 STL ACC3 1975 20 1881 1784
101 BOV AD1 ZER0 CHECK 1784 47 1851 1890
102 RAL 8003 1890 65 8003 1798
103 SRD 0002 ROUND FOR 1798 31 0002 1807
104 SLT 0002 PLACING EXP 1807 35 0002 1764
105 NZU AE6 CHECK ROUND 1764 44 1818 1891
106 LDD 8003 OVERFLOW 1818 69 8003 1874
107 SRT 0001 1874 30 0001 1884
108 ALO 8001 AE6 1884 15 8001 1891
109 AE6 BMI AE2 INSERT 1891 46 1844 1845
110 ALO AJ3 AE5 EXP0NENT 1845 15 1848 1804
111 AE2 SLO AJ3 AE5 1844 16 1848 1804
112 AE5 SLO ACC3 ARTHX 1804 16 1881 1786
113 E00TH STD ARTHX FIX L0WER 1932 24 1786 1990
114 SLT 0008 TO LOWER 1990 35 0008 1859
115 STU ARTHM 1859 21 1824 1878
116 RAM 8002 TEST EXP 1878 67 8002 1887
117 SLO AJ5 STORE ZER0 1887 16 1940 1945
118 BMI AD1 IF LESS THAN 1945 46 1851 1850
119 SLO AJ4 50 ALARM 1850 16 1853 1758
120 BMI AD3 1F GRTR THAN 1758 46 1861 1862
121 SRT 0004 59 1861 30 0004 1921
122 ALO AR7 1921 15 1924 1929
123 LDD AD2A MODIFY 1929 69 1835 1838
124 SDA AD2 SHIFT 1838 22 1991 1971
125 RAL ARTHM 1971 65 1824 1930
126 SLT 0002 AD2 1930 35 0002 1991
127 AD1 RAL 8003 ARTHX STORE ZERO 1851 65 8003 1786
128 AD2 SRT 0000 ARTHX SHIFT C0NST 1991 30 0000 1786
129 AD2A SRT 0000 ARTHX 1835 30 0000 1786
130 AD3 LDD ARTHX 3031 FIX ALARM 1862 69 1786 3031
131 AG3 LDD ARTHX 3061 DIVIDE ALARM 1846 69 1786 3061
132 AI11 LDD ARTHX 3081 SCALE ALARM 1785 69 1786 3081
133 AI11A HLT 1081 AI6 1752 01 1081 1942
134 AG2 49 0000 0000 1876 49 0000 0000
135 AJ1 48 0000 0000 1820 48 0000 0000
136 AJ2 00 0000 0001 1903 00 0000 0001
137 AJ3 00 0000 0059 1848 00 0000 0059
138 AJ4 10 0000 0000 1853 10 0000 0000
139 AJ5 50 0000 0000 1940 50 0000 0000
140 E00AQ STD J0001 AQ1 READ 1974 24 1977 1880
141 AQ1 RD1 1976 AQ3 1880 70 1976 1898
142 AQ3 RAM P0001 AQ3A 1898 67 1951 1806
143 AQ3B RAM P0001 AQ3A CHECK FOR 1892 67 1951 1806
144 AQ3A NZE AQ8 LAST WORD 1806 45 1860 1837
145 LDD AQ5 AQ4 ON CARD 1860 69 1863 1816
146 AQ4 STD ACC4 1816 24 1870 1873
147 AUP 8003 READ IN 1873 10 8003 1931
148 SRT 0004 LABEL FOR 1931 30 0004 1941
149 SIA ACC5 PRESENT 1941 23 1795 1948
150 SLO 8001 VARIABLE 1948 16 8001 1856
151 ALO 8002 GET I Y 0R C 1856 15 1809 8002
152 RAU 0000 ADDRESS FROM 1809 60 0000 1987 was RAU A000 - 00 0000 0000
153 AUP ACC5 ABCON DICT 1987 10 1795 1949
154 SLT 0004 ACC4 GENERATE 1949 35 0004 1870
155 AQ5 AUP AQ7 1NSTRUCTION 1863 10 1866 1857
156 ALO P0010 1857 15 1960 1965
157 ALO 8002 GET AND 1965 15 1968 8002
158 LDD P0002 8003 STORE WORD 1968 69 1952 8003
159 AQ7 STD 0000 1866 24 0000 1907
160 RAL P0010 INCREMENT 1907 65 1960 1915
161 ALO AQ9 WORD COUNT 1915 15 1918 1854
162 STL P0010 1854 20 1960 1963
163 ALO AQ3B 8002 1963 15 1892 8002
164 AQ8 RAL P0001 CHECK FOR 1837 65 1951 1765
165 BMI J0001 AQ1 LAST CARD 1765 46 1977 1880
166 E00AR STD P0005 PUNCH 0UT 1801 24 1955 1908
167 STU J0003 1908 21 1979 1935
168 SIA P0008 STORE STMNT 1935 23 1958 1912
169 STU J0004 NUMBER 1912 21 1980 1886
170 SDA P0004 STORE WORD 1886 22 1954 1909
171 SLO 8001 COUNT 1909 16 8001 1917
172 NZE AR10 AR9 TEST ZERO 1917 45 1920 1872
173 AR10 STU J0005 STMT NUMBER 1920 21 1981 1814
174 STD J0006 SET PUNCH 1814 24 1982 1972
175 STD J0007 BAND TO 1972 24 1983 1864
176 STD J0008 ZEROES 1864 24 1984 1888
177 STD P0010 AR3 SET COUNTER 1888 24 1960 1913
178 AR3 RAL P0004 1913 65 1954 1910
179 SLO AR7 1910 16 1924 1936
180 BMI AR8 TEST WORD 1936 46 1994 1992
181 STL P0004 AR4 COUNT 1992 20 1954 1865
182 AR4 ALO 8002 GET WORD 1865 15 1868 8002
183 RAL P0000 LABEL FROM 1868 65 1950 1914
184 AUP 8003 PUNCH CONSTS 1914 10 8003 1922
185 SLT 0001 1922 35 0001 1938
186 SDA P0007 MODIFY LABEL 1938 22 1957 1961
187 SLO 8001 1961 16 8001 1919
188 SRT 0001 1919 30 0001 1926
189 ALO P0007 1926 15 1957 1962
190 SLT 0004 INSERT STMNT 1962 35 0004 1923
191 ALO P0008 NUMBER 1923 15 1958 1964
192 AUP P0010 1964 10 1960 1916
193 AUP 8003 1916 10 1969 8003
194 STL J0001 STORE LABEL 1969 20 1977 1988
195 RAL 8002 FOR PUNCHING 1988 65 8002 1900
196 LDD AQ4 MODIFY LABEL 1900 69 1906 1816
197 AUP AR6 INTO DRUM 1906 10 1966 1934
198 ALO P0010 LOC IN READ 1934 15 1960 1967
199 ALO 8003 GET WORD 1967 15 1970 8003
200 STD J0002 STORE IN 1970 24 1978 1993
201 RAL P0010 PUNCH BAND 1993 65 1960 1815
202 ALO AQ9 1815 15 1918 1973
203 STL P0010 AR3 1973 20 1960 1913
204 AR6 LDD 0000 8002 1966 69 0000 8002
205 AR7 00 0001 0000 1924 00 0001 0000
206 AR8 PCH J0001 P0005 PUNCH 1994 71 1977 1955
207 AR9 RAL 8000 IF STMT NMBR 1872 65 8000 1937
208 BMI AR10 P0005 ZRO PCH ONLY 1937 46 1920 1955
209 AQ9 00 0002 0000 IF 8000 NEG 1918 00 0002 0000
210 J0010 80 0000 8800 CONTROL CNST 1986 80 0000 8800
211 E00AL STD ARTHY 1654 24 1808 1732
212 STL ARTHH 1732 20 1788 1694
213 RAL ACC AL17A IS POWER 1694 65 0000 1709
214 AL17A STD ACC4 TWO 1709 24 1870 1723
215 STD ARTHX IF SO 1723 24 1786 1739
216 SLO AL16 MULTIPLY 1739 16 1686 1692
217 NZE AL18 1692 45 1731 1751
218 RAL ARTHH 1751 65 1788 1645
219 STD ACC 1645 24 0000 1655
220 LDD ARTHY E00AJ 1655 69 1808 1832
221 AL18 RAL ARTHH AL17 1731 65 1788 1693
222 AL17 SLT 0008 1693 35 0008 1661
223 SLO 8002 1661 16 8002 1720
224 SLT 0002 Q EQUALS 1720 35 0002 1677
225 ALO 8001 MANTISSA 1677 15 8001 1690
226 STU ARTHF OF ARGUMENT 1690 21 1772 1675
227 RAM 8002 1675 67 8002 1683
228 SLO AL1 STORE EXPNNT 1683 16 1736 1691
229 SLT 0002 OF ARGMNT 1691 35 0002 1698
230 STU ARTHE 1698 21 1902 1706
231 RAL AL2 MANTISSA OF 1706 65 1660 1666
232 STL ARTHM Z IS ONE 1666 20 1824 1678
233 RAL AL1 1678 65 1736 1695
234 SLT 0002 EXP OF Z IS 1695 35 0002 1702
235 STU ARTHG AL3 50 1702 21 1794 1747
236 AL3 RAU ACC K IS GRTST 1747 60 0000 1708
237 MPY AL1 INTEGER IN 1708 19 1736 1738
238 STU ACC K OVER TWO 1738 21 0000 1658
239 RAL 8002 IS REMAINDER 1658 65 8002 1667
240 NZE AL4 ZER0 1667 45 1670 1646
241 RAU ARTHM IF NOT SET Z 1670 60 1824 1729
242 LDD AL5 EQUALS TO 1729 69 1682 1737
243 ALO ARTHG Z TIMES Q 1682 15 1794 1715
244 STL ARTHG VIA 1715 20 1794 1699
245 RAL ARTHD SUBROUTINE 1699 65 1665 1669
246 STL ARTHM 1669 20 1824 1638
247 NZE AL4 AL20 1638 45 1646 1741
248 AL4 RAU ACC IF K NONZERO 1646 60 0000 1712
249 NZU AL7 Q EQUALS 1712 44 1668 1721
250 RAU ARTHF 1668 60 1772 1679
251 LDD AL5 VIA SUBRTNE 1679 69 1684 1737
252 ALO ARTHE 1684 15 1902 1714
253 STL ARTHE 1714 20 1902 1662
254 RAL ARTHD 1662 65 1665 1719
255 STL ARTHF AL3 1719 20 1772 1747
256 AL7 RAU ARTHG SET EXPONNTS 1721 60 1794 1700
257 SRT 0002 ARTHS 1700 30 0002 1663
258 NZU AI11 EXP OVERSCAL 1663 44 1785 1722
259 STL ARTHE 1722 20 1902 1664
260 STU ARTHF 1664 21 1772 1671
261 RAU ARTHM 1671 60 1824 1680
262 SRT 0001 AL20 1680 30 0001 1741
263 AL20 LDD AL8 1741 69 1716 1724
264 STD ARTHX ARTHS 1724 24 1786 1762
265 AL8 RAL ACC4 1716 65 1870 1648
266 BMI AL10 1648 46 1701 1743
267 RAL ACC ARTHY 1743 65 0000 1808
268 AL10 RAL ACC Z EQUALS ONE 1701 65 0000 1672
269 NZE AL12 OVER Z IF 1672 45 1676 1681
270 RAL AL11 K NEG AND Z 1676 65 1685 1649
271 LDD ARTHY E00AG NON ZERO 1649 69 1808 1830
272 AL12 LDD ARTHY 3111 ALARM IF ZRO 1681 69 1808 3111
273 AL5 STD ARTHX 1737 24 1786 1652
274 MPY ARTHF 1652 19 1772 1673
275 SRT 0009 1673 30 0009 1644
276 NZU AL14 1644 44 1650 1639
277 STL ARTHD 1639 20 1665 1640
278 RAL 8003 AL15 1640 65 8003 1641
279 AL15 ALO ARTHE ARTHX 1641 15 1902 1786
280 AL14 SRT 0001 1650 30 0001 1643
281 STL ARTHD 1643 20 1665 1642
282 RAL AJ2 AL15 1642 65 1903 1641
283 AL1 50 0000 0000 1736 50 0000 0000
284 AL2 10 0000 0000 1660 10 0000 0000
285 AL11 10 0000 0050 1685 10 0000 0050
286 AL16 00 0000 0002 1686 00 0000 0002
287 AJ2 00 0000 0001 1903 00 0000 0001
288 E00AN STD ARTHY POWER 1651 24 1808 1687
289 LDD ACC FLOAT FIX 1687 69 0000 1674
290 STD ARTHH REVERSE 1674 24 1788 1745
291 STL ACC AL17A 1745 20 0000 1709
292 E00AK STD ARTHY POWER FIXFIX 1704 24 1808 1711
293 STL ARTHG AK1 Q IS ARGMNT 1711 20 1794 1647
294 AK1 RAM ACC K EQUALS 1647 67 0000 1705
295 STL ARTHF ABVAL POWER 1705 20 1772 1725
296 RAL AJ2 Z EQUALS 1725 65 1903 1707
297 STL ARTHH AK3 ONE 1707 20 1788 1718
298 AK3 RAU ARTHF K IS GTST 1718 60 1772 1727
299 MPY AK4 INTGR IN 1727 19 1730 1717
300 STU ARTHF K OVER TWO 1717 21 1772 1726
301 RAL 8002 IS REMAINDER 1726 65 8002 1735
302 NZE AK5 ZERO 1735 45 1734 1742
303 RAU ARTHH IF NOT Z IS 1734 60 1788 1688
304 MPY ARTHG Z TIMES Q 1688 19 1794 1733
305 STL ARTHH AK5 1733 20 1788 1742
306 AK5 RAU ARTHF 1742 60 1772 1728
307 NZU AK6 1S K ZERO 1728 44 1740 1746
308 RAU ARTHG IF NOT 1740 60 1794 1749
309 MPY 8001 Q EQUALS 1749 19 8001 1689
310 STL ARTHG AK3 Q SQUARED 1689 20 1794 1718
311 AK6 RAU ACC IS POWER NEG 1746 60 0000 1656
312 BMI AK7 IF SO IS Z 1656 46 1659 1713
313 RAM ARTHH ZERO 1659 67 1788 1744
314 NZE AK8 IF NOT IS Z 1744 45 1748 1750
315 SLO AJ2 ONE 1748 16 1903 1657
316 NZE AK10 AK7 1657 45 1710 1713
317 AK7 RAL ARTHH ARTHY EXHIBIT Z 1713 65 1788 1808
318 AK10 RAL 8003 ARTHY 1710 65 8003 1808
319 AK8 LDD ARTHY 3101 ALARM 1750 69 1808 3101
320 AK4 50 0000 0000 1730 50 0000 0000
321 AJ2 00 0000 0001 1903 00 0000 0001
322 E00AM STD ARTHY INTERCHGE 1653 24 1808 1696
323 LDD ACC ACC AND 1696 69 0000 1703
324 STD ARTHG LOWER 1703 24 1794 1697
325 STL ACC AK1 THEN E00AK 1697 20 0000 1647
326 1976 RAM 1951 1976 67 1951 1623
327 AUP 8003 1623 10 8003 1632
328 SLT 0004 1632 35 0004 1624
329 SDA P0009 1624 22 1959 1626
330 SRT 0004 1626 30 0004 1637
331 LDD AQ4 1637 69 1627 1816
332 RAL 8003 1627 65 8003 1636
333 AUP P0009 1636 10 1959 1633
334 ALO 8001 1633 15 8001 1631
335 AUP AQ9B 1631 10 1625 1628
336 ALO AQ10 AQ11 1628 15 1634 1622
337 AQ11 SUP AQ9B 1622 11 1625 1630
338 NZU AQ8 1630 44 1635 1837
339 AUP 8001 1635 10 8001 1621
340 SUP AR7 1621 11 1924 1629
341 SLO 8001 8003 1629 16 8001 8003
342 AQ9B LDD 1952 8002 1625 69 1952 8002
343 AQ10 STD 0000 AQ11 1634 24 0000 1622
344 E00AC STD ACC6 EXPONENTIAL 1605 24 1858 1611
345 NZE AC5 IS ARGUMENT 1611 45 1615 1504
346 SLT 0008 ZERO 1615 35 0008 1583
347 STU ARTHH IF NOT LET 1583 21 1788 1592
348 RSM 8002 N BE MANTSA 1592 68 8002 1601
349 ALO AC3 X BE POWER 1601 15 1604 1609
350 BMI AC4 IS X GRTR 1609 46 1513 1613
351 SLT 0001 THAN TWO 1613 35 0001 1619
352 NZU AC5 OR LESS THAN 1619 44 1504 1574
353 SRT 0005 MINUS EIGHT 1574 30 0005 1587
354 ALO AC6 IF X WITHIN 1587 15 1590 1595
355 STL ARTHD BOUNDS GEN 1595 20 1665 1618
356 RAU ARTHH INT AND 1618 60 1788 1593
357 SRT 0006 ARTHD FRACT PARTS 1593 30 0006 1665
358 AC3 51 0000 0000 OF ARGUMENT 1604 51 0000 0000
359 AC6 SRT 0000 IS ARG NEG 1590 30 0000 1584
360 BMI AC8 1F SO INT IS 1584 46 1589 1602
361 STU ARTHD AC1 INT MINUS 1 1602 21 1665 1585
362 AC8 SUP AJ2 AND FRACT IS 1589 11 1903 1607
363 STU ARTHD FRACT PLUS 1 1607 21 1665 1568
364 RAL 8002 1568 65 8002 1577
365 ALO AC2 AC1 1577 15 1580 1585
366 AC2 99 9999 9999 1580 99 9999 9999
367 AC1 STL ARTHH 1585 20 1788 1594
368 RAU 8002 1594 60 8002 1603
369 MPY AC18 GENERATE 1603 19 1606 1608
370 RAU 8003 1608 60 8003 1616
371 AUP AC17 POLYNOMIAL 1616 10 1620 1586
372 MPY ARTHH 1586 19 1788 1591
373 RAU 8003 APPROXIM 1591 60 8003 1561
374 AUP AC16 ATION 1561 10 1566 1582
375 MPY ARTHH 1582 19 1788 1596
376 RAU 8003 FOR 1596 60 8003 1612
377 AUP AC15 1612 10 1617 1578
378 MPY ARTHH EXPONENTIAL 1578 19 1788 1550
379 RAU 8003 1550 60 8003 1614
380 AUP AC14 1614 10 1567 1579
381 MPY ARTHH 1579 19 1788 1598
382 RAU 8003 1598 60 8003 1555
383 AUP AC13 1555 10 1560 1576
384 MPY ARTHH 1576 19 1788 1552
385 RAU 8003 1552 60 8003 1559
386 AUP AC12 1559 10 1564 1572
387 MPY ARTHH SQUARE 1572 19 1788 1573
388 RAU 8003 RESULT 1573 60 8003 1600
389 AUP AJ4 SCALE AND 1600 10 1853 1571
390 MPY 8003 FLOAT THEN 1571 19 8003 1557
391 SRT 0001 EXIT 1557 30 0001 1588
392 STU ACC2 1588 21 1843 1597
393 RAU AC19 1597 60 1551 1556
394 AUP ARTHD 1556 10 1665 1933
A394 BMI ACC6 1933 46 1858 1569
395 SRT 0002 1569 30 0002 1575
396 NZU AC21 1575 44 1514 1581
397 AUP ACC2 1581 10 1843 1599
398 SRT 0008 ACC6 1599 30 0008 1858
399 AC4 RAL ARTHH 1513 65 1788 1503
400 BMI AC21 1503 46 1510 1514
401 RAL 8003 ACC6 1510 65 8003 1858
402 AC5 RAL AC20 ACC6 ARGMNT ZERO 1504 65 1565 1858
403 AC21 LDD ACC6 3021 ALARM STOP 1514 69 1858 3021
404 AJ2 00 0000 0001 1903 00 0000 0001
405 AJ4 10 0000 0000 1853 10 0000 0000
406 AC12 11 5129 2776 1564 11 5129 2776
407 AC13 06 6273 0884 1560 06 6273 0884
408 AC14 02 5439 3575 1567 02 5439 3575
409 AC15 00 7295 1737 1617 00 7295 1737
410 AC16 00 1742 1120 1566 00 1742 1120
411 AC17 00 0255 4918 1620 00 0255 4918
412 AC18 00 0093 2643 1606 00 0093 2643
413 AC19 00 0000 0050 1551 00 0000 0050
414 AC20 10 0000 0050 1565 10 0000 0050
415 E00A8 NZE AB10 IS ARG ZERO 1507 45 1562 1505
416 STD ARTHD 1562 24 1665 1570
417 BMI AB10 IS ARG NEG 1570 46 1505 1524
418 SLT 0008 1524 35 0008 1543
419 STL ARTHE STORE POWER 1543 20 1902 1558
420 RAU 8003 FORM Z 1558 60 8003 1515
421 AUP AB1 EQUAL ARG 1515 10 1518 1523
422 STU ACC3 MINUS ROOT 1523 21 1881 1535
423 SUP AB2 TEN OVER ARG 1535 11 1553 1563
424 DVR ACC3 PLUS ROOT 1563 64 1881 1500
425 STL ARTHY TEN 1500 20 1808 1511
426 RAU 8002 1511 60 8002 1519
427 MPY 8001 Z SQUARE 1519 19 8001 1521
428 STU ACC3 1521 21 1881 1536
429 RAU 8003 GENERATE 1536 60 8003 1544
430 MPY AB7 1544 19 1548 1554
431 RAU 8003 POLYNOMIAL 1554 60 8003 1512
432 AUP AB6 1512 10 1516 1526
433 MPY ACC3 APPROXIMATN 1526 19 1881 1531
434 RAU 8003 1531 60 8003 1540
435 AUP AB5 1540 10 1549 1527
436 MPY ACC3 1527 19 1881 1538
437 RAU 8003 1538 60 8003 1502
438 AUP AB4 1502 10 1610 1528
439 MPY ACC3 1528 19 1881 1533
440 RAU 8003 1533 60 8003 1541
441 AUP AB3 1541 10 1545 1501
442 MPY ARTHY 1501 19 1808 1508
443 RAL 8003 1508 65 8003 1517
444 ALO AB8 1517 15 1520 1525
445 SRT 0002 1525 30 0002 1532
446 ALO ARTHE ADD POWER 1532 15 1902 1509
447 SLO AB8 1509 16 1520 1529
448 SRD 0002 ROUND 1529 31 0002 1537
449 RAU 8002 1537 60 8002 1546
450 SCT 0000 NORMALIZE 1546 36 0000 1522
451 BOV AB12 1522 47 1506 1530
452 BMI AB13 1530 46 1534 1539
453 SUP AB9 AB11 ADJUST 1534 11 1542 1547
454 AB11 SUP 8002 AB12 POWER 1547 11 8002 1506
455 AB12 RAL 8003 ARTHD 1506 65 8003 1665
456 AB13 AUP AB9 AB11 1539 10 1542 1547
457 AB10 LDD ARTHD 3011 ALARM 1505 69 1665 3011
458 AB1 00 3162 2780 1518 00 3162 2780
459 AB2 00 6324 5560 1553 00 6324 5560
460 AB3 86 8591 7180 1545 86 8591 7180
461 AB4 28 9335 5240 1610 28 9335 5240
462 AB5 17 7522 0710 1549 17 7522 0710
463 AB6 09 4376 4760 1516 09 4376 4760
464 AB7 19 1337 7140 1548 19 1337 7140
465 AB8 50 0000 0000 1520 50 0000 0000
466 AB9 00 0000 0053 1542 00 0000 0053
1 VARS
ARTHX 00 0000 0000 1786 00 0000 0000
ARTHD 00 0000 0000 1665 00 0000 0000
ARTHG 00 0000 0000 1794 00 0000 0000
ARTHF 00 0000 0000 1772 00 0000 0000
ARTHE 00 0000 0000 1902 00 0000 0000
ARTHH 00 0000 0000 1788 00 0000 0000
ARTHM 00 0000 0000 1824 00 0000 0000
ARTHY 00 0000 0000 1808 00 0000 0000
ACC 00 0000 0000 0000 00 0000 0000
ACC1 00 0000 0000 1998 00 0000 0000
ACC2 00 0000 0000 1843 00 0000 0000
ACC3 00 0000 0000 1881 00 0000 0000
ACC4 00 0000 0000 1870 00 0000 0000
ACC5 00 0000 0000 1795 00 0000 0000
ACC6 00 0000 0000 1858 00 0000 0000
J0001 00 0000 0000 1977 00 0000 0000
J0002 00 0000 0000 1978 00 0000 0000
J0003 00 0000 0000 1979 00 0000 0000
J0004 00 0000 0000 1980 00 0000 0000
J0005 00 0000 0000 1981 00 0000 0000
J0006 00 0000 0000 1982 00 0000 0000
J0007 00 0000 0000 1983 00 0000 0000
J0008 00 0000 0000 1984 00 0000 0000
P0000 00 0000 0000 1950 00 0000 0000
P0001 00 0000 0000 1951 00 0000 0000
P0002 00 0000 0000 1952 00 0000 0000
P0004 00 0000 0000 1954 00 0000 0000
P0005 00 0000 0000 1955 00 0000 0000
P0007 00 0000 0000 1957 00 0000 0000
P0008 00 0000 0000 1958 00 0000 0000
P0009 00 0000 0000 1959 00 0000 0000
P0010 00 0000 0000 1960 00 0000 0000

23
I650/sw/it_reservation_p1.dck Normal file
View file

@ -0,0 +1,23 @@
5 reservation package r1
5 reservation package r1
4 laaaa u1999 initial locn
4 acc u0000 reserve acc
4 p 1950 reserve for
3 p1951 1960 punch consts
4 w 1977 reserve w
3 w1978 1986 storage band
3 j1977 1986 punch band
1 1735 1950 reserve
1 1961 1976 for
1 1987 1998 subroutines
4 e00th 1932 fix entry
4 e00ae 1928 float to lwr
4 e00af 1947 float to acc
4 e00ag 1830 divide entry
4 e00ai 1833 add entry
4 e00aj 1832 multiply
4 e00ao 1882 rev divide
4 e00aq 1974 read entry
4 e00ar 1801 punch entry
1809raua0000 1987 get a0000
5 last card of r1

23
I650/sw/it_reservation_p1_listing.txt Normal file
View file

@ -0,0 +1,23 @@
5 RESERVATION PACKAGE R1
5 RESERVATION PACKAGE R1
4 LAAAA U1999 INITIAL LOCN
4 ACC U0000 RESERVE ACC
4 P 1950 RESERVE FOR
3 P1951 1960 PUNCH CONSTS
4 W 1977 RESERVE W
3 W1978 1986 STORAGE BAND
3 J1977 1986 PUNCH BAND
1 1735 1950 RESERVE
1 1961 1976 FOR
1 1987 1998 SUBROUTINES
4 E00TH 1932 FIX ENTRY
4 E00AE 1928 FLOAT TO LWR
4 E00AF 1947 FLOAT TO ACC
4 E00AG 1830 DIVIDE ENTRY
4 E00AI 1833 ADD ENTRY
4 E00AJ 1832 MULTIPLY
4 E00AO 1882 REV DIVIDE
4 E00AQ 1974 READ ENTRY
4 E00AR 1801 PUNCH ENTRY
1809 RAU A0000 1987 GET A0000
5 LAST CARD OF R1

27
I650/sw/it_reservation_p2.dck Normal file
View file

@ -0,0 +1,27 @@
5 reservation package r2
5 reservation package r2
4 laaaa u1999 initial locn
4 acc u0000 reserve acc
4 p 1950 reserve for
3 p1951 1960 punch consts
4 w 1977 reserve w
3 w1978 1986 storage band
3 j1977 1986 punch band
1 1621 1950 reserve
1 1961 1976 for
1 1987 1998 subroutines
4 e00th 1932 fix entry
4 e00ae 1928 float to lwr
4 e00af 1947 float to acc
4 e00ag 1830 divide entry
4 e00ai 1833 add entry
4 e00ak 1704 fix fix powr
4 e00al 1654 flt fix powr
4 e00am 1653 rv fx fx pwr
4 e00an 1651 rv fl fx pwr
4 e00aj 1832 multiply
4 e00ao 1882 rev divide
4 e00aq 1974 read entry
4 e00ar 1801 punch entry
1809raua0000 1987 get a0000
5 last card of r2

27
I650/sw/it_reservation_p2_listing.txt Normal file
View file

@ -0,0 +1,27 @@
5 RESERVATION PACKAGE R2
5 RESERVATION PACKAGE R2
4 LAAAA U1999 INITIAL LOCN
4 ACC U0000 RESERVE ACC
4 P 1950 RESERVE FOR
3 P1951 1960 PUNCH CONSTS
4 W 1977 RESERVE W
3 W1978 1986 STORAGE BAND
3 J1977 1986 PUNCH BAND
1 1621 1950 RESERVE
1 1961 1976 FOR
1 1987 1998 SUBROUTINES
4 E00TH 1932 FIX ENTRY
4 E00AE 1928 FLOAT TO LWR
4 E00AF 1947 FLOAT TO ACC
4 E00AG 1830 DIVIDE ENTRY
4 E00AI 1833 ADD ENTRY
4 E00AK 1704 FIX FIX POWR
4 E00AL 1654 FLT FIX POWR
4 E00AM 1653 RV FX FX PWR
4 E00AN 1651 RV FL FX PWR
4 E00AJ 1832 MULTIPLY
4 E00AO 1882 REV DIVIDE
4 E00AQ 1974 READ ENTRY
4 E00AR 1801 PUNCH ENTRY
1809 RAU A0000 1987 GET A0000
5 LAST CARD OF R2

25
I650/sw/it_reservation_p3.dck Normal file
View file

@ -0,0 +1,25 @@
5 reservation package r3
5 reservation package r3
4 laaaa u1999 initial locn
4 acc u0000 reserve acc
4 p 1950 reserve for
3 p1951 1960 punch consts
4 w 1977 reserve w
3 w1978 1986 storage band
3 j1977 1986 punch band
1 1613 1950 reserve
1 1961 1976 for
1 1987 1998 subroutines
4 e00ab 1638 logarithm
4 e00ac 1705 exponential
4 e00th 1932 fix entry
4 e00ae 1928 float to lwr
4 e00af 1947 float to acc
4 e00ag 1830 divide entry
4 e00ai 1833 add entry
4 e00aj 1832 multiply
4 e00ao 1882 rev divide
4 e00aq 1974 read entry
4 e00ar 1801 punch entry
1809raua0000 1987 get a0000
5 last card of r3

25
I650/sw/it_reservation_p3_listing.txt Normal file
View file

@ -0,0 +1,25 @@
5 RESERVATION PACKAGE R3
5 RESERVATION PACKAGE R3
4 LAAAA U1999 INITIAL LOCN
4 ACC U0000 RESERVE ACC
4 P 1950 RESERVE FOR
3 P1951 1960 PUNCH CONSTS
4 W 1977 RESERVE W
3 W1978 1986 STORAGE BAND
3 J1977 1986 PUNCH BAND
1 1613 1950 RESERVE
1 1961 1976 FOR
1 1987 1998 SUBROUTINES
4 E00AB 1638 LOGARITHM
4 E00AC 1705 EXPONENTIAL
4 E00TH 1932 FIX ENTRY
4 E00AE 1928 FLOAT TO LWR
4 E00AF 1947 FLOAT TO ACC
4 E00AG 1830 DIVIDE ENTRY
4 E00AI 1833 ADD ENTRY
4 E00AJ 1832 MULTIPLY
4 E00AO 1882 REV DIVIDE
4 E00AQ 1974 READ ENTRY
4 E00AR 1801 PUNCH ENTRY
1809 RAU A0000 1987 GET A0000
5 LAST CARD OF R3

29
I650/sw/it_reservation_p4.dck Normal file
View file

@ -0,0 +1,29 @@
5 reservation package r4
5 reservation package r4
4 laaaa u1999 initial locn
4 acc u0000 reserve acc
4 p 1950 reserve for
3 p1951 1960 punch consts
4 w 1977 reserve w
3 w1978 1986 storage band
3 j1977 1986 punch band
1 1500 1950 reserve
1 1961 1976 for
1 1987 1998 subroutines
4 e00ab 1507 logarithm
4 e00ac 1605 exponential
4 e00th 1932 fix entry
4 e00ae 1928 float to lwr
4 e00af 1947 float to acc
4 e00ag 1830 divide entry
4 e00ai 1833 add entry
4 e00aj 1832 multiply
4 e00ak 1704 fix fix powr
4 e00al 1654 flt fix powr
4 e00am 1653 rv fx fx pwr
4 e00an 1651 rv fl fx pwr
4 e00ao 1882 rev divide
4 e00aq 1974 read entry
4 e00ar 1801 punch entry
1809raua0000 1987 get a0000
5 last card of r4

29
I650/sw/it_reservation_p4_listing.txt Normal file
View file

@ -0,0 +1,29 @@
5 RESERVATION PACKAGE R4
5 RESERVATION PACKAGE R4
4 LAAAA U1999 INITIAL LOCN
4 ACC U0000 RESERVE ACC
4 P 1950 RESERVE FOR
3 P1951 1960 PUNCH CONSTS
4 W 1977 RESERVE W
3 W1978 1986 STORAGE BAND
3 J1977 1986 PUNCH BAND
1 1500 1950 RESERVE
1 1961 1976 FOR
1 1987 1998 SUBROUTINES
4 E00AB 1507 LOGARITHM
4 E00AC 1605 EXPONENTIAL
4 E00TH 1932 FIX ENTRY
4 E00AE 1928 FLOAT TO LWR
4 E00AF 1947 FLOAT TO ACC
4 E00AG 1830 DIVIDE ENTRY
4 E00AI 1833 ADD ENTRY
4 E00AJ 1832 MULTIPLY
4 E00AK 1704 FIX FIX POWR
4 E00AL 1654 FLT FIX POWR
4 E00AM 1653 RV FX FX PWR
4 E00AN 1651 RV FL FX PWR
4 E00AO 1882 REV DIVIDE
4 E00AQ 1974 READ ENTRY
4 E00AR 1801 PUNCH ENTRY
1809 RAU A0000 1987 GET A0000
5 LAST CARD OF R4

175
I650/sw/it_run.ini Normal file
View file

@ -0,0 +1,175 @@
; set console -n log=log.txt
; set debug -n debug.txt
; set debug stdout
; set cpu debug=cmd;data;detail
; params: %1 source progrma card deck to compile with it
; %2 input program data card deck (if empty, do not attach input card)
; %3 output program data card deck (if empty, do not attach input card)
set cpu 2k
att cdp0 -n -q print.txt
; print IT source program
echo
carddeck -q print %1
; load IT compiler but do not execute it
echo ***
echo *** Load IT compiler deck into drum
echo ***
att cdr1 -q -l it_compiler.dck
d csw 70 1951 3000
d ar 8000
go
echo ***
echo *** Run IT compiler
echo ***
; Now put source cards in reader and start compiler
att cdr1 -q %1
set cdr1 wiring=it
att cdp1 -n -q deck_out.dck
set cdp1 echo, print, wiring=it
d csw 70 1999 3000
d ar 8000
go
; check if compilation ok
if accup=0 goto compile_ok
echo
echo *** (compilation error code in Upper ACC)
echo
ex accup
goto end
:compile_ok
; Prepare PIT deck (as compiled IT program)
; separate last 10 cards from compilation output deck (called reservation cards)
carddeck -q split -10 cdp1 deck_soap.dck deck_res.dck
det cdr1
; create the pit program deck with
; 1) reservation cards from compilation step
; 2) package used reservation deck
; 3) rest of compilation output
carddeck -q join deck_res.dck it_reservation_p1.dck deck_soap.dck as deck_pit.dck
; Load soap deck into drum (1 word per card format), but does not execute it
echo ***
echo *** Load soap deck into drum
echo ***
att cdr1 -q -l soapII.dck
d csw 7019519999
d ar 8000
go
echo ***
echo *** Apply IT modifications to soap deck
echo ***
att cdr1 -q -l it_soapII_patch.dck
d csw 7019519999
d ar 8000
go
; Now put source cards in reader and start soap assembler
echo ***
echo *** Assemble PIT deck
echo ***
att cdr1 deck_pit.dck
set cdr1 wiring=soap
att cdp1 -n -q deck_out.dck
set cdp1 echo, print, wiring=soap
d ar 1000
go
; Prepare SPIT deck (as assembled PIT program)
; create the spit program deck with
; 1) package cards
; 2) assembly output
det cdr1
det cdp1
carddeck -q join it_package_p1.dck deck_out.dck as deck_spit.dck
; Load deck into drum (1 word per card format), but does not execute it
echo ***
echo *** Read SPIT deck to run into drum
echo ***
; Load assembled deck into drum
; -l switch allows to load the symbolic info so debug cmd info will show
; soap source code read from card.
set cdr1 wiring=8WORD
att cdr1 -l deck_spit.dck
d csw 7019519999
d ar 8000
go
; attach input and output data deck
det cdr1
if "%2" == "" goto run1
att cdr1 -q %2
set cdr1 wiring=it
:run1
if "%3" == "" goto run2
att cdp1 -n -q %3
set cdp1 echo, print, wiring=it
:run2
; Now execute the loaded deck
echo ***
echo *** Run program
echo ***
; set csw to -1 to activate conditional type statement
d csw 0
d ar 1999
go
; clean up
del deck_pit.dck
del deck_spit.dck
del deck_soap.dck
del deck_res.dck
:end

164
I650/sw/it_soapIIA_patch_listing.txt Normal file
View file

@ -0,0 +1,164 @@
MODIFIED
INSTRUCTIONS
IN IT
SOAP DECK
AVAILABIKITY 0959 69 1956 8002 LD 1956 8002
READ CHANGES 1052 69 1952 8002 LD 1952 8002
WORDS 0992 65 1697 0970 RAL 1697 0970
CHANGES IN 0970 21 1977 0981 STU 1977 0981
AVAILABILITY 0981 24 1984 1560 STD 1984 1560
TABLE PUNCH 1042 24 1983 0990 STD 1983 0990
OUT ROUTINE 0990 22 1982 1138 STDA 1982 1138
FOR COMPILER 1138 10 1141 8002 AU 1141 8002
SOAP DECK 1124 00 0000 8808 NOOP 0000 8808
1039 24 ?982 1947 NOOP 0000 0024
1141 24 1978 1947 STD 1978 1947
1252 10 1983 1152 AU 1983 1152
CHANGES IN 1990 65 1986 0940 RAL 1986 0940
PUNCH OUT 0940 92 1950 0900 BRD2 1950 0900
ROUTINE 0900 35 0004 0918 SLT 0004 0918
FOR FIVE 0918 65 6002 1526 RAL 6002 1526
PER CARD 1526 35 0002 1180 SLT 0002 1180
PUNCH OUT 1180 44 1950 0985 BRNZU 1950 0985
0985 95 1242 0950 BRD5 1242 0950
1242 66 1983 0908 RSL 1983 0908
0950 65 1903 0908 RAL 1903 0908
0908 20 0928 1930 STL 0928 1930
1930 65 1978 1933 RAL 1978 1933
1933 10 1979 1383 AU 1979 1383
1303 45 1536 0917 BRNZ 1536 0917
BLANK CARD 1536 65 1984 0943 RAL 1984 0943
I E BLANK 0943 35 0002 0901 SLT 0002 0901
OP AND DATA 0901 21 0934 0926 STU 0934 0926
CODE CAUSES 0926 20 0933 0938 STL 0933 0938
TRANSFER 0944 30 0002 0925 SRT 0002 0925
INSTRUCTION 0925 15 0933 0926 AL 0933 0926
TO BE 0945 35 0004 0923 SLT 0004 0923
INSERTED 0923 10 0933 0912 AU 0933 0912
AND CAUSES 0912 21 0933 0911 STU 0933 0911
LAST CARD 0911 20 0934 0938 STL 0934 0938
TO BE 0946 15 0934 0911 AL 0934 0911
PUNCHED OUT 0947 30 0004 0919 SRT 0004 0919
0919 15 0934 0949 AL 0934 0949
TRANSFER 0949 20 0934 0902 STL 0934 0902
INSTRUCTION 0902 69 0909 1382 LD 0909 1382
TRANSFERS 1382 24 0938 0915 STD 0938 0915
FROM 5 PER 0915 65 0927 1183 RAL 0927 1183
CARD 0937 24 0908 0902 STD 0908 0902
LOADING 0906 69 0920 0937 LD 0920 0937
ROUTINE 1183 15 1522 0910 AL 1522 0910
INTO 0910 20 0927 1532 STL 0927 1532
COMPILED 0982 69 0914 0924 LD 0914 0924
PROGRAM 0924 24 1536 1950 STD 1536 1950
I E 1999 1532 71 0927 0906 PCH 0927 0906
0920 20 0928 1930 STL 0928 1930
0914 65 1964 0943 RAL 1964 0943
0938 65 1536 0907 RAL 1536 0907
0907 15 1522 1428 AL 1522 1428
1428 20 1536 0941 STL 1536 0941
0941 65 0908 0913 RAL 0908 0913
0913 15 1290 0922 AL 1290 0922
0922 20 0908 1950 STL 0908 1950
TYPE 6 CARD 1906 65 1953 1464 RAL 1953 1464
WITH WORD 1464 16 1167 1225 SL 1167 1225
ONE 1225 45 1332 1156 BRNZ 1332 1156
IN DATA 1156 69 1414 1524 LD 1414 1524
CAUSES ONE 1524 24 1990 8001 STD 1990 8001
PER CARD 1332 69 1485 1516 LD 1485 1516
NORNAL SOAP 1516 24 1990 1950 STD 1990 1950
OUTPUT 1167 76 7565 0000 76 Unknown opcode
ANY OTHER 1414 71 1977 0906 PCH 1977 0906
TYPE 6 CARD 1405 65 1986 0940 RAL 1986 0940
RESTORES 0917 69 0921 1429 LD 0921 1429
FIVE PER 1429 24 1904 1250 STD 1904 1250
CARD OUTPUT 1250 69 0902 0916 LD 0902 0916
0916 24 0938 1992 STD 0938 1992
1992 69 1648 1358 LD 1648 1358
1358 24 1532 0905 STD 1532 0905
0905 65 1568 0935 RAL 1568 0935
0935 24 1978 0908 STD 1978 0908
1648 69 1913 1267 LD 1913 1267
1267 24 1532 1914 STD 1532 1914
1914 71 0927 5678 PCH 0927 5678
1913 71 0927 1950 PCH 0927 1950
0921 00 1998 0000 NOOP 1998 0000
1568 00 0000 1999 NOOP 0000 1999
0909 65 1536 0907 RAL 1536 0907
0936 00 0800 8800 NOOP 0800 8800
0927 88 8888 0000 88 Unknown opcode
CHANGED 1948 65 1911 1916 RAL 1911 1916
STORAGE 1916 10 1931 8002 AU 1931 8002
TRANSFER 1934 15 1290 1949 AL 1290 1949
ROUTINE 1949 10 6001 1912 AU 6001 1912
WITH SOAP 1912 11 1915 1932 SU 1915 1932
1932 44 1998 1935 BRNZU 1998 1935
1911 69 1951 8003 LD 1951 8003
1931 24 1977 1934 STD 1977 1934
1915 24 1983 1934 STD 1983 1934
CHANGED 1186 15 1522 1344 AL 1522 1344
CONSTANT 1187 15 1522 1006 AL 1522 1006
LOCATIONS 1292 10 1522 1165 AU 1522 1165
WITHIN 1344 15 1522 1187 AL 1522 1187
SOAP 1105 14 1468 1224 DIV 1468 1224
1455 14 1468 1410 DIV 1468 1410
1088 10 1290 0998 AU 1290 0998
1939 15 1290 1647 LD 1984 1772
0953 15 1290 1221 AL 1290 1221
1056 15 1290 1127 AL 1290 1127
1243 10 1290 1322 AU 1290 1322
1364 15 1290 1371 AL 1290 1371
1947 15 1290 1075 AL 1290 1075
CHG INIT RTN 1273 24 1586 0906 STD 1586 0906
7 PER CARD 1984 70 1985 9999 STD 0000 1998
LOADING 1985 65 1951 0055 LD 1953 1983
ROUTINE FOR 0055 69 0008 0054 LD 0008 0054
IT 0054 22 0008 0058 STDA 0008 0058
0058 35 0004 0006 SLT 0004 0006
0006 15 8001 0056 AL 8001 0056
USES 2 0056 22 0009 0052 STDA 0009 0052
LOCATIONS 0052 65 0057 0053 RAL 0057 0053
1 TO 9 0053 10 0008 8002 AU 0008 8002
51 TO 58 0002 10 0005 0011 AU 0005 0011
11 1 84 0011 15 8001 0004 AL 8001 0004
AND 1985 0004 11 0009 0003 SU 0009 0003
0003 44 0007 1984 BRNZU 0007 1984
1984 10 8001 8002 STD 0000 1998
0008 24 0000 0002 STD 0000 0002
0057 69 1952 8003 LD 1952 8003
0005 00 0001 0000 NOOP 0001 0000
0007 10 6001 8002 AU 6001 8002
5 PER CARD 1998 70 1977 3000 RD 1977 3000
LOADING 1977 65 1958 1786 RAL 1958 1786
ROUTINE FOR 1786 35 0004 1794 SLT 0004 1794
IT 1794 69 1980 1795 LD 1980 1795
SUBROUTINE 1795 22 1980 1824 STDA 1980 1824
PACKAGES 1824 69 1956 1980 LD 1956 1980
1980 24 0000 1808 STD 0000 1808
1808 30 0004 1843 SRT 0004 1843
1043 10 1957 1870 AU 1957 1870
USES 28 1870 69 1981 1858 LD 1981 1858
LOCATIONS 1858 22 1981 1902 STDA 1981 1902
1977 TO 1985 1902 69 1955 1981 LD 1955 1981
1772 1786 1981 24 0000 1881 STD 0000 1881
1788 1794 1881 30 0004 1760 SRT 0004 1760
1795 18 8 1760 69 1982 1847 LD 1982 1847
1824 1843 1847 22 1982 1978 STDA 1982 1978
1858 187 1978 69 1954 1982 LD 1954 1982
1881 19 2 1982 24 0000 1946 STD 0000 1946
1998 176 1946 30 0004 1823 SRT 0004 1823
1823 1847 1623 69 1983 1979 LD 1983 1979
1883 1939 1979 22 1983 1985 STDA 1983 1985
AND 1946 1985 69 1953 1983 LD 1953 1983
ALL ARE 1983 24 0000 1883 STD 0000 1883
TEMPORARY 1883 30 0004 1939 SRT 0004 1939
STORAGE 1939 69 1984 1772 LD 1984 1772
LOCATIONS 1772 22 1954 1788 STDA 1954 1788
IN PACKAGES 1788 69 1952 1984 LD 1952 1984
P1 THRU P4 1984 24 0000 1998 STD 0000 1998

16
I650/sw/it_soapII_patch.dck Normal file
View file

@ -0,0 +1,16 @@
6I1954195C 0000240954800?6519861945
6I1954195C 0000241945800?1515961732
6I1954195C 0000240961800?6519861945
6I1954195C 0000240964800?6519861945
6I1954195C 0000240959800?6519861945
6I1954195C 0000241991800?0000001002
6I1954195C 0000241993800?0000001004
6I1954195C 0000241994800?0000001006
6I1954195C 0000241995800?6019501405
6I1954195C 0000241994800?0000001746
6I1954195C 0000241738800?9000000001
6I1954195C 0000241744800?0000001006
6I1954195C 0000241746800?6917381748
6I1954195C 0000241748800?2410441790
6I1954195C 0000241790800?6917441794
6I1954195C 0000241794800?2419941994

44
I650/sw/it_soapII_patch.txt Normal file
View file

@ -0,0 +1,44 @@
; These are the patches needed to make
; SOAP II to run with IT
; free address 1993, using 1945 instead
dep 0954 65 1986 1945
dep 1945 15 1596 1732
dep 0961 65 1986 1945
dep 0964 65 1986 1945
dep 0959 65 1986 1945
; set jump address for new redefined card types 1,3,4 and 5
; that IT needs
; card type 1 was comment now is blr (reserve block)
; card type 3 was undef now is reg (reserve regional block)
; card type 4 was undef now is syn (reserve symbol)
; card type 5 was undef now is comment
dep 1991 00 0000 1002
dep 1993 00 0000 1004
dep 1994 00 0000 1006
dep 1995 60 1950 1405
; make first card type 4 to define region u0001 9999 (but not reserved)
; use free addresses at 1738, 1744, 1746, 1748, 1790, 1794, 1795, 1796, 1798
; set card type 4 to jump to 1738 to store 90 0000 0001 in 1044 and reset
; 1994 to value 00 0000 1006
dep 1994 00 0000 1746
; consts: regu, card4
dep 1738 90 0000 0001
dep 1744 00 0000 1006
; ldd regu
; std 1044
; ldd card4
; std 1994 1994
dep 1746 69 1738 1748
dep 1748 24 1044 1790
dep 1790 69 1744 1794
dep 1794 24 1994 1994

80
I650/sw/it_subr_cos_listing.txt Normal file
View file

@ -0,0 +1,80 @@
5 SUBROUTINE 21 COSINE
E00AV STO ARTHX BEGIN CISINE
SLT 0008 ARGUMENT
STU ARTHF ALARM IF PWR
RSM 8002 OVERSCALE
ALO AV1 COSX EQUALS
BMI AV2 ONE IF PWR
SLO AV3 UNDERSCALE
BMI AV4
SRT 0004
ALO AV5
STL AV6
RAU ARTHF FORM
MPY AV7 AV6 FRACTIONAL
AV6 HLT AV6 AV23 AND INTGRL
AV23 STL ARTHG PARTS
RAU 8003
MPY AV8 FORM S AS
STL ARTHE ONE MINUS
RSM ARTHG TWICE ABVAL
SML 8001 OF FRACTNL
ALO AV9 PART
RAU 8002
STU ARTHF
MPY 8001 FORM SINE
STU ARTHG
RAU AV16 POLYNOMIAL
MPY ARTHG APPROXIMATOR
RAU 8003
AUP AV15
MPY AR7HG
RAU 8003
AUP AV14
MPY ARTHG
RAU 8003
AUP AV13
MPY ARTHG
SRT 0001
RAU 8003
AUP AV12 EQUALS ONE
MPY ARTHF
SCT 0000
BOV AV19
STL AR7HF
RAL 8003 ROUND
SRT 0002 AND
STL ARTHG ADJUST
RSU ARTHF POWER
SRT 0002
BMI AV25
SUP 8003
ALO AV8 AV24
AV24 AUP ARTHG
SLT 0002 AV22
AV22 STU ARTHF DETERMINE
RAU ARTHE SIGN OF
NZU AV20 RESULT
AV20 RSL ARTHF ARTHX
AV25 RAL ARTHF ARTHX
SUP 8003
SLO AV8 AV24
AV2 RAL ARTHE OVERSCALE
LDD ARTHX 3211 DISPLAY
AV4 RAL AV21 ARTHX COSX IS ONE
AV19 RAL 8002 COSX IS ZERO
SLO 8001 ARTHX
AV17 RAU AV21 AV22 COSX IS PLUS
AV1 57 0000 0000 OR MINUS 1
AV3 11 0000 0000
AV5 SRD 0011 AV23
AV7 31 8309 8862
AV8 50 0000 0000
AV9 99 9999 9999
AV12 15 7079 6318
AV13 - 64 5963 7111
AV14 07 9689 6793
AV15 - 00 4673 7656
AV16 00 0151 4842
AV21 10 0000 0050
5 LAST CARD SUBROUTINE 21

87
I650/sw/it_subr_sin_listing.txt Normal file
View file

@ -0,0 +1,87 @@
5 SUBROUTINE 22 SINE
E00AW STD ARTHX BEGIN SINE
STL ARTHE SUBROUTINE
SLT 0008 STORE
STU ARTHF ARGUMENT
RSM 8002 IS POWER
ALO AW1 OVERSCALE
BMI AW2 IF SO ALARM
SLO AW3 IS P0WER
BMI AW4 UNDERSCALE
SRT 0004 IF SO SINX
ALO AW5 EQUALS X
STL AW6
RAU ARTHF F0RM FRACTL
MPY AW7 AW6 PART
AW6 HLT AW6 AW23
AW23 STL ARTHG
RAU 8003 IS INTGRAL
MPY AW8 PAR7 0DD
RAL 8002
NZE AW9 IF SO FLIP
RSL ARTHE SGN OF X
STL ARTHE AW9
AW9 RSM ARTHG FORM S AS 2
SML 8001 MINUS 2 ALPH
NZU AW10 IF 2 ALPH
AUP AW11 GRTG 1 OR 2
NZU AW17 AW10 ALPH OTHER
AU10 RAM 8002 WISE
STL ARTHF FORM SINE
RAU 8002 POLYNOMIAL
MPY 8001
STU ARTHG APPROXIMATOR
RAU AW16
MPY ARTHG
RAU 8003
AUP AW15
MPY ARTHG
RAU 8003
AUP AW14
MPY ARTHG
RAU 8003
AUP AW13
MPY ARTHG
SRT 0001
RAU 8003
AUP AW12
MPY ARTHF
SCT 0000
BOV AW19
STL ARTHF SINE TO 0
RAL 8003
SRT 0002 ROUND
STL ARTHG
RSU ARTHF
SRT 0002 ADJUST POWER
BMI AW25
SUP 8003
ALO AW8 AW24
AW24 AUP ARTHG
SLT 0002 AW22
AW25 SUP 8003
SLO AW8 AW24
AW22 STU ARTHF DETERMINE
RAL ARTHE PROPER SIGN
BMI AW20 OF RESULT
RSL ARTHF ARTHX EXIT
AW20 RAL ARTHF ARTHX EXIT
AW4 RAL ARTHE ARTHX SINX IS X
AW17 RAU AW21 AW22 SINX IS ONE
AW19 RAL 8002 SINX IS ZERO
SLO 8001 ARTHX
AW1 57 0000 0000 CONSTANTS
AW3 09 0000 0000
AW5 SRT 0009 AW23
AW7 31 8309 8862
AW8 50 0000 0000
AW11 00 0000 0002
AW12 15 7079 6318
AW13 - 64 5963 7111
AW14 07 9689 6793
AW15 - 00 4673 7656
AW16 00 0151 4842
AW21 10 0000 0050
AW2 RAL ARTHE ALARM FOR
LDD ARTHX 3221 SINE
5 LAST CARD SUBROUTINE 22

62
I650/sw/it_subr_sqrt_listing.txt Normal file
View file

@ -0,0 +1,62 @@
5 SUBROUTINE 20 SQUARE RT
E00AU STD ARTHX SQUARE ROOT
BMI AU1 ALARM IF NEG
SLT 0008
NZU AU2 TEST FOR ZRO
STL ARTHF BREAK UP EXP
RAL 8003 AND MANTISSA
SLT 0002 CALCULATE
STL ARTHE INITIAL X
AUP AU8 AU3
AU4 RAU ARTHE CALCULATE
DVR ARTHG NEXT X
SLO 8001 VALUE
NZE AU5
BMI AU5 TEST FOR END
ALO 8001
ALO 8001 AU3
AU3 DVR AU9 RECYCLE
STL ARTHG AU4
AU5 RAL ARTHF MODIFY
ALO AU10 EXPONENT
SRT 0008
DIV AU9
ALO 8003
STL ARTHF TEST EVEN OR
NZU AU6 ODD EXP
RAU ARTHG EXP ODD
SRT 0001
MPY AU11 MPY BY SQRT
SRD 0010 AU7 OF 10
AU7 SLT 0002
ALO ARTHF ARTHX GO TO EXIT
AU6 RAL ARTHG EXP EVEN
SRD 0002 AU7
AU2 RAL 8003 ARTHX STORE ZERO
AU1 LDD ARTHX 3201 SQRT ALARM
AU8 00 0000 0001 CONSTANTS
AU9 00 0000 0002
AU10 49 0000 0000
AU11 03 1622 7766
5 LAST CARD SUBROUTINE 20
?
? ? ????

22
I650/sw/soap_and_run.ini
View file

@ -11,19 +11,19 @@
set cpu 2k
; Load SOAP deck into core (1 word per card format), but does not execute it
; Load soap deck into drum (1 word per card format), but does not execute it
att cdr1 -q soapII.dck
att cdr1 -q -l soapII.dck
echo ***
echo *** load soap deck into drum
echo *** Load soap deck into drum
echo ***
d csw 7019519999
d ar 8000
go
; now put source cards in reader and start SOAP assembler
; Now put source cards in reader and start soap assembler
att cdr1 %1
set cdr1 wiring=soap
@ -33,7 +33,7 @@ set cdp1 echo, print, wiring=soap
att cdp0 -n -q print.txt
echo ***
echo *** run soap
echo *** Assemble source deck
echo ***
d ar 1000
@ -41,18 +41,20 @@ go
if "%2" == "" goto end
; load assembled deck into core
; Load assembled deck into drum
; -l switch allows to load the symbolic info so debug cmd info will show
; soap source code read from card.
det cdp1
set cdr1 wiring=8WORD
att cdr1 deck_out.dck
att cdr1 -l deck_out.dck
att cdp1 -n -q deck_out_run.dck
set cdp1 echo, print, wiring=8WORD
echo ***
echo *** load assembled program
echo *** Read assembled program deck
echo ***
d csw 7019519999
@ -64,11 +66,11 @@ if "%3" == "" goto run
att cdr1 %3
; now execute the loaded deck
; Now execute the loaded deck
:run
echo ***
echo *** run assembled program
echo *** Run assembled program
echo ***
d ar %2

BIN
doc/i650_doc.doc
View file

Binary file not shown.