ISYS8020: Fix format of file

This commit is contained in:
Bill Beech 2015-05-08 15:27:29 -07:00
parent 44e5c228c7
commit 06f9cbe41d

View file

@ -23,8 +23,14 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from William A. Beech. in this Software without prior written authorization from William A. Beech.
These functions support a simulated i8259 interface device on an iSBC. NOTES:
24 Jan 13 - Original file.
This software was written by Bill Beech, 24 Jan 13, to allow emulation of
more complex Multibus Computer Systems.
This program simulates up to 2 i8259 devices. It handles 1 i8259
device on the iSBC 80/20 and iSBC 80/30 SBCs. Other devices could be on
other multibus boards in the simulated system.
*/ */
#include "system_defs.h" /* system header in system dir */ #include "system_defs.h" /* system header in system dir */
@ -59,8 +65,8 @@ int32 icw_num0 = 1, icw_num1 = 1;
/* i8255 Standard I/O Data Structures */ /* i8255 Standard I/O Data Structures */
UNIT i8259_unit[] = { UNIT i8259_unit[] = {
{ UDATA (0, 0, 0) }, { UDATA (0, 0, 0) }, /* i8259 0 */
{ UDATA (0, 0, 0) } { UDATA (0, 0, 0) } /* i8259 1 */
}; };
DEBTAB i8259_debug[] = { DEBTAB i8259_debug[] = {
@ -75,10 +81,10 @@ DEBTAB i8259_debug[] = {
}; };
REG i8259_reg[] = { REG i8259_reg[] = {
{ HRDATA (IRR0, i8259_unit[0].u3, 8) }, { HRDATA (IRR0, i8259_unit[0].u3, 8) }, /* i8259 0 */
{ HRDATA (ISR0, i8259_unit[0].u4, 8) }, { HRDATA (ISR0, i8259_unit[0].u4, 8) },
{ HRDATA (IMR0, i8259_unit[0].u5, 8) }, { HRDATA (IMR0, i8259_unit[0].u5, 8) },
{ HRDATA (IRR1, i8259_unit[1].u3, 8) }, { HRDATA (IRR1, i8259_unit[1].u3, 8) }, /* i8259 0 */
{ HRDATA (ISR1, i8259_unit[1].u4, 8) }, { HRDATA (ISR1, i8259_unit[1].u4, 8) },
{ HRDATA (IMR1, i8259_unit[1].u5, 8) }, { HRDATA (IMR1, i8259_unit[1].u5, 8) },
{ NULL } { NULL }
@ -114,6 +120,8 @@ DEVICE i8259_dev = {
IN or OUT instruction is issued. IN or OUT instruction is issued.
*/ */
/* i8259 0 functions */
int32 i8259a0(int32 io, int32 data) int32 i8259a0(int32 io, int32 data)
{ {
int32 bit; int32 bit;
@ -151,38 +159,6 @@ int32 i8259a0(int32 io, int32 data)
return 0; return 0;
} }
int32 i8259b0(int32 io, int32 data)
{
if (io == 0) { /* read data port */
return (i8259_unit[0].u5); /* IMR */
} else { /* write data port */
if (icw_num0 >= 2 && icw_num0 < 5) { /* ICW mode */
switch (icw_num0) {
case 2: /* ICW2 */
i8259_icw2[0] = data;
break;
case 3: /* ICW3 */
i8259_icw3[0] = data;
break;
case 4: /* ICW4 */
if (i8259_icw1[0] & 0x01)
i8259_icw4[0] = data;
else
sim_printf("8259b-0: ICW4 not enabled - data=%02X\n", data);
break;
default:
sim_printf("8259b-0: ICW Error %02X\n", data);
break;
}
icw_num0++;
} else {
i8259_ocw1[0] = data; /* OCW0 */
}
}
i8259_dump(0);
return 0;
}
int32 i8259a1(int32 io, int32 data) int32 i8259a1(int32 io, int32 data)
{ {
int32 bit; int32 bit;
@ -220,6 +196,40 @@ int32 i8259a1(int32 io, int32 data)
return 0; return 0;
} }
/* i8259 1 functions */
int32 i8259b0(int32 io, int32 data)
{
if (io == 0) { /* read data port */
return (i8259_unit[0].u5); /* IMR */
} else { /* write data port */
if (icw_num0 >= 2 && icw_num0 < 5) { /* ICW mode */
switch (icw_num0) {
case 2: /* ICW2 */
i8259_icw2[0] = data;
break;
case 3: /* ICW3 */
i8259_icw3[0] = data;
break;
case 4: /* ICW4 */
if (i8259_icw1[0] & 0x01)
i8259_icw4[0] = data;
else
sim_printf("8259b-0: ICW4 not enabled - data=%02X\n", data);
break;
default:
sim_printf("8259b-0: ICW Error %02X\n", data);
break;
}
icw_num0++;
} else {
i8259_ocw1[0] = data; /* OCW0 */
}
}
i8259_dump(0);
return 0;
}
int32 i8259b1(int32 io, int32 data) int32 i8259b1(int32 io, int32 data)
{ {
if (io == 0) { /* read data port */ if (io == 0) { /* read data port */