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All VAX: Initialize intermediate state vars outside of the instruction loop

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Many of the intermediate state variables are captured by the instruction
history mechanism.  Make sure that these don't come into and out of
scope between instruction executions.
This commit is contained in:
Mark Pizzolato 2017-03-18 17:59:13 -07:00
parent 7c696dbbc7
commit 0e6a79f078
1 changed files with 9 additions and 9 deletions
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18
VAX/vax_cpu.c
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@ -477,10 +477,15 @@ t_stat sim_instr (void)
volatile int32 opc = 0, cc; /* used by setjmp */
volatile int32 acc; /* set by setjmp */
int abortval;
t_stat r;
t_stat ret;
int32 r = 0, rh = 0, temp = 0;
int32 spec = 0, disp = 0, rn = 0, index = 0, numspec = 0;
int32 vfldrp1 = 0, brdisp = 0, flg = 0, mstat = 0;
uint32 va = 0, iad = 0;
int32 opnd[OPND_SIZE]; /* operand queue */
if ((r = build_dib_tab ()) != SCPE_OK) /* build, chk dib_tab */
return r;
if ((ret = build_dib_tab ()) != SCPE_OK) /* build, chk dib_tab */
return ret;
if ((PSL & PSL_MBZ) || /* validate PSL<mbz> */
((PSL & PSL_CM) && BadCmPSL (PSL)) || /* validate PSL<cm> */
((PSL_GETCUR (PSL) != KERN) && /* esu => is, ipl = 0 */
@ -580,12 +585,7 @@ else if (abortval < 0) { /* mm or rsrv or int */
/* Main instruction loop */
for ( ;; ) {
int32 spec, disp, rn, index, numspec;
int32 vfldrp1, brdisp, flg, mstat;
int32 i, j, r, rh, temp;
uint32 va, iad;
int32 opnd[OPND_SIZE]; /* operand queue */
int32 i, j;
/* Optionally record instruction history results from prior instruction */