folkert/simh-testsetgenerator
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Cleanup for warning messages produced by the clang C compiler. Mostly adding parentheses in conditional assignments and clarification parentheses in complex boolean expressions.

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This commit is contained in:
Mark Pizzolato 2012-04-29 11:59:44 -07:00
parent 3775c17034
commit 0f8e6cfe95
112 changed files with 596 additions and 592 deletions
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2
ALTAIR/altair_cpu.c
View file

@ -313,7 +313,7 @@ int32 sim_instr (void)
while (reason == 0) { /* loop until halted */ while (reason == 0) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) break; if ((reason = sim_process_event ())) break;
} }
if (int_req > 0) { /* interrupt? */ if (int_req > 0) { /* interrupt? */

2
GRI/gri_cpu.c
View file

@ -421,7 +421,7 @@ ao_update (); /* update AO */
while (reason == 0) { /* loop until halted */ while (reason == 0) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) if ((reason = sim_process_event ()))
break; break;
} }

46
H316/h316_cpu.c
View file

@ -424,7 +424,7 @@ reason = 0;
while (reason == 0) { /* loop until halted */ while (reason == 0) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) if ((reason = sim_process_event ()))
break; break;
} }
@ -458,7 +458,7 @@ if (chan_req) { /* channel request? */
t = iotab[dev] (ioOTA, 0, Read (ad), dev); /* output word */ t = iotab[dev] (ioOTA, 0, Read (ad), dev); /* output word */
if ((t & IOT_SKIP) == 0) if ((t & IOT_SKIP) == 0)
return STOP_DMAER; return STOP_DMAER;
if (r = (t >> IOT_V_REASON)) if ((r = (t >> IOT_V_REASON)))
return r; return r;
} }
if (Q_DMA (i)) { /* DMA? */ if (Q_DMA (i)) { /* DMA? */
@ -528,7 +528,7 @@ if (hst_lnt) { /* instr hist? */
switch (I_GETOP (MB)) { /* case on <1:6> */ switch (I_GETOP (MB)) { /* case on <1:6> */
case 001: case 021: case 041: case 061: /* JMP */ case 001: case 021: case 041: case 061: /* JMP */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
PCQ_ENTRY; /* save PC */ PCQ_ENTRY; /* save PC */
PC = NEWA (PC, Y); /* set new PC */ PC = NEWA (PC, Y); /* set new PC */
@ -537,7 +537,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 002: case 022: case 042: case 062: /* LDA */ case 002: case 022: case 042: case 062: /* LDA */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
if (dp) { /* double prec? */ if (dp) { /* double prec? */
AR = Read (Y & ~1); /* get doubleword */ AR = Read (Y & ~1); /* get doubleword */
@ -548,13 +548,13 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 003: case 023: case 043: case 063: /* ANA */ case 003: case 023: case 043: case 063: /* ANA */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
AR = AR & Read (Y); AR = AR & Read (Y);
break; break;
case 004: case 024: case 044: case 064: /* STA */ case 004: case 024: case 044: case 064: /* STA */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
Write (Y, AR); /* store A */ Write (Y, AR); /* store A */
if (dp) { /* double prec? */ if (dp) { /* double prec? */
@ -564,13 +564,13 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 005: case 025: case 045: case 065: /* ERA */ case 005: case 025: case 045: case 065: /* ERA */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
AR = AR ^ Read (Y); AR = AR ^ Read (Y);
break; break;
case 006: case 026: case 046: case 066: /* ADD */ case 006: case 026: case 046: case 066: /* ADD */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
if (dp) { /* double prec? */ if (dp) { /* double prec? */
t1 = GETDBL_S (AR, BR); /* get A'B */ t1 = GETDBL_S (AR, BR); /* get A'B */
@ -583,7 +583,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 007: case 027: case 047: case 067: /* SUB */ case 007: case 027: case 047: case 067: /* SUB */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
if (dp) { /* double prec? */ if (dp) { /* double prec? */
t1 = GETDBL_S (AR, BR); /* get A'B */ t1 = GETDBL_S (AR, BR); /* get A'B */
@ -596,7 +596,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 010: case 030: case 050: case 070: /* JST */ case 010: case 030: case 050: case 070: /* JST */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
MB = NEWA (Read (Y), PC); /* merge old PC */ MB = NEWA (Read (Y), PC); /* merge old PC */
Write (Y, MB); Write (Y, MB);
@ -605,7 +605,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 011: case 031: case 051: case 071: /* CAS */ case 011: case 031: case 051: case 071: /* CAS */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
MB = Read (Y); MB = Read (Y);
if (AR == MB) if (AR == MB)
@ -615,7 +615,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 012: case 032: case 052: case 072: /* IRS */ case 012: case 032: case 052: case 072: /* IRS */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
MB = (Read (Y) + 1) & DMASK; /* incr, rewrite */ MB = (Read (Y) + 1) & DMASK; /* incr, rewrite */
Write (Y, MB); Write (Y, MB);
@ -624,7 +624,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 013: case 033: case 053: case 073: /* IMA */ case 013: case 033: case 053: case 073: /* IMA */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
MB = Read (Y); MB = Read (Y);
Write (Y, AR); /* A to mem */ Write (Y, AR); /* A to mem */
@ -632,13 +632,13 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 015: case 055: /* STX */ case 015: case 055: /* STX */
if (reason = Ea (MB & ~IDX, &Y)) /* eff addr */ if ((reason = Ea (MB & ~IDX, &Y))) /* eff addr */
break; break;
Write (Y, XR); /* store XR */ Write (Y, XR); /* store XR */
break; break;
case 035: case 075: /* LDX */ case 035: case 075: /* LDX */
if (reason = Ea (MB & ~IDX, &Y)) /* eff addr */ if ((reason = Ea (MB & ~IDX, &Y))) /* eff addr */
break; break;
XR = Read (Y); /* load XR */ XR = Read (Y); /* load XR */
M[M_XR] = XR; /* update mem too */ M[M_XR] = XR; /* update mem too */
@ -646,7 +646,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
case 016: case 036: case 056: case 076: /* MPY */ case 016: case 036: case 056: case 076: /* MPY */
if (cpu_unit.flags & UNIT_HSA) { /* installed? */ if (cpu_unit.flags & UNIT_HSA) { /* installed? */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
t1 = SEXT (AR) * SEXT (Read (Y)); t1 = SEXT (AR) * SEXT (Read (Y));
PUTDBL_Z (t1); PUTDBL_Z (t1);
@ -657,7 +657,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
case 017: case 037: case 057: case 077: /* DIV */ case 017: case 037: case 057: case 077: /* DIV */
if (cpu_unit.flags & UNIT_HSA) { /* installed? */ if (cpu_unit.flags & UNIT_HSA) { /* installed? */
if (reason = Ea (MB, &Y)) /* eff addr */ if ((reason = Ea (MB, &Y))) /* eff addr */
break; break;
t2 = SEXT (Read (Y)); /* divr */ t2 = SEXT (Read (Y)); /* divr */
if (t2) { /* divr != 0? */ if (t2) { /* divr != 0? */
@ -826,7 +826,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 003: /* "long right arot" */ case 003: /* "long right arot" */
if (reason = stop_inst) /* stop on undef? */ if ((reason = stop_inst)) /* stop on undef? */
break; break;
for (t2 = 0; t2 < t1; t2++) { /* bit by bit */ for (t2 = 0; t2 < t1; t2++) { /* bit by bit */
C = BR & 1; /* C = last out */ C = BR & 1; /* C = last out */
@ -859,7 +859,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 007: /* "short right arot" */ case 007: /* "short right arot" */
if (reason = stop_inst) /* stop on undef? */ if ((reason = stop_inst)) /* stop on undef? */
break; break;
for (t2 = 0; t2 < t1; t2++) { /* bit by bit */ for (t2 = 0; t2 < t1; t2++) { /* bit by bit */
C = AR & 1; /* C = last out */ C = AR & 1; /* C = last out */
@ -899,7 +899,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 013: /* "long left arot" */ case 013: /* "long left arot" */
if (reason = stop_inst) /* stop on undef? */ if ((reason = stop_inst)) /* stop on undef? */
break; break;
for (t2 = 0; t2 < t1; t2++) { /* bit by bit */ for (t2 = 0; t2 < t1; t2++) { /* bit by bit */
AR = (AR << 1) | ((BR >> 14) & 1); AR = (AR << 1) | ((BR >> 14) & 1);
@ -935,7 +935,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
break; break;
case 017: /* "short left arot" */ case 017: /* "short left arot" */
if (reason = stop_inst) /* stop on undef? */ if ((reason = stop_inst)) /* stop on undef? */
break; break;
for (t2 = 0; t2 < t1; t2++) { /* bit by bit */ for (t2 = 0; t2 < t1; t2++) { /* bit by bit */
if ((AR & SIGN) != ((AR << 1) & SIGN)) C = 1; if ((AR & SIGN) != ((AR << 1) & SIGN)) C = 1;
@ -1003,7 +1003,7 @@ switch (I_GETOP (MB)) { /* case on <1:6> */
AR = (AR << 8) & DMASK; AR = (AR << 8) & DMASK;
else if (MB == 0141340) /* ICA */ else if (MB == 0141340) /* ICA */
AR = ((AR << 8) | (AR >> 8)) & DMASK; AR = ((AR << 8) | (AR >> 8)) & DMASK;
else if (reason = stop_inst) else if ((reason = stop_inst))
break; break;
else AR = Operate (MB, AR); /* undefined */ else AR = Operate (MB, AR); /* undefined */
break; break;
@ -1500,7 +1500,7 @@ for (i = 0; i < DEV_MAX; i++)
iotab[i] = NULL; iotab[i] = NULL;
for (i = 0; i < (DMA_MAX + DMC_MAX); i++) for (i = 0; i < (DMA_MAX + DMC_MAX); i++)
chan_map[i] = 0; chan_map[i] = 0;
for (i = 0; dptr = sim_devices[i]; i++) { /* loop thru devices */ for (i = 0; (dptr = sim_devices[i]); i++) { /* loop thru devices */
dibp = (DIB *) dptr->ctxt; /* get DIB */ dibp = (DIB *) dptr->ctxt; /* get DIB */
if ((dibp == NULL) || (dptr->flags & DEV_DIS)) /* exist, enabled? */ if ((dibp == NULL) || (dptr->flags & DEV_DIS)) /* exist, enabled? */
continue; continue;

12
H316/h316_dp.c
View file

@ -617,7 +617,7 @@ switch (uptr->FNC) { /* case on function */
case FNC_RCA: /* read current addr */ case FNC_RCA: /* read current addr */
if (h >= dp_tab[dp_ctype].surf) /* invalid head? */ if (h >= dp_tab[dp_ctype].surf) /* invalid head? */
return dp_done (1, STA_ADRER); /* error */ return dp_done (1, STA_ADRER); /* error */
if (r = dp_rdtrk (uptr, dpxb, uptr->CYL, h)) /* get track; error? */ if ((r = dp_rdtrk (uptr, dpxb, uptr->CYL, h))) /* get track; error? */
return r; return r;
dp_rptr = 0; /* init rec ptr */ dp_rptr = 0; /* init rec ptr */
if (dpxb[dp_rptr + REC_LNT] == 0) /* unformated? */ if (dpxb[dp_rptr + REC_LNT] == 0) /* unformated? */
@ -722,7 +722,7 @@ switch (uptr->FNC) { /* case on function */
case FNC_RW: /* read/write */ case FNC_RW: /* read/write */
if (h >= dp_tab[dp_ctype].surf) /* invalid head? */ if (h >= dp_tab[dp_ctype].surf) /* invalid head? */
return dp_done (1, STA_ADRER); /* error */ return dp_done (1, STA_ADRER); /* error */
if (r = dp_rdtrk (uptr, dpxb, uptr->CYL, h)) /* get track; error? */ if ((r = dp_rdtrk (uptr, dpxb, uptr->CYL, h))) /* get track; error? */
return r; return r;
if (!dp_findrec (dp_cw2)) /* find rec; error? */ if (!dp_findrec (dp_cw2)) /* find rec; error? */
return dp_done (1, STA_ADRER); /* address error */ return dp_done (1, STA_ADRER); /* address error */
@ -750,7 +750,7 @@ switch (uptr->FNC) { /* case on function */
if (dp_cw1 & CW1_RW) { /* write? */ if (dp_cw1 & CW1_RW) { /* write? */
if (dp_sta & STA_RDY) /* timing failure? */ if (dp_sta & STA_RDY) /* timing failure? */
return dp_wrdone (uptr, STA_DTRER); /* yes, error */ return dp_wrdone (uptr, STA_DTRER); /* yes, error */
if (r = dp_wrwd (uptr, dp_buf)) /* wr word, error? */ if ((r = dp_wrwd (uptr, dp_buf))) /* wr word, error? */
return r; return r;
if (dp_eor) { /* transfer done? */ if (dp_eor) { /* transfer done? */
dpxb[dp_rptr + REC_DATA + dp_wptr] = dp_csum; dpxb[dp_rptr + REC_DATA + dp_wptr] = dp_csum;
@ -855,7 +855,7 @@ if (dp_wptr < (lnt + REC_MAXEXT)) {
} }
dpxb[dp_rptr + REC_DATA + dp_wptr] = dp_csum; /* write csum */ dpxb[dp_rptr + REC_DATA + dp_wptr] = dp_csum; /* write csum */
dpxb[dp_rptr + lnt + REC_OVHD] = 0; /* zap rest of track */ dpxb[dp_rptr + lnt + REC_OVHD] = 0; /* zap rest of track */
if (r = dp_wrdone (uptr, STA_UNSER)) /* dump track */ if ((r = dp_wrdone (uptr, STA_UNSER))) /* dump track */
return r; return r;
return STOP_DPOVR; return STOP_DPOVR;
} }
@ -1017,7 +1017,7 @@ for (c = cntr = 0; c < dp_tab[dp_ctype].cyl; c++) {
else tbuf[rptr + REC_ADDR] = (c << 8) + (h << 3) + i; else tbuf[rptr + REC_ADDR] = (c << 8) + (h << 3) + i;
rptr = rptr + nw + REC_OVHD; rptr = rptr + nw + REC_OVHD;
} }
if (r = dp_wrtrk (uptr, tbuf, c, h)) if ((r = dp_wrtrk (uptr, tbuf, c, h)))
return r; return r;
} }
} }
@ -1043,7 +1043,7 @@ if ((uptr->flags & UNIT_ATT) == 0)
return SCPE_UNATT; return SCPE_UNATT;
for (c = 0; c < dp_tab[dp_ctype].cyl; c++) { for (c = 0; c < dp_tab[dp_ctype].cyl; c++) {
for (h = 0; h < dp_tab[dp_ctype].surf; h++) { for (h = 0; h < dp_tab[dp_ctype].surf; h++) {
if (r = dp_rdtrk (uptr, tbuf, c, h)) if ((r = dp_rdtrk (uptr, tbuf, c, h)))
return r; return r;
rptr = 0; rptr = 0;
rlnt = tbuf[rptr + REC_LNT]; rlnt = tbuf[rptr + REC_LNT];

8
H316/h316_mt.c
View file

@ -371,17 +371,17 @@ switch (uptr->FNC) { /* case on function */
return SCPE_OK; return SCPE_OK;
case FNC_WEOF: /* write file mark */ case FNC_WEOF: /* write file mark */
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; /* sched end motion */ break; /* sched end motion */
case FNC_FSR: /* space fwd rec */ case FNC_FSR: /* space fwd rec */
if (st = sim_tape_sprecf (uptr, &tbc)) /* space fwd, err? */ if ((st = sim_tape_sprecf (uptr, &tbc))) /* space fwd, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; /* sched end motion */ break; /* sched end motion */
case FNC_BSR: /* space rev rec */ case FNC_BSR: /* space rev rec */
if (st = sim_tape_sprecr (uptr, &tbc)) /* space rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) /* space rev, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; /* sched end motion */ break; /* sched end motion */
@ -455,7 +455,7 @@ switch (uptr->FNC) { /* case on function */
mt_wrwd (uptr, mt_buf); mt_wrwd (uptr, mt_buf);
else mt_rdy = 0; /* rdy must be clr */ else mt_rdy = 0; /* rdy must be clr */
if (mt_ptr) { /* any data? */ if (mt_ptr) { /* any data? */
if (st = sim_tape_wrrecf (uptr, mtxb, mt_ptr)) /* write, err? */ if ((st = sim_tape_wrrecf (uptr, mtxb, mt_ptr)))/* write, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
} }
break; /* sched end motion */ break; /* sched end motion */

2
H316/h316_stddev.c
View file

@ -390,7 +390,7 @@ t_stat r;
if (!(uptr->flags & UNIT_ATTABLE)) if (!(uptr->flags & UNIT_ATTABLE))
return SCPE_NOFNC; return SCPE_NOFNC;
if (r = attach_unit (uptr, cptr)) if ((r = attach_unit (uptr, cptr)))
return r; return r;
if (sim_switches & SWMASK ('A')) /* -a? ASCII */ if (sim_switches & SWMASK ('A')) /* -a? ASCII */
uptr->flags |= UNIT_ASC; uptr->flags |= UNIT_ASC;

4
H316/h316_sys.c
View file

@ -364,11 +364,11 @@ switch (j) { /* case on class */
case I_V_MRF: case I_V_MRX: /* mem ref */ case I_V_MRF: case I_V_MRX: /* mem ref */
cptr = get_glyph (cptr, gbuf, ','); /* get next field */ cptr = get_glyph (cptr, gbuf, ','); /* get next field */
if (k = (strcmp (gbuf, "C") == 0)) { /* C specified? */ if ((k = (strcmp (gbuf, "C") == 0))) { /* C specified? */
val[0] = val[0] | SC; val[0] = val[0] | SC;
cptr = get_glyph (cptr, gbuf, 0); cptr = get_glyph (cptr, gbuf, 0);
} }
else if (k = (strcmp (gbuf, "Z") == 0)) { /* Z specified? */ else if ((k = (strcmp (gbuf, "Z") == 0))) { /* Z specified? */
cptr = get_glyph (cptr, gbuf, ','); cptr = get_glyph (cptr, gbuf, ',');
} }
d = get_uint (gbuf, 8, X_AMASK, &r); /* construe as addr */ d = get_uint (gbuf, 8, X_AMASK, &r); /* construe as addr */

18
HP2100/hp2100_baci.c
View file

@ -1157,11 +1157,11 @@ if (baci_edsiw & (baci_status ^ baci_dsrw) & IN_MODEM) /* device interrupt? */
baci_status = baci_status | IN_DEVINT; /* set flag */ baci_status = baci_status | IN_DEVINT; /* set flag */
if ((baci_status & IN_STDIRQ) || /* standard interrupt? */ if ((baci_status & IN_STDIRQ) || /* standard interrupt? */
!(baci_icw & OUT_DCPC) && /* or under program control */ (!(baci_icw & OUT_DCPC) && /* or under program control */
(baci_status & IN_FIFOIRQ) || /* and FIFO interrupt? */ (baci_status & IN_FIFOIRQ)) || /* and FIFO interrupt? */
(IO_MODE == RECV) && /* or receiving */ ((IO_MODE == RECV) && /* or receiving */
(baci_edsiw & OUT_ENCM) && /* and char mode */ (baci_edsiw & OUT_ENCM) && /* and char mode */
(baci_fget != baci_fput)) { /* and FIFO not empty? */ (baci_fget != baci_fput))) { /* and FIFO not empty? */
if (baci.lockout) { /* interrupt lockout? */ if (baci.lockout) { /* interrupt lockout? */
if (DEBUG_PRI (baci_dev, DEB_CMDS)) if (DEBUG_PRI (baci_dev, DEB_CMDS))
@ -1185,8 +1185,8 @@ if ((baci_status & IN_STDIRQ) || /* standard interrupt? *
} }
if ((baci_icw & OUT_DCPC) && /* DCPC enabled? */ if ((baci_icw & OUT_DCPC) && /* DCPC enabled? */
((IO_MODE == XMIT) && (baci_fcount < 128) || /* and xmit and room in FIFO */ (((IO_MODE == XMIT) && (baci_fcount < 128)) || /* and xmit and room in FIFO */
(IO_MODE == RECV) && (baci_fcount > 0))) { /* or recv and data in FIFO? */ ((IO_MODE == RECV) && (baci_fcount > 0)))) { /* or recv and data in FIFO? */
if (baci.lockout) { /* interrupt lockout? */ if (baci.lockout) { /* interrupt lockout? */
if (DEBUG_PRI (baci_dev, DEB_CMDS)) if (DEBUG_PRI (baci_dev, DEB_CMDS))
@ -1472,9 +1472,9 @@ if (baci_uart_clk > 0) { /* transfer in progress?
if ((IO_MODE == XMIT) && /* transmit mode? */ if ((IO_MODE == XMIT) && /* transmit mode? */
((baci_uart_clk == 0) || /* and end of character? */ ((baci_uart_clk == 0) || /* and end of character? */
(baci_uart_clk == 8) && /* or last stop bit */ ((baci_uart_clk == 8) && /* or last stop bit */
(baci_cfcw & OUT_STBITS) && /* and extra stop bit requested */ (baci_cfcw & OUT_STBITS) && /* and extra stop bit requested */
((baci_cfcw & OUT_CHARSIZE) == 0))) { /* and 1.5 stop bits used? */ ((baci_cfcw & OUT_CHARSIZE) == 0)))) { /* and 1.5 stop bits used? */
baci_uart_clk = 0; /* clear clock count */ baci_uart_clk = 0; /* clear clock count */

28
HP2100/hp2100_cpu.c
View file

@ -1054,7 +1054,7 @@ for (i = OPTDEV; i <= MAXDEV; i++) /* default optional devi
dtab [PWR] = &pwrf_dib; /* for now, powerfail is always present */ dtab [PWR] = &pwrf_dib; /* for now, powerfail is always present */
for (i = 0; dptr = sim_devices [i]; i++) { /* loop thru dev */ for (i = 0; (dptr = sim_devices [i]); i++) { /* loop thru dev */
dibptr = (DIB *) dptr->ctxt; /* get DIB */ dibptr = (DIB *) dptr->ctxt; /* get DIB */
if (dibptr && !(dptr->flags & DEV_DIS)) { /* handler exists and device is enabled? */ if (dibptr && !(dptr->flags & DEV_DIS)) { /* handler exists and device is enabled? */
@ -1464,17 +1464,17 @@ while (reason == SCPE_OK) { /* loop until halted */
*/ */
if ((sim_idle_enab) && (intrq == 0)) /* idle enabled w/o pending irq? */ if ((sim_idle_enab) && (intrq == 0)) /* idle enabled w/o pending irq? */
if (((PC == err_PC) || /* RTE through RTE-IVB */ if ((((PC == err_PC) || /* RTE through RTE-IVB */
((PC == (err_PC - 1)) && /* RTE-6/VM */ ((PC == (err_PC - 1)) && /* RTE-6/VM */
((ReadW (PC) & I_MRG) == I_ISZ))) && /* RTE jump target */ ((ReadW (PC) & I_MRG) == I_ISZ))) && /* RTE jump target */
(mp_fence == CLEAR) && (M [xeqt] == 0) && /* RTE idle indications */ (mp_fence == CLEAR) && (M [xeqt] == 0) && /* RTE idle indications */
(M [tbg] == clk_dib.select_code) || /* RTE verification */ (M [tbg] == clk_dib.select_code)) || /* RTE verification */
(PC == (err_PC - 3)) && /* DOS through DOS-III */ ((PC == (err_PC - 3)) && /* DOS through DOS-III */
(ReadW (PC) == I_STF) && /* DOS jump target */ (ReadW (PC) == I_STF) && /* DOS jump target */
(AR == 0177777) && (BR == 0177777) && /* DOS idle indication */ (AR == 0177777) && (BR == 0177777) && /* DOS idle indication */
(M [m64] == 0177700) && /* DOS verification */ (M [m64] == 0177700) && /* DOS verification */
(M [p64] == 0000100)) /* DOS verification */ (M [p64] == 0000100))) /* DOS verification */
sim_idle (TMR_POLL, FALSE); /* idle the simulator */ sim_idle (TMR_POLL, FALSE); /* idle the simulator */
break; break;
@ -3351,7 +3351,7 @@ t_stat status;
uint32 ioresult; uint32 ioresult;
IOCYCLE signals; IOCYCLE signals;
if (bytes && !even || dma [ch].cw3 != DMASK) { /* normal cycle? */ if ((bytes && !even) || (dma [ch].cw3 != DMASK)) { /* normal cycle? */
if (input) /* input cycle? */ if (input) /* input cycle? */
signals = ioIOI | ioCLF; /* assert IOI and CLF */ signals = ioIOI | ioCLF; /* assert IOI and CLF */
else /* output cycle */ else /* output cycle */
@ -3611,7 +3611,7 @@ uint32 i, j, k;
t_bool is_conflict = FALSE; t_bool is_conflict = FALSE;
uint32 conflicts[MAXDEV + 1] = { 0 }; uint32 conflicts[MAXDEV + 1] = { 0 };
for (i = 0; dptr = sim_devices[i]; i++) { for (i = 0; (dptr = sim_devices[i]); i++) {
dibptr = (DIB *) dptr->ctxt; dibptr = (DIB *) dptr->ctxt;
if (dibptr && !(dptr->flags & DEV_DIS)) if (dibptr && !(dptr->flags & DEV_DIS))
if (++conflicts[dibptr->select_code] > 1) if (++conflicts[dibptr->select_code] > 1)
@ -3629,7 +3629,7 @@ if (is_conflict) {
if (sim_log) if (sim_log)
fprintf (sim_log, "Select code %o conflict:", i); fprintf (sim_log, "Select code %o conflict:", i);
for (j = 0; dptr = sim_devices[j]; j++) { for (j = 0; (dptr = sim_devices[j]); j++) {
dibptr = (DIB *) dptr->ctxt; dibptr = (DIB *) dptr->ctxt;
if (dibptr && !(dptr->flags & DEV_DIS) && (i == dibptr->select_code)) { if (dibptr && !(dptr->flags & DEV_DIS) && (i == dibptr->select_code)) {
if (k < conflicts[i]) { if (k < conflicts[i]) {

32
HP2100/hp2100_cpu0.c
View file

@ -130,7 +130,7 @@ uint32 entry;
entry = IR & 017; /* mask to entry point */ entry = IR & 017; /* mask to entry point */
if (op_ds[entry] != OP_N) if (op_ds[entry] != OP_N)
if (reason = cpu_ops (op_ds[entry], op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (op_ds[entry], op, intrq))) /* get instruction operands */
return reason; return reason;
switch (entry) { /* decode IR<3:0> */ switch (entry) { /* decode IR<3:0> */
@ -191,23 +191,23 @@ switch (IR) {
switch ((IR >> 4) & 037) { /* decode IR<8:4> */ switch ((IR >> 4) & 037) { /* decode IR<8:4> */
/* case 000: /* 105000-105017 */ /* case 000: *//* 105000-105017 */
/* return cpu_user_00 (IR, intrq); /* uncomment to handle instruction */ /* return cpu_user_00 (IR, intrq); *//* uncomment to handle instruction */
/* case 001: /* 105020-105037 */ /* case 001: *//* 105020-105037 */
/* return cpu_user_01 (IR, intrq); /* uncomment to handle instruction */ /* return cpu_user_01 (IR, intrq); *//* uncomment to handle instruction */
/* case 0nn: /* other cases as needed */ /* case 0nn: *//* other cases as needed */
/* return cpu_user_nn (IR, intrq); /* uncomment to handle instruction */ /* return cpu_user_nn (IR, intrq); *//* uncomment to handle instruction */
case 020: /* 10x400-10x417 */ case 020: /* 10x400-10x417 */
return cpu_user_20 (IR, intrq); /* call sample dispatcher */ return cpu_user_20 (IR, intrq); /* call sample dispatcher */
/* case 021: /* 10x420-10x437 */ /* case 021: *//* 10x420-10x437 */
/* return cpu_user_21 (IR, intrq); /* uncomment to handle instruction */ /* return cpu_user_21 (IR, intrq); *//* uncomment to handle instruction */
/* case 0nn: /* other cases as needed */ /* case 0nn: *//* other cases as needed */
/* return cpu_user_nn (IR, intrq); /* uncomment to handle instruction */ /* return cpu_user_nn (IR, intrq); *//* uncomment to handle instruction */
default: /* others undefined */ default: /* others undefined */
reason = stop_inst; reason = stop_inst;
@ -244,19 +244,19 @@ uint32 entry;
entry = IR & 017; /* mask to entry point */ entry = IR & 017; /* mask to entry point */
if (op_user_20 [entry] != OP_N) if (op_user_20 [entry] != OP_N)
if (reason = cpu_ops (op_user_20 [entry], op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (op_user_20 [entry], op, intrq))) /* get instruction operands */
return reason; return reason;
switch (entry) { /* decode IR<4:0> */ switch (entry) { /* decode IR<4:0> */
case 000: /* 10x400 */ case 000: /* 10x400 */
/* break; /* uncomment to handle instruction */ /* break; *//* uncomment to handle instruction */
case 001: /* 10x401 */ case 001: /* 10x401 */
/* break; /* uncomment to handle instruction */ /* break; *//* uncomment to handle instruction */
/* case 0nn: /* other cases as needed */ /* case 0nn: *//* other cases as needed */
/* break; /* uncomment to handle instruction */ /* break; *//* uncomment to handle instruction */
default: /* others undefined */ default: /* others undefined */
reason = stop_inst; reason = stop_inst;

12
HP2100/hp2100_cpu1.c
View file

@ -245,7 +245,7 @@ switch ((IR >> 8) & 0377) { /* decode IR<15:8> */
case 010: /* MPY 100200 (OP_K) */ case 010: /* MPY 100200 (OP_K) */
MPY: MPY:
if (reason = cpu_ops (OP_K, op, intrq)) /* get operand */ if ((reason = cpu_ops (OP_K, op, intrq))) /* get operand */
break; break;
sop1 = SEXT (AR); /* sext AR */ sop1 = SEXT (AR); /* sext AR */
sop2 = SEXT (op[0].word); /* sext mem */ sop2 = SEXT (op[0].word); /* sext mem */
@ -262,9 +262,9 @@ switch ((IR >> 8) & 0377) { /* decode IR<15:8> */
break; break;
case 0201: /* DIV 100400 (OP_K) */ case 0201: /* DIV 100400 (OP_K) */
if (reason = cpu_ops (OP_K, op, intrq)) /* get operand */ if ((reason = cpu_ops (OP_K, op, intrq))) /* get operand */
break; break;
if (rs = qs = BR & SIGN) { /* save divd sign, neg? */ if ((rs = qs = BR & SIGN)) { /* save divd sign, neg? */
AR = (~AR + 1) & DMASK; /* make B'A pos */ AR = (~AR + 1) & DMASK; /* make B'A pos */
BR = (~BR + (AR == 0)) & DMASK; /* make divd pos */ BR = (~BR + (AR == 0)) & DMASK; /* make divd pos */
} }
@ -317,14 +317,14 @@ switch ((IR >> 8) & 0377) { /* decode IR<15:8> */
break; break;
case 0210: /* DLD 104200 (OP_D) */ case 0210: /* DLD 104200 (OP_D) */
if (reason = cpu_ops (OP_D, op, intrq)) /* get operand */ if ((reason = cpu_ops (OP_D, op, intrq))) /* get operand */
break; break;
AR = (op[0].dword >> 16) & DMASK; /* load AR */ AR = (op[0].dword >> 16) & DMASK; /* load AR */
BR = op[0].dword & DMASK; /* load BR */ BR = op[0].dword & DMASK; /* load BR */
break; break;
case 0211: /* DST 104400 (OP_A) */ case 0211: /* DST 104400 (OP_A) */
if (reason = cpu_ops (OP_A, op, intrq)) /* get operand */ if ((reason = cpu_ops (OP_A, op, intrq))) /* get operand */
break; break;
WriteW (op[0].word, AR); /* store AR */ WriteW (op[0].word, AR); /* store AR */
WriteW ((op[0].word + 1) & VAMASK, BR); /* store BR */ WriteW ((op[0].word + 1) & VAMASK, BR); /* store BR */
@ -734,7 +734,7 @@ for (i = 0; i < OP_N_F; i++) {
flags = pattern & OP_M_FLAGS; /* get operand pattern */ flags = pattern & OP_M_FLAGS; /* get operand pattern */
if (flags >= OP_ADR) /* address operand? */ if (flags >= OP_ADR) /* address operand? */
if (reason = resolve (ReadW (PC), &MA, irq)) /* resolve indirects */ if ((reason = resolve (ReadW (PC), &MA, irq))) /* resolve indirects */
return reason; return reason;
switch (flags) { switch (flags) {

6
HP2100/hp2100_cpu2.c
View file

@ -244,7 +244,7 @@ absel = (IR & I_AB)? 1: 0; /* get A/B select */
entry = IR & 037; /* mask to entry point */ entry = IR & 037; /* mask to entry point */
if (op_dms[entry] != OP_N) if (op_dms[entry] != OP_N)
if (reason = cpu_ops (op_dms[entry], op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (op_dms[entry], op, intrq))) /* get instruction operands */
return reason; return reason;
switch (entry) { /* decode IR<3:0> */ switch (entry) { /* decode IR<3:0> */
@ -610,7 +610,7 @@ absel = (IR & I_AB)? 1: 0; /* get A/B select */
entry = IR & 037; /* mask to entry point */ entry = IR & 037; /* mask to entry point */
if (op_eig[entry] != OP_N) if (op_eig[entry] != OP_N)
if (reason = cpu_ops (op_eig[entry], op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (op_eig[entry], op, intrq))) /* get instruction operands */
return reason; return reason;
switch (entry) { /* decode IR<4:0> */ switch (entry) { /* decode IR<4:0> */
@ -989,7 +989,7 @@ else if (entry <= 057) /* IR = 10x440-457? */
entry = entry - 060; /* offset 10x460-477 */ entry = entry - 060; /* offset 10x460-477 */
if (op_iop[entry] != OP_N) if (op_iop[entry] != OP_N)
if (reason = cpu_ops (op_iop[entry], op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (op_iop[entry], op, intrq))) /* get instruction operands */
return reason; return reason;
switch (entry) { /* decode IR<5:0> */ switch (entry) { /* decode IR<5:0> */

12
HP2100/hp2100_cpu3.c
View file

@ -186,7 +186,7 @@ entry = IR & 037; /* mask to entry point *
if (UNIT_CPU_MODEL != UNIT_1000_F) { /* 2100/M/E-Series? */ if (UNIT_CPU_MODEL != UNIT_1000_F) { /* 2100/M/E-Series? */
if (op_ffp_e[entry] != OP_N) if (op_ffp_e[entry] != OP_N)
if (reason = cpu_ops (op_ffp_e[entry], op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (op_ffp_e[entry], op, intrq)))/* get instruction operands */
return reason; return reason;
} }
@ -194,7 +194,7 @@ if (UNIT_CPU_MODEL != UNIT_1000_F) { /* 2100/M/E-Series? */
else { /* F-Series */ else { /* F-Series */
if (op_ffp_f[entry] != OP_N) if (op_ffp_f[entry] != OP_N)
if (reason = cpu_ops (op_ffp_f[entry], op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (op_ffp_f[entry], op, intrq)))/* get instruction operands */
return reason; return reason;
switch (entry) { /* decode IR<4:0> */ switch (entry) { /* decode IR<4:0> */
@ -417,7 +417,7 @@ switch (entry) { /* decode IR<4:0> */
sa = op[0].word - 1; sa = op[0].word - 1;
da = ReadW (sa); /* get jump target */ da = ReadW (sa); /* get jump target */
if (reason = resolve (da, &MA, intrq)) { /* resolve indirects */ if ((reason = resolve (da, &MA, intrq))) { /* resolve indirects */
PC = err_PC; /* irq restarts instruction */ PC = err_PC; /* irq restarts instruction */
break; break;
} }
@ -435,7 +435,7 @@ switch (entry) { /* decode IR<4:0> */
op[1].word = op[1].word + /* compute element offset */ op[1].word = op[1].word + /* compute element offset */
(op[2].word - 1) * op[3].word; (op[2].word - 1) * op[3].word;
else { /* 3-dim access */ else { /* 3-dim access */
if (reason = cpu_ops (OP_KK, op2, intrq)) { /* get 1st, 2nd ranges */ if ((reason = cpu_ops (OP_KK, op2, intrq))) {/* get 1st, 2nd ranges */
PC = err_PC; /* irq restarts instruction */ PC = err_PC; /* irq restarts instruction */
break; break;
} }
@ -461,7 +461,7 @@ switch (entry) { /* decode IR<4:0> */
for (j = 0; j < sc; j++) { for (j = 0; j < sc; j++) {
MA = ReadW (sa++); /* get addr of actual */ MA = ReadW (sa++); /* get addr of actual */
if (reason = resolve (MA, &MA, intrq)) { /* resolve indirect */ if ((reason = resolve (MA, &MA, intrq))) { /* resolve indirect */
PC = err_PC; /* irq restarts instruction */ PC = err_PC; /* irq restarts instruction */
break; break;
} }
@ -644,7 +644,7 @@ t_stat reason = SCPE_OK;
entry = IR & 017; /* mask to entry point */ entry = IR & 017; /* mask to entry point */
if (op_dbi[entry] != OP_N) if (op_dbi[entry] != OP_N)
if (reason = cpu_ops (op_dbi[entry], op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (op_dbi[entry], op, intrq))) /* get instruction operands */
return reason; return reason;
switch (entry) { /* decode IR<3:0> */ switch (entry) { /* decode IR<3:0> */

4
HP2100/hp2100_cpu4.c
View file

@ -261,7 +261,7 @@ else
entry = opcode & 0177; /* map to <6:0> */ entry = opcode & 0177; /* map to <6:0> */
if (op_fpp[entry] != OP_N) if (op_fpp[entry] != OP_N)
if (reason = cpu_ops (op_fpp[entry], op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (op_fpp[entry], op, intrq))) /* get instruction operands */
return reason; return reason;
switch (entry) { /* decode IR<6:0> */ switch (entry) { /* decode IR<6:0> */
@ -600,7 +600,7 @@ static const OP t_one = { { 0040000, 0000000, 0000000, 0000002 } }; /* DEY 1.
entry = IR & 017; /* mask to entry point */ entry = IR & 017; /* mask to entry point */
if (op_sis[entry] != OP_N) if (op_sis[entry] != OP_N)
if (reason = cpu_ops (op_sis[entry], op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (op_sis[entry], op, intrq))) /* get instruction operands */
return reason; return reason;
switch (entry) { /* decode IR<3:0> */ switch (entry) { /* decode IR<3:0> */

4
HP2100/hp2100_cpu5.c
View file

@ -650,7 +650,7 @@ entry = IR & 017; /* mask to entry point */
pattern = op_vma[entry]; /* get operand pattern */ pattern = op_vma[entry]; /* get operand pattern */
if (pattern != OP_N) if (pattern != OP_N)
if (reason = cpu_ops (pattern, op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (pattern, op, intrq))) /* get instruction operands */
return reason; return reason;
if (debug) { /* debugging? */ if (debug) { /* debugging? */
@ -1361,7 +1361,7 @@ entry = IR & 017; /* mask to entry point *
pattern = op_ema[entry]; /* get operand pattern */ pattern = op_ema[entry]; /* get operand pattern */
if (pattern != OP_N) if (pattern != OP_N)
if (reason = cpu_ops (pattern, op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (pattern, op, intrq))) /* get instruction operands */
return reason; return reason;
if (debug) { /* debugging? */ if (debug) { /* debugging? */

12
HP2100/hp2100_cpu6.c
View file

@ -394,10 +394,10 @@ entry = IR & 017; /* mask to entry point *
pattern = op_os[entry]; /* get operand pattern */ pattern = op_os[entry]; /* get operand pattern */
if (pattern != OP_N) if (pattern != OP_N)
if (reason = cpu_ops (pattern, op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (pattern, op, intrq))) /* get instruction operands */
return reason; return reason;
tbg_tick = tbg_tick || (IR == 0105357) && iotrap; /* set TBG interrupting flag */ tbg_tick = tbg_tick || ((IR == 0105357) && iotrap); /* set TBG interrupting flag */
debug_print = (DEBUG_PRI (cpu_dev, DEB_OS) && !tbg_tick) || debug_print = (DEBUG_PRI (cpu_dev, DEB_OS) && !tbg_tick) ||
(DEBUG_PRI (cpu_dev, DEB_OSTBG) && tbg_tick); (DEBUG_PRI (cpu_dev, DEB_OSTBG) && tbg_tick);
@ -544,7 +544,7 @@ switch (entry) { /* decode IR<3:0> */
for (i = 0; i < count; i++) { for (i = 0; i < count; i++) {
ma = ReadW (PC); /* get operand address */ ma = ReadW (PC); /* get operand address */
if (reason = resolve (ma, &ma, intrq)) { /* resolve indirect */ if ((reason = resolve (ma, &ma, intrq))) { /* resolve indirect */
PC = err_PC; /* IRQ restarts instruction */ PC = err_PC; /* IRQ restarts instruction */
break; break;
} }
@ -620,8 +620,8 @@ switch (entry) { /* decode IR<3:0> */
while ((AR != 0) && ((AR & SIGN) == 0)) { /* end of list or bad list? */ while ((AR != 0) && ((AR & SIGN) == 0)) { /* end of list or bad list? */
key = ReadW ((AR + op[1].word) & VAMASK); /* get key value */ key = ReadW ((AR + op[1].word) & VAMASK); /* get key value */
if ((E == 0) && (key == op[0].word) || /* for E = 0, key = arg? */ if (((E == 0) && (key == op[0].word)) || /* for E = 0, key = arg? */
(E != 0) && (key > op[0].word)) /* for E = 1, key > arg? */ ((E != 0) && (key > op[0].word))) /* for E = 1, key > arg? */
break; /* search is done */ break; /* search is done */
BR = AR; /* B = last link */ BR = AR; /* B = last link */
@ -710,7 +710,7 @@ switch (entry) { /* decode IR<3:0> */
ma = ReadW (sa); /* get addr of actual */ ma = ReadW (sa); /* get addr of actual */
sa = (sa + 1) & VAMASK; /* increment address */ sa = (sa + 1) & VAMASK; /* increment address */
if (reason = resolve (ma, &ma, intrq)) { /* resolve indirect */ if ((reason = resolve (ma, &ma, intrq))) { /* resolve indirect */
PC = err_PC; /* irq restarts instruction */ PC = err_PC; /* irq restarts instruction */
break; break;
} }

4
HP2100/hp2100_cpu7.c
View file

@ -391,7 +391,7 @@ if (pattern != OP_N)
rtn = rtn1 = ret.word; /* but save it just in case */ rtn = rtn1 = ret.word; /* but save it just in case */
PC = (PC + 1) & VAMASK; /* move to next argument */ PC = (PC + 1) & VAMASK; /* move to next argument */
} }
if (reason = cpu_ops (pattern, op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (pattern, op, intrq))) /* get instruction operands */
return reason; return reason;
if (debug) { /* debugging? */ if (debug) { /* debugging? */
@ -653,7 +653,7 @@ t_bool debug = DEBUG_PRI (cpu_dev, DEB_SIG);
entry = IR & 017; /* mask to entry point */ entry = IR & 017; /* mask to entry point */
if (op_signal[entry] != OP_N) if (op_signal[entry] != OP_N)
if (reason = cpu_ops (op_signal[entry], op, intrq)) /* get instruction operands */ if ((reason = cpu_ops (op_signal[entry], op, intrq)))/* get instruction operands */
return reason; return reason;
if (debug) { /* debugging? */ if (debug) { /* debugging? */

38
HP2100/hp2100_di.c
View file

@ -1466,10 +1466,10 @@ if (assert != deny) /* was there any change
previous_state = di_card->srq; /* save the current SRQ state */ previous_state = di_card->srq; /* save the current SRQ state */
if (di_card->cntl_register & CNTL_LSTN /* if the card is a listener */ if (((di_card->cntl_register & CNTL_LSTN) && /* if the card is a listener */
&& di_card->status_register & STAT_IRL /* and the input register is loaded, */ (di_card->status_register & STAT_IRL)) || /* and the input register is loaded, */
|| di_card->cntl_register & CNTL_TALK /* or the card is a talker */ ((di_card->cntl_register & CNTL_TALK) && /* or the card is a talker */
&& ! FIFO_FULL) /* and the FIFO is not full */ ! FIFO_FULL)) /* and the FIFO is not full */
di_card->srq = SET; /* then request a DCPC cycle */ di_card->srq = SET; /* then request a DCPC cycle */
else else
di_card->srq = CLEAR; /* otherwise, DCPC service is not needed */ di_card->srq = CLEAR; /* otherwise, DCPC service is not needed */
@ -1481,21 +1481,21 @@ if (DEBUG_PRJ (dptrs [card], DEB_CMDS)
dptrs [card]->name, di_card->srq == SET ? "set" : "cleared"); dptrs [card]->name, di_card->srq == SET ? "set" : "cleared");
if (di_card->status_register & STAT_IRL /* is the input register loaded */ if (((di_card->status_register & STAT_IRL) && /* is the input register loaded */
&& di_card->cntl_register & CNTL_IRL /* and notification is wanted? */ (di_card->cntl_register & CNTL_IRL)) || /* and notification is wanted? */
|| di_card->status_register & STAT_LBO /* or is the last byte out */ ((di_card->status_register & STAT_LBO) && /* or is the last byte out */
&& di_card->cntl_register & CNTL_LBO /* and notification is wanted? */ (di_card->cntl_register & CNTL_LBO)) || /* and notification is wanted? */
|| di_card->eor == SET /* or was the end of record seen */ ((di_card->eor == SET) && /* or was the end of record seen */
&& !(di_card->status_register & STAT_IRL) /* and the input register was unloaded? */ !(di_card->status_register & STAT_IRL)) || /* and the input register was unloaded? */
|| di_card->bus_cntl & BUS_SRQ /* or is SRQ asserted on the bus */ ((di_card->bus_cntl & BUS_SRQ) && /* or is SRQ asserted on the bus */
&& di_card->cntl_register & CNTL_SRQ /* and notification is wanted */ (di_card->cntl_register & CNTL_SRQ) && /* and notification is wanted */
&& di_card->cntl_register & CNTL_CIC /* and the card is not controller? */ (di_card->cntl_register & CNTL_CIC)) || /* and the card is not controller? */
|| !SW8_SYSCTL /* or is the card not the system controller */ (!SW8_SYSCTL && /* or is the card not the system controller */
&& di_card->bus_cntl & BUS_REN /* and REN is asserted on the bus */ (di_card->bus_cntl & BUS_REN) && /* and REN is asserted on the bus */
&& di_card->cntl_register & CNTL_REN /* and notification is wanted? */ (di_card->cntl_register & CNTL_REN)) || /* and notification is wanted? */
|| !SW8_SYSCTL /* or is the card not the system controller */ (!SW8_SYSCTL && /* or is the card not the system controller */
&& di_card->status_register & STAT_IFC /* and IFC is asserted on the bus */ (di_card->status_register & STAT_IFC) && /* and IFC is asserted on the bus */
&& di_card->cntl_register & CNTL_IFC) { /* and notification is wanted? */ (di_card->cntl_register & CNTL_IFC))) { /* and notification is wanted? */
if (DEBUG_PRJ (dptrs [card], DEB_CMDS)) if (DEBUG_PRJ (dptrs [card], DEB_CMDS))
fprintf (sim_deb, ">>%s cmds: Flag set\n", fprintf (sim_deb, ">>%s cmds: Flag set\n",

8
HP2100/hp2100_di_da.c
View file

@ -1594,10 +1594,10 @@ if (di [da].bus_cntl & BUS_ATN) { /* is it a bus comma
da_unit [unit].wait = icd_cntlr [unit].cmd_time; /* these are always scheduled and */ da_unit [unit].wait = icd_cntlr [unit].cmd_time; /* these are always scheduled and */
initiated = TRUE; /* logged as initiated */ initiated = TRUE; /* logged as initiated */
if (if_state [unit] == read_wait /* if we're waiting for a send data secondary */ if (((if_state [unit] == read_wait) && /* if we're waiting for a send data secondary */
&& message_address != 0x00 /* but it's not there */ (message_address != 0x00)) || /* but it's not there */
|| if_state [unit] == status_wait /* or a send status secondary, */ ((if_state [unit] == status_wait) && /* or a send status secondary, */
&& message_address != 0x08) /* but it's not there */ (message_address != 0x08))) /* but it's not there */
abort_command (unit, io_program_error, /* then abort the pending command */ abort_command (unit, io_program_error, /* then abort the pending command */
idle); /* and process the new command */ idle); /* and process the new command */

16
HP2100/hp2100_dp.c
View file

@ -190,7 +190,7 @@
#define STA_PROT 0002000 /* protected (13210) */ #define STA_PROT 0002000 /* protected (13210) */
#define STA_SKI 0001000 /* incomplete NI (u) */ #define STA_SKI 0001000 /* incomplete NI (u) */
#define STA_SKE 0000400 /* seek error */ #define STA_SKE 0000400 /* seek error */
/* 0000200 /* unused */ /* 0000200 *//* unused */
#define STA_NRDY 0000100 /* not ready (d) */ #define STA_NRDY 0000100 /* not ready (d) */
#define STA_EOC 0000040 /* end of cylinder */ #define STA_EOC 0000040 /* end of cylinder */
#define STA_AER 0000020 /* addr error */ #define STA_AER 0000020 /* addr error */
@ -694,7 +694,7 @@ void dp_goc (int32 fnc, int32 drv, int32 time)
{ {
int32 t; int32 t;
if (t = sim_is_active (&dpc_unit[drv])) { /* still seeking? */ if ((t = sim_is_active (&dpc_unit[drv]))) { /* still seeking? */
sim_cancel (&dpc_unit[drv]); /* stop seek */ sim_cancel (&dpc_unit[drv]); /* stop seek */
dpc_sta[drv] = dpc_sta[drv] & ~STA_BSY; /* clear busy */ dpc_sta[drv] = dpc_sta[drv] & ~STA_BSY; /* clear busy */
time = time + t; /* include seek time */ time = time + t; /* include seek time */
@ -906,10 +906,10 @@ switch (uptr->FNC) { /* case function */
dpc_rarh = dpc_rarh ^ 1; /* incr head */ dpc_rarh = dpc_rarh ^ 1; /* incr head */
dpc_eoc = ((dpc_rarh & 1) == 0); /* calc eoc */ dpc_eoc = ((dpc_rarh & 1) == 0); /* calc eoc */
} }
if (err = fseek (uptr->fileref, da * sizeof (int16), if ((err = fseek (uptr->fileref, da * sizeof (int16),
SEEK_SET)) break; SEEK_SET))) break;
fxread (dpxb, sizeof (int16), DP_NUMWD, uptr->fileref); fxread (dpxb, sizeof (int16), DP_NUMWD, uptr->fileref);
if (err = ferror (uptr->fileref)) break; if ((err = ferror (uptr->fileref))) break;
} }
dpd_ibuf = dpxb[dp_ptr++]; /* get word */ dpd_ibuf = dpxb[dp_ptr++]; /* get word */
if (dp_ptr >= DP_NUMWD) { /* end of sector? */ if (dp_ptr >= DP_NUMWD) { /* end of sector? */
@ -953,10 +953,10 @@ switch (uptr->FNC) { /* case function */
dpc_rarh = dpc_rarh ^ 1; /* incr head */ dpc_rarh = dpc_rarh ^ 1; /* incr head */
dpc_eoc = ((dpc_rarh & 1) == 0); /* calc eoc */ dpc_eoc = ((dpc_rarh & 1) == 0); /* calc eoc */
} }
if (err = fseek (uptr->fileref, da * sizeof (int16), if ((err = fseek (uptr->fileref, da * sizeof (int16),
SEEK_SET)) break; SEEK_SET))) break;
fxwrite (dpxb, sizeof (int16), DP_NUMWD, uptr->fileref); fxwrite (dpxb, sizeof (int16), DP_NUMWD, uptr->fileref);
if (err = ferror (uptr->fileref)) break; /* error? */ if ((err = ferror (uptr->fileref))) break; /* error? */
dp_ptr = 0; /* next sector */ dp_ptr = 0; /* next sector */
} }
if (dpd.command && dpd_xfer) /* dch on, xfer? */ if (dpd.command && dpd_xfer) /* dch on, xfer? */

16
HP2100/hp2100_dq.c
View file

@ -100,7 +100,7 @@
#define CW_V_FNC 12 /* function */ #define CW_V_FNC 12 /* function */
#define CW_M_FNC 017 #define CW_M_FNC 017
#define CW_GETFNC(x) (((x) >> CW_V_FNC) & CW_M_FNC) #define CW_GETFNC(x) (((x) >> CW_V_FNC) & CW_M_FNC)
/* 000 /* unused */ /* 000 *//* unused */
#define FNC_STA 001 /* status check */ #define FNC_STA 001 /* status check */
#define FNC_RCL 002 /* recalibrate */ #define FNC_RCL 002 /* recalibrate */
#define FNC_SEEK 003 /* seek */ #define FNC_SEEK 003 /* seek */
@ -530,7 +530,7 @@ void dq_goc (int32 fnc, int32 drv, int32 time)
{ {
int32 t; int32 t;
if (t = sim_is_active (&dqc_unit[drv])) { /* still seeking? */ if ((t = sim_is_active (&dqc_unit[drv]))) { /* still seeking? */
sim_cancel (&dqc_unit[drv]); /* cancel */ sim_cancel (&dqc_unit[drv]); /* cancel */
time = time + t; /* include seek time */ time = time + t; /* include seek time */
} }
@ -740,10 +740,10 @@ switch (uptr->FNC) { /* case function */
dqc_rars = (dqc_rars + 1) % DQ_NUMSC; /* incr sector */ dqc_rars = (dqc_rars + 1) % DQ_NUMSC; /* incr sector */
if (dqc_rars == 0) /* wrap? incr head */ if (dqc_rars == 0) /* wrap? incr head */
dqc_uhed[drv] = dqc_rarh = dqc_rarh + 1; dqc_uhed[drv] = dqc_rarh = dqc_rarh + 1;
if (err = fseek (uptr->fileref, da * sizeof (int16), if ((err = fseek (uptr->fileref, da * sizeof (int16),
SEEK_SET)) break; SEEK_SET))) break;
fxread (dqxb, sizeof (int16), DQ_NUMWD, uptr->fileref); fxread (dqxb, sizeof (int16), DQ_NUMWD, uptr->fileref);
if (err = ferror (uptr->fileref)) break; if ((err = ferror (uptr->fileref))) break;
} }
dqd_ibuf = dqxb[dq_ptr++]; /* get word */ dqd_ibuf = dqxb[dq_ptr++]; /* get word */
if (dq_ptr >= DQ_NUMWD) { /* end of sector? */ if (dq_ptr >= DQ_NUMWD) { /* end of sector? */
@ -786,10 +786,10 @@ switch (uptr->FNC) { /* case function */
dqc_rars = (dqc_rars + 1) % DQ_NUMSC; /* incr sector */ dqc_rars = (dqc_rars + 1) % DQ_NUMSC; /* incr sector */
if (dqc_rars == 0) /* wrap? incr head */ if (dqc_rars == 0) /* wrap? incr head */
dqc_uhed[drv] = dqc_rarh = dqc_rarh + 1; dqc_uhed[drv] = dqc_rarh = dqc_rarh + 1;
if (err = fseek (uptr->fileref, da * sizeof (int16), if ((err = fseek (uptr->fileref, da * sizeof (int16),
SEEK_SET)) return TRUE; SEEK_SET))) return TRUE;
fxwrite (dqxb, sizeof (int16), DQ_NUMWD, uptr->fileref); fxwrite (dqxb, sizeof (int16), DQ_NUMWD, uptr->fileref);
if (err = ferror (uptr->fileref)) break; if ((err = ferror (uptr->fileref))) break;
dq_ptr = 0; dq_ptr = 0;
} }
if (dqd.command && dqd_xfer) { /* dch on, xfer? */ if (dqd.command && dqd_xfer) { /* dch on, xfer? */

2
HP2100/hp2100_ipl.c
View file

@ -623,7 +623,7 @@ uptr->filename = tptr; /* save */
sim_activate (uptr, POLL_FIRST); /* activate first poll "immediately" */ sim_activate (uptr, POLL_FIRST); /* activate first poll "immediately" */
if (sim_switches & SWMASK ('W')) { /* wait? */ if (sim_switches & SWMASK ('W')) { /* wait? */
for (i = 0; i < 30; i++) { /* check for 30 sec */ for (i = 0; i < 30; i++) { /* check for 30 sec */
if (t = ipl_check_conn (uptr)) /* established? */ if ((t = ipl_check_conn (uptr))) /* established? */
break; break;
if ((i % 10) == 0) /* status every 10 sec */ if ((i % 10) == 0) /* status every 10 sec */
printf ("Waiting for connnection\n"); printf ("Waiting for connnection\n");

4
HP2100/hp2100_mpx.c
View file

@ -1926,8 +1926,8 @@ if (fast_binary_read) { /* fast binary read
else { /* normal service */ else { /* normal service */
tmxr_poll_tx (&mpx_desc); /* output any accumulated characters */ tmxr_poll_tx (&mpx_desc); /* output any accumulated characters */
if ((buf_avail (iowrite, port) < 2) && /* more to transmit? */ if (((buf_avail (iowrite, port) < 2) && /* more to transmit? */
!(mpx_flags [port] & (FL_WAITACK | FL_XOFF)) || /* and transmission not suspended */ !(mpx_flags [port] & (FL_WAITACK | FL_XOFF))) || /* and transmission not suspended */
tmxr_rqln (&mpx_ldsc [port])) /* or more to receive? */ tmxr_rqln (&mpx_ldsc [port])) /* or more to receive? */
sim_activate (uptr, uptr->wait); /* reschedule service */ sim_activate (uptr, uptr->wait); /* reschedule service */
else else

16
HP2100/hp2100_ms.c
View file

@ -737,7 +737,7 @@ switch (uptr->FNC) { /* case on function */
fprintf (sim_deb, fprintf (sim_deb,
">>MSC svc: Unit %d wrote initial gap\n", ">>MSC svc: Unit %d wrote initial gap\n",
unum); unum);
if (st = ms_write_gap (uptr)) { /* write initial gap; error? */ if ((st = ms_write_gap (uptr))) { /* write initial gap; error? */
r = ms_map_err (uptr, st); /* map error */ r = ms_map_err (uptr, st); /* map error */
break; /* terminate operation */ break; /* terminate operation */
} }
@ -747,13 +747,13 @@ switch (uptr->FNC) { /* case on function */
fprintf (sim_deb, fprintf (sim_deb,
">>MSC svc: Unit %d wrote file mark\n", ">>MSC svc: Unit %d wrote file mark\n",
unum); unum);
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = ms_map_err (uptr, st); /* map error */ r = ms_map_err (uptr, st); /* map error */
msc_sta = STA_EOF; /* set EOF status */ msc_sta = STA_EOF; /* set EOF status */
break; break;
case FNC_FSR: /* space forward */ case FNC_FSR: /* space forward */
if (st = sim_tape_sprecf (uptr, &tbc)) /* space rec fwd, err? */ if ((st = sim_tape_sprecf (uptr, &tbc))) /* space rec fwd, err? */
r = ms_map_err (uptr, st); /* map error */ r = ms_map_err (uptr, st); /* map error */
if (tbc & 1) if (tbc & 1)
msc_sta = msc_sta | STA_ODD; msc_sta = msc_sta | STA_ODD;
@ -761,7 +761,7 @@ switch (uptr->FNC) { /* case on function */
break; break;
case FNC_BSR: /* space reverse */ case FNC_BSR: /* space reverse */
if (st = sim_tape_sprecr (uptr, &tbc)) /* space rec rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) /* space rec rev, err? */
r = ms_map_err (uptr, st); /* map error */ r = ms_map_err (uptr, st); /* map error */
if (tbc & 1) if (tbc & 1)
msc_sta = msc_sta | STA_ODD; msc_sta = msc_sta | STA_ODD;
@ -831,7 +831,7 @@ switch (uptr->FNC) { /* case on function */
fprintf (sim_deb, fprintf (sim_deb,
">>MSC svc: Unit %d wrote initial gap\n", ">>MSC svc: Unit %d wrote initial gap\n",
unum); unum);
if (st = ms_write_gap (uptr)) { /* write initial gap; error? */ if ((st = ms_write_gap (uptr))) { /* write initial gap; error? */
r = ms_map_err (uptr, st); /* map error */ r = ms_map_err (uptr, st); /* map error */
break; /* terminate operation */ break; /* terminate operation */
} }
@ -855,7 +855,7 @@ switch (uptr->FNC) { /* case on function */
fprintf (sim_deb, fprintf (sim_deb,
">>MSC svc: Unit %d wrote %d word record\n", ">>MSC svc: Unit %d wrote %d word record\n",
unum, ms_ptr / 2); unum, ms_ptr / 2);
if (st = sim_tape_wrrecf (uptr, msxb, ms_ptr)) { /* write, err? */ if ((st = sim_tape_wrrecf (uptr, msxb, ms_ptr))) { /* write, err? */
r = ms_map_err (uptr, st); /* map error */ r = ms_map_err (uptr, st); /* map error */
break; break;
} }
@ -894,7 +894,7 @@ t_stat st;
uint32 gap_len = ms_ctype ? GAP_13183 : GAP_13181; /* establish gap length */ uint32 gap_len = ms_ctype ? GAP_13183 : GAP_13181; /* establish gap length */
uint32 tape_bpi = ms_ctype ? BPI_13183 : BPI_13181; /* establish nominal bpi */ uint32 tape_bpi = ms_ctype ? BPI_13183 : BPI_13181; /* establish nominal bpi */
if (st = sim_tape_wrgap (uptr, gap_len, tape_bpi)) /* write gap */ if ((st = sim_tape_wrgap (uptr, gap_len, tape_bpi))) /* write gap */
return ms_map_err (uptr, st); /* map error if failure */ return ms_map_err (uptr, st); /* map error if failure */
else else
return SCPE_OK; return SCPE_OK;
@ -974,7 +974,7 @@ for (i = 0; i < MS_NUMDR; i++) { /* look for write in pro
fprintf (sim_deb, fprintf (sim_deb,
">>MSC rws: Unit %d wrote %d word partial record\n", i, ms_ptr / 2); ">>MSC rws: Unit %d wrote %d word partial record\n", i, ms_ptr / 2);
if (st = sim_tape_wrrecf (uptr, msxb, ms_ptr | MTR_ERF)) if ((st = sim_tape_wrrecf (uptr, msxb, ms_ptr | MTR_ERF)))
ms_map_err (uptr, st); /* discard any error */ ms_map_err (uptr, st); /* discard any error */
ms_ptr = 0; /* clear partial */ ms_ptr = 0; /* clear partial */

10
HP2100/hp2100_mt.c
View file

@ -495,7 +495,7 @@ switch (mtc_fnc) { /* case on function */
return sim_tape_detach (uptr); /* don't set cch flg */ return sim_tape_detach (uptr); /* don't set cch flg */
case FNC_WFM: /* write file mark */ case FNC_WFM: /* write file mark */
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
mtc_sta = STA_EOF; /* set EOF status */ mtc_sta = STA_EOF; /* set EOF status */
break; break;
@ -504,12 +504,12 @@ switch (mtc_fnc) { /* case on function */
break; break;
case FNC_FSR: /* space forward */ case FNC_FSR: /* space forward */
if (st = sim_tape_sprecf (uptr, &tbc)) /* space rec fwd, err? */ if ((st = sim_tape_sprecf (uptr, &tbc))) /* space rec fwd, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; break;
case FNC_BSR: /* space reverse */ case FNC_BSR: /* space reverse */
if (st = sim_tape_sprecr (uptr, &tbc)) /* space rec rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) /* space rec rev, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; break;
@ -558,7 +558,7 @@ switch (mtc_fnc) { /* case on function */
return SCPE_OK; return SCPE_OK;
} }
if (mt_ptr) { /* write buffer */ if (mt_ptr) { /* write buffer */
if (st = sim_tape_wrrecf (uptr, mtxb, mt_ptr)) { /* write, err? */ if ((st = sim_tape_wrrecf (uptr, mtxb, mt_ptr))) { /* write, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; /* done */ break; /* done */
} }
@ -627,7 +627,7 @@ t_stat st;
if (sim_is_active (&mtc_unit) && /* write in prog? */ if (sim_is_active (&mtc_unit) && /* write in prog? */
(mtc_fnc == FNC_WC) && (mt_ptr > 0)) { /* yes, bad rec */ (mtc_fnc == FNC_WC) && (mt_ptr > 0)) { /* yes, bad rec */
if (st = sim_tape_wrrecf (&mtc_unit, mtxb, mt_ptr | MTR_ERF)) if ((st = sim_tape_wrrecf (&mtc_unit, mtxb, mt_ptr | MTR_ERF)))
mt_map_err (&mtc_unit, st); mt_map_err (&mtc_unit, st);
} }

2
HP2100/hp2100_stddev.c
View file

@ -942,7 +942,7 @@ t_stat r;
if (tty_mode & TM_PRI) { /* printing? */ if (tty_mode & TM_PRI) { /* printing? */
c = sim_tt_outcvt (c, TT_GET_MODE (tty_unit[TTO].flags)); c = sim_tt_outcvt (c, TT_GET_MODE (tty_unit[TTO].flags));
if (c >= 0) { /* valid? */ if (c >= 0) { /* valid? */
if (r = sim_putchar_s (c)) return r; /* output char */ if ((r = sim_putchar_s (c))) return r; /* output char */
tty_unit[TTO].pos = tty_unit[TTO].pos + 1; tty_unit[TTO].pos = tty_unit[TTO].pos + 1;
} }
} }

4
HP2100/hp2100_sys.c
View file

@ -608,11 +608,11 @@ if (opcode[i]) { /* found opcode? */
case I_V_MRF: /* mem ref */ case I_V_MRF: /* mem ref */
cptr = get_glyph (cptr, gbuf, 0); /* get next field */ cptr = get_glyph (cptr, gbuf, 0); /* get next field */
if (k = (strcmp (gbuf, "C") == 0)) { /* C specified? */ if ((k = (strcmp (gbuf, "C") == 0))) { /* C specified? */
val[0] = val[0] | I_CP; val[0] = val[0] | I_CP;
cptr = get_glyph (cptr, gbuf, 0); cptr = get_glyph (cptr, gbuf, 0);
} }
else if (k = (strcmp (gbuf, "Z") == 0)) { /* Z specified? */ else if ((k = (strcmp (gbuf, "Z") == 0))) { /* Z specified? */
cptr = get_glyph (cptr, gbuf, ','); cptr = get_glyph (cptr, gbuf, ',');
} }
if ((d = get_addr (gbuf)) < 0) return SCPE_ARG; if ((d = get_addr (gbuf)) < 0) return SCPE_ARG;

8
HP2100/hp_disclib.c
View file

@ -761,8 +761,8 @@ else { /* for an ICD controller
uptr = units + unit_limit; /* and we use the indicated unit */ uptr = units + unit_limit; /* and we use the indicated unit */
} }
if (props->unit_check && !uptr /* if the unit number is checked and is invalid */ if ((props->unit_check && !uptr) || /* if the unit number is checked and is invalid */
|| props->seek_wait && (drive_status (uptr) & DL_S2STOPS)) { /* or if we're waiting for an offline drive */ (props->seek_wait && (drive_status (uptr) & DL_S2STOPS))) { /* or if we're waiting for an offline drive */
dl_end_command (cvptr, status_2_error); /* then the command ends with a Status-2 error */ dl_end_command (cvptr, status_2_error); /* then the command ends with a Status-2 error */
uptr = NULL; /* prevent the command from starting */ uptr = NULL; /* prevent the command from starting */
} }
@ -1879,8 +1879,8 @@ static void start_write (CVPTR cvptr, UNIT *uptr)
{ {
const t_bool verify = (CNTLR_OPCODE) uptr->OP == write; /* only Write verifies the sector address */ const t_bool verify = (CNTLR_OPCODE) uptr->OP == write; /* only Write verifies the sector address */
if ((uptr->flags & UNIT_WPROT) /* is the unit write protected, */ if ((uptr->flags & UNIT_WPROT) || /* is the unit write protected, */
|| !verify && !(uptr->flags & UNIT_FMT)) /* or is formatting required but not enabled? */ (!verify && !(uptr->flags & UNIT_FMT))) /* or is formatting required but not enabled? */
dl_end_command (cvptr, status_2_error); /* terminate the write with an error */ dl_end_command (cvptr, status_2_error); /* terminate the write with an error */
else if (position_sector (cvptr, uptr, verify)) { /* writing is permitted; position the sector */ else if (position_sector (cvptr, uptr, verify)) { /* writing is permitted; position the sector */

2
I1401/i1401_cd.c
View file

@ -184,7 +184,7 @@ t_stat r;
if (sim_is_active (&cdr_unit)) { /* busy? */ if (sim_is_active (&cdr_unit)) { /* busy? */
sim_cancel (&cdr_unit); /* cancel */ sim_cancel (&cdr_unit); /* cancel */
if (r = cdr_svc (&cdr_unit)) /* process */ if ((r = cdr_svc (&cdr_unit))) /* process */
return r; return r;
} }
if ((cdr_unit.flags & UNIT_ATT) == 0) /* attached? */ if ((cdr_unit.flags & UNIT_ATT) == 0) /* attached? */

24
I1401/i1401_cpu.c
View file

@ -547,7 +547,7 @@ while (reason == 0) { /* loop until halted */
saved_IS = IS; /* commit prev instr */ saved_IS = IS; /* commit prev instr */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) if ((reason = sim_process_event ()))
break; break;
} }
@ -1039,7 +1039,7 @@ CHECK_LENGTH:
*/ */
case OP_R: /* read */ case OP_R: /* read */
if (reason = iomod (ilnt, D, r_mod)) /* valid modifier? */ if ((reason = iomod (ilnt, D, r_mod))) /* valid modifier? */
break; break;
reason = read_card (ilnt, D); /* read card */ reason = read_card (ilnt, D); /* read card */
BS = CDR_BUF + CDR_WIDTH; BS = CDR_BUF + CDR_WIDTH;
@ -1049,7 +1049,7 @@ CHECK_LENGTH:
break; break;
case OP_W: /* write */ case OP_W: /* write */
if (reason = iomod (ilnt, D, w_mod)) /* valid modifier? */ if ((reason = iomod (ilnt, D, w_mod))) /* valid modifier? */
break; break;
reason = write_line (ilnt, D); /* print line */ reason = write_line (ilnt, D); /* print line */
BS = LPT_BUF + LPT_WIDTH; BS = LPT_BUF + LPT_WIDTH;
@ -1059,7 +1059,7 @@ CHECK_LENGTH:
break; break;
case OP_P: /* punch */ case OP_P: /* punch */
if (reason = iomod (ilnt, D, p_mod)) /* valid modifier? */ if ((reason = iomod (ilnt, D, p_mod))) /* valid modifier? */
break; break;
reason = punch_card (ilnt, D); /* punch card */ reason = punch_card (ilnt, D); /* punch card */
BS = CDP_BUF + CDP_WIDTH; BS = CDP_BUF + CDP_WIDTH;
@ -1069,7 +1069,7 @@ CHECK_LENGTH:
break; break;
case OP_WR: /* write and read */ case OP_WR: /* write and read */
if (reason = iomod (ilnt, D, w_mod)) /* valid modifier? */ if ((reason = iomod (ilnt, D, w_mod))) /* valid modifier? */
break; break;
reason = write_line (ilnt, D); /* print line */ reason = write_line (ilnt, D); /* print line */
r1 = read_card (ilnt, D); /* read card */ r1 = read_card (ilnt, D); /* read card */
@ -1082,7 +1082,7 @@ CHECK_LENGTH:
break; break;
case OP_WP: /* write and punch */ case OP_WP: /* write and punch */
if (reason = iomod (ilnt, D, w_mod)) /* valid modifier? */ if ((reason = iomod (ilnt, D, w_mod))) /* valid modifier? */
break; break;
reason = write_line (ilnt, D); /* print line */ reason = write_line (ilnt, D); /* print line */
r1 = punch_card (ilnt, D); /* punch card */ r1 = punch_card (ilnt, D); /* punch card */
@ -1095,7 +1095,7 @@ CHECK_LENGTH:
break; break;
case OP_RP: /* read and punch */ case OP_RP: /* read and punch */
if (reason = iomod (ilnt, D, NULL)) /* valid modifier? */ if ((reason = iomod (ilnt, D, NULL))) /* valid modifier? */
break; break;
reason = read_card (ilnt, D); /* read card */ reason = read_card (ilnt, D); /* read card */
r1 = punch_card (ilnt, D); /* punch card */ r1 = punch_card (ilnt, D); /* punch card */
@ -1108,7 +1108,7 @@ CHECK_LENGTH:
break; break;
case OP_WRP: /* write, read, punch */ case OP_WRP: /* write, read, punch */
if (reason = iomod (ilnt, D, w_mod)) /* valid modifier? */ if ((reason = iomod (ilnt, D, w_mod))) /* valid modifier? */
break; break;
reason = write_line (ilnt, D); /* print line */ reason = write_line (ilnt, D); /* print line */
r1 = read_card (ilnt, D); /* read card */ r1 = read_card (ilnt, D); /* read card */
@ -1122,9 +1122,9 @@ CHECK_LENGTH:
break; break;
case OP_SS: /* select stacker */ case OP_SS: /* select stacker */
if (reason = iomod (ilnt, D, ss_mod)) /* valid modifier? */ if ((reason = iomod (ilnt, D, ss_mod))) /* valid modifier? */
break; break;
if (reason = select_stack (D)) /* sel stack, error? */ if ((reason = select_stack (D))) /* sel stack, error? */
break; break;
if ((ilnt == 4) || (ilnt == 5)) { /* check for branch */ if ((ilnt == 4) || (ilnt == 5)) { /* check for branch */
BRANCH; BRANCH;
@ -1132,7 +1132,7 @@ CHECK_LENGTH:
break; break;
case OP_CC: /* carriage control */ case OP_CC: /* carriage control */
if (reason = carriage_control (D)) /* car ctrl, error? */ if ((reason = carriage_control (D))) /* car ctrl, error? */
break; break;
if ((ilnt == 4) || (ilnt == 5)) { /* check for branch */ if ((ilnt == 4) || (ilnt == 5)) { /* check for branch */
BRANCH; BRANCH;
@ -1154,7 +1154,7 @@ CHECK_LENGTH:
reason = STOP_INVL; reason = STOP_INVL;
else if (ioind != BCD_PERCNT) /* valid dev addr? */ else if (ioind != BCD_PERCNT) /* valid dev addr? */
reason = STOP_INVA; reason = STOP_INVA;
else if (reason = iomod (ilnt, D, mtf_mod)) /* valid modifier? */ else if ((reason = iomod (ilnt, D, mtf_mod))) /* valid modifier? */
break; break;
if (dev == IO_MT) /* BCD? */ if (dev == IO_MT) /* BCD? */
reason = mt_func (unit, 0, D); reason = mt_func (unit, 0, D);

16
I1401/i1401_dp.c
View file

@ -269,7 +269,7 @@ switch (fnc) { /* case on function */
for (;;) { /* loop */ for (;;) { /* loop */
qzr = (--cnt == 0); /* set zero latch */ qzr = (--cnt == 0); /* set zero latch */
dp_cvt_bin (dcf + DCF_CNT, DCF_CNT_LEN, cnt, MD_WM); /* redo count */ dp_cvt_bin (dcf + DCF_CNT, DCF_CNT_LEN, cnt, MD_WM); /* redo count */
if (r = dp_rdsec (uptr, psec, flg, qwc)) /* read sector */ if ((r = dp_rdsec (uptr, psec, flg, qwc))) /* read sector */
break; break;
cnt = dp_get_cnt (dcf); /* get new count */ cnt = dp_get_cnt (dcf); /* get new count */
if (cnt < 0) /* bad count? */ if (cnt < 0) /* bad count? */
@ -278,7 +278,7 @@ switch (fnc) { /* case on function */
break; break;
sec++; psec++; /* next sector */ sec++; psec++; /* next sector */
dp_cvt_bin (dcf + DCF_SEC, DCF_SEC_LEN, sec, flg); /* rewr sec */ dp_cvt_bin (dcf + DCF_SEC, DCF_SEC_LEN, sec, flg); /* rewr sec */
if (r = dp_nexsec (uptr, psec, dcf)) /* find next */ if ((r = dp_nexsec (uptr, psec, dcf))) /* find next */
break; break;
} }
break; /* done, clean up */ break; /* done, clean up */
@ -289,9 +289,9 @@ switch (fnc) { /* case on function */
for (;;) { /* loop */ for (;;) { /* loop */
qzr = (--cnt == 0); /* set zero latch */ qzr = (--cnt == 0); /* set zero latch */
dp_cvt_bin (dcf + DCF_CNT, DCF_CNT_LEN, cnt, MD_WM); /* redo count */ dp_cvt_bin (dcf + DCF_CNT, DCF_CNT_LEN, cnt, MD_WM); /* redo count */
if (r = dp_rdadr (uptr, psec, flg, qwc)) /* read addr */ if ((r = dp_rdadr (uptr, psec, flg, qwc))) /* read addr */
break; /* error? */ break; /* error? */
if (r = dp_rdsec (uptr, psec, flg, qwc)) /* read data */ if ((r = dp_rdsec (uptr, psec, flg, qwc))) /* read data */
break; /* error? */ break; /* error? */
cnt = dp_get_cnt (dcf); /* get new count */ cnt = dp_get_cnt (dcf); /* get new count */
if (cnt < 0) /* bad count? */ if (cnt < 0) /* bad count? */
@ -312,13 +312,13 @@ switch (fnc) { /* case on function */
for (;;) { /* loop */ for (;;) { /* loop */
qzr = (--cnt == 0); /* set zero latch */ qzr = (--cnt == 0); /* set zero latch */
dp_cvt_bin (dcf + DCF_CNT, DCF_CNT_LEN, cnt, MD_WM); /* rewr cnt */ dp_cvt_bin (dcf + DCF_CNT, DCF_CNT_LEN, cnt, MD_WM); /* rewr cnt */
if (r = dp_wrsec (uptr, psec, flg)) /* write data */ if ((r = dp_wrsec (uptr, psec, flg))) /* write data */
break; break;
if (qzr) /* zero latch? done */ if (qzr) /* zero latch? done */
break; break;
sec++; psec++; /* next sector */ sec++; psec++; /* next sector */
dp_cvt_bin (dcf + DCF_SEC, DCF_SEC_LEN, sec, flg); /* rewr sec */ dp_cvt_bin (dcf + DCF_SEC, DCF_SEC_LEN, sec, flg); /* rewr sec */
if (r = dp_nexsec (uptr, psec, dcf)) /* find next */ if ((r = dp_nexsec (uptr, psec, dcf))) /* find next */
break; break;
} }
break; /* done, clean up */ break; /* done, clean up */
@ -331,9 +331,9 @@ switch (fnc) { /* case on function */
for (;;) { /* loop */ for (;;) { /* loop */
qzr = (--cnt == 0); /* set zero latch */ qzr = (--cnt == 0); /* set zero latch */
dp_cvt_bin (dcf + DCF_CNT, DCF_CNT_LEN, cnt, MD_WM); /* redo count */ dp_cvt_bin (dcf + DCF_CNT, DCF_CNT_LEN, cnt, MD_WM); /* redo count */
if (r = dp_wradr (uptr, psec, flg)) /* write addr */ if ((r = dp_wradr (uptr, psec, flg))) /* write addr */
break; break;
if (r = dp_wrsec (uptr, psec, flg)) /* write data */ if ((r = dp_wrsec (uptr, psec, flg))) /* write data */
break; break;
if (qzr) /* zero latch? done */ if (qzr) /* zero latch? done */
break; break;

2
I1401/i1401_mt.c
View file

@ -451,7 +451,7 @@ int32 i;
UNIT *uptr; UNIT *uptr;
for (i = 0; i < MT_NUMDR; i++) { /* per drive resets */ for (i = 0; i < MT_NUMDR; i++) { /* per drive resets */
if (uptr = mt_sel_unit (i)) { if ((uptr = mt_sel_unit (i))) {
MT_CLR_PNU (uptr); /* clear pos flag */ MT_CLR_PNU (uptr); /* clear pos flag */
} }
} }

2
I1620/i1620_cpu.c
View file

@ -476,7 +476,7 @@ while (reason == 0) { /* loop until halted */
saved_PC = PC; /* commit prev instr */ saved_PC = PC; /* commit prev instr */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) if ((reason = sim_process_event ()))
break; break;
} }

16
I1620/i1620_dp.c
View file

@ -206,7 +206,7 @@ switch (f1 & ~(FNC_WCH | FNC_NRL)) { /* case on function */
if (psec < 0) /* error? */ if (psec < 0) /* error? */
CRETIOE (dp_stop, STOP_DACERR); CRETIOE (dp_stop, STOP_DACERR);
do { /* loop on count */ do { /* loop on count */
if (r = dp_rdsec (uptr, psec, qnr, qwc)) /* read sector */ if ((r = dp_rdsec (uptr, psec, qnr, qwc))) /* read sector */
break; break;
sec++; psec++; /* next sector */ sec++; psec++; /* next sector */
} while ((--cnt > 0) && } while ((--cnt > 0) &&
@ -216,9 +216,9 @@ switch (f1 & ~(FNC_WCH | FNC_NRL)) { /* case on function */
case FNC_TRK: /* read track */ case FNC_TRK: /* read track */
psec = dp_trkop (drv, sec); /* start of track */ psec = dp_trkop (drv, sec); /* start of track */
for (cnt = 0; cnt < DP_NUMSC; cnt++) { /* full track */ for (cnt = 0; cnt < DP_NUMSC; cnt++) { /* full track */
if (r = dp_rdadr (uptr, psec, qnr, qwc)) /* read addr */ if ((r = dp_rdadr (uptr, psec, qnr, qwc))) /* read addr */
break; /* error? */ break; /* error? */
if (r = dp_rdsec (uptr, psec, qnr, qwc)) /* read data */ if ((r = dp_rdsec (uptr, psec, qnr, qwc))) /* read data */
break; /* error? */ break; /* error? */
psec = dp_trkop (drv, sec) + ((psec + 1) % DP_NUMSC); psec = dp_trkop (drv, sec) + ((psec + 1) % DP_NUMSC);
} }
@ -231,9 +231,9 @@ switch (f1 & ~(FNC_WCH | FNC_NRL)) { /* case on function */
if (psec < 0) /* error? */ if (psec < 0) /* error? */
CRETIOE (dp_stop, STOP_DACERR); CRETIOE (dp_stop, STOP_DACERR);
do { /* loop on count */ do { /* loop on count */
if (r = dp_tstgm (M[dp_ba], qnr)) /* start with gm? */ if ((r = dp_tstgm (M[dp_ba], qnr))) /* start with gm? */
break; break;
if (r = dp_wrsec (uptr, psec, qnr)) /* write data */ if ((r = dp_wrsec (uptr, psec, qnr))) /* write data */
break; break;
sec++; psec++; /* next sector */ sec++; psec++; /* next sector */
} while ((--cnt > 0) && } while ((--cnt > 0) &&
@ -245,11 +245,11 @@ switch (f1 & ~(FNC_WCH | FNC_NRL)) { /* case on function */
return STOP_WRADIS; return STOP_WRADIS;
psec = dp_trkop (drv, sec); /* start of track */ psec = dp_trkop (drv, sec); /* start of track */
for (cnt = 0; cnt < DP_NUMSC; cnt++) { /* full track */ for (cnt = 0; cnt < DP_NUMSC; cnt++) { /* full track */
if (r = dp_tstgm (M[dp_ba], qnr)) /* start with gm? */ if ((r = dp_tstgm (M[dp_ba], qnr))) /* start with gm? */
break; break;
if (r = dp_wradr (uptr, psec, qnr)) /* write addr */ if ((r = dp_wradr (uptr, psec, qnr))) /* write addr */
break; break;
if (r = dp_wrsec (uptr, psec, qnr)) /* write data */ if ((r = dp_wrsec (uptr, psec, qnr))) /* write data */
break; break;
psec = dp_trkop (drv, sec) + ((psec + 1) % DP_NUMSC); psec = dp_trkop (drv, sec) + ((psec + 1) % DP_NUMSC);
} }

2
I1620/i1620_sys.c
View file

@ -552,7 +552,7 @@ if (I_GETQP (opfl) != I_M_QNP) { /* Q field allowed? */
cptr = get_glyph (cptr, fptr = gbuf, ' '); /* get flag field */ cptr = get_glyph (cptr, fptr = gbuf, ' '); /* get flag field */
last = -1; /* none yet */ last = -1; /* none yet */
while (t = *fptr++) { /* loop through */ while ((t = *fptr++)) { /* loop through */
if ((t < '0') || (t > '9')) /* must be digit */ if ((t < '0') || (t > '9')) /* must be digit */
return SCPE_ARG; return SCPE_ARG;
t = t - '0'; /* convert */ t = t - '0'; /* convert */

2
I1620/i1620_tty.c
View file

@ -260,7 +260,7 @@ do {
*c = 0x7F; *c = 0x7F;
else if ((raw == '~') || (raw == '`')) /* flag? mark */ else if ((raw == '~') || (raw == '`')) /* flag? mark */
flg = FLAG; flg = FLAG;
else if (cp = strchr (tti_to_num, raw)) /* legal? */ else if ((cp = strchr (tti_to_num, raw))) /* legal? */
*c = ((int8) (cp - tti_to_num)) | flg; /* assemble char */ *c = ((int8) (cp - tti_to_num)) | flg; /* assemble char */
else raw = 007; /* beep! */ else raw = 007; /* beep! */
tto_write (raw); /* echo */ tto_write (raw); /* echo */

2
I7094/i7094_com.c
View file

@ -1175,7 +1175,7 @@ char name[20];
ln = uptr - coml_dev.units; ln = uptr - coml_dev.units;
sprintf (name, val? "Output queue %d": "Input queue %d", ln); sprintf (name, val? "Output queue %d": "Input queue %d", ln);
lh = val? &com_outq[ln]: &com_inpq[ln]; lh = val? &com_outq[ln]: &com_inpq[ln];
if (entc = com_show_qsumm (st, lh, name)) { if ((entc = com_show_qsumm (st, lh, name))) {
for (i = 0, next = lh->head; next != 0; for (i = 0, next = lh->head; next != 0;
i++, next = com_pkt[next].next) { i++, next = com_pkt[next].next) {
if ((i % 8) == 0) if ((i % 8) == 0)

10
I7094/i7094_cpu.c
View file

@ -664,14 +664,14 @@ while (reason == SCPE_OK) { /* loop until error */
} }
if (sim_interval <= 0) { /* intv cnt expired? */ if (sim_interval <= 0) { /* intv cnt expired? */
if (reason = sim_process_event ()) /* process events */ if ((reason = sim_process_event ())) /* process events */
break; break;
chtr_pend = chtr_eval (NULL); /* eval chan traps */ chtr_pend = chtr_eval (NULL); /* eval chan traps */
} }
for (i = 0; ch_req && (i < NUM_CHAN); i++) { /* loop thru channels */ for (i = 0; ch_req && (i < NUM_CHAN); i++) { /* loop thru channels */
if (ch_req & REQ_CH (i)) { /* channel request? */ if (ch_req & REQ_CH (i)) { /* channel request? */
if (reason = ch_proc (i)) if ((reason = ch_proc (i)))
break; break;
} }
chtr_pend = chtr_eval (NULL); chtr_pend = chtr_eval (NULL);
@ -1973,13 +1973,13 @@ while (reason == SCPE_OK) { /* loop until error */
t_stat r; t_stat r;
for (i = 0; (i < HALT_IO_LIMIT) && !ch_qidle (); i++) { for (i = 0; (i < HALT_IO_LIMIT) && !ch_qidle (); i++) {
sim_interval = 0; sim_interval = 0;
if (r = sim_process_event ()) /* process events */ if ((r = sim_process_event ())) /* process events */
return r; return r;
chtr_pend = chtr_eval (NULL); /* eval chan traps */ chtr_pend = chtr_eval (NULL); /* eval chan traps */
while (ch_req) { /* until no ch req */ while (ch_req) { /* until no ch req */
for (j = 0; j < NUM_CHAN; j++) { /* loop thru channels */ for (j = 0; j < NUM_CHAN; j++) { /* loop thru channels */
if (ch_req & REQ_CH (j)) { /* channel request? */ if (ch_req & REQ_CH (j)) { /* channel request? */
if (r = ch_proc (j)) if ((r = ch_proc (j)))
return r; return r;
} }
chtr_pend = chtr_eval (NULL); chtr_pend = chtr_eval (NULL);
@ -2438,7 +2438,7 @@ if (pc & HIST_PC) { /* instruction? */
} }
fputc ('\n', st); /* end line */ fputc ('\n', st); /* end line */
} /* end if instruction */ } /* end if instruction */
else if (ch = HIST_CH (pc)) { /* channel? */ else if ((ch = HIST_CH (pc))) { /* channel? */
fprintf (st, "CH%c ", 'A' + ch - 1); fprintf (st, "CH%c ", 'A' + ch - 1);
fprintf (st, "%05o ", pc & AMASK); fprintf (st, "%05o ", pc & AMASK);
fputs (" ", st); fputs (" ", st);

12
I7094/i7094_dsk.c
View file

@ -693,14 +693,14 @@ trk = uaptr->TRK; /* get access track */
switch (dsk_sta) { /* case on state */ switch (dsk_sta) { /* case on state */
case CHSL_RDS: /* read start */ case CHSL_RDS: /* read start */
if (r = dsk_init_trk (udptr, trk)) { /* read track, err? */ if ((r = dsk_init_trk (udptr, trk))) { /* read track, err? */
return ((r == ERR_NRCF)? SCPE_OK: r); /* rec not fnd ok */ return ((r == ERR_NRCF)? SCPE_OK: r); /* rec not fnd ok */
} }
dsk_sta = CHSL_RDS|CHSL_2ND; /* next state */ dsk_sta = CHSL_RDS|CHSL_2ND; /* next state */
break; break;
case CHSL_RDS|CHSL_2ND: /* read data transmit */ case CHSL_RDS|CHSL_2ND: /* read data transmit */
if (r = dsk_xfer_done (uaptr, dtyp)) { /* transfer done? */ if ((r = dsk_xfer_done (uaptr, dtyp))) { /* transfer done? */
if (r != ERR_ENDRC) /* error? */ if (r != ERR_ENDRC) /* error? */
return r; return r;
dsk_sta = CHSL_RDS|CHSL_3RD; /* next state */ dsk_sta = CHSL_RDS|CHSL_3RD; /* next state */
@ -721,7 +721,7 @@ switch (dsk_sta) { /* case on state */
break; break;
case CHSL_WRS: /* write start */ case CHSL_WRS: /* write start */
if (r = dsk_init_trk (udptr, trk)) { /* read track, err? */ if ((r = dsk_init_trk (udptr, trk))) { /* read track, err? */
return ((r == ERR_NRCF)? SCPE_OK: r); /* rec not fnd ok */ return ((r == ERR_NRCF)? SCPE_OK: r); /* rec not fnd ok */
} }
ch_req |= REQ_CH (dsk_ch); /* first request */ ch_req |= REQ_CH (dsk_ch); /* first request */
@ -742,7 +742,7 @@ switch (dsk_sta) { /* case on state */
else dsk_buf[dsk_rptr++] = dsk_chob; /* write, store word */ else dsk_buf[dsk_rptr++] = dsk_chob; /* write, store word */
if (dsk_rptr == T1STREC) /* if THA, skip after HA */ if (dsk_rptr == T1STREC) /* if THA, skip after HA */
dsk_rptr++; dsk_rptr++;
if (r = dsk_xfer_done (uaptr, dtyp)) { /* transfer done? */ if ((r = dsk_xfer_done (uaptr, dtyp))) { /* transfer done? */
if (r != ERR_ENDRC) /* error? */ if (r != ERR_ENDRC) /* error? */
return r; return r;
dsk_sta = CHSL_WRS|CHSL_3RD; /* next state */ dsk_sta = CHSL_WRS|CHSL_3RD; /* next state */
@ -755,7 +755,7 @@ switch (dsk_sta) { /* case on state */
case CHSL_WRS|CHSL_3RD: /* write done */ case CHSL_WRS|CHSL_3RD: /* write done */
if (!dsk_wchk) { /* if write */ if (!dsk_wchk) { /* if write */
if (r = dsk_wr_trk (udptr, trk)) /* write track; err? */ if ((r = dsk_wr_trk (udptr, trk))) /* write track; err? */
return r; return r;
} }
if (dsk_qdone (dsk_ch)) /* done? exit */ if (dsk_qdone (dsk_ch)) /* done? exit */
@ -846,7 +846,7 @@ switch (dsk_sta) { /* case on state */
if (!dsk_wchk) { /* actual write? */ if (!dsk_wchk) { /* actual write? */
trk = trk - (trk % dsk_tab[dtyp].trkpc); /* cyl start */ trk = trk - (trk % dsk_tab[dtyp].trkpc); /* cyl start */
for (i = 0; i < dsk_tab[dtyp].trkpc; i++) { /* do all tracks */ for (i = 0; i < dsk_tab[dtyp].trkpc; i++) { /* do all tracks */
if (r = dsk_wr_trk (udptr, trk + i)) /* wr track; err? */ if ((r = dsk_wr_trk (udptr, trk + i))) /* wr track; err? */
return r; return r;
} }
} }

22
I7094/i7094_io.c
View file

@ -795,7 +795,7 @@ switch (ch_sta[ch]) { /* case on chan state */
if (ch_dev[ch].flags & DEV_7289) { /* drum channel? */ if (ch_dev[ch].flags & DEV_7289) { /* drum channel? */
ir = ReadP (clc); /* read addr */ ir = ReadP (clc); /* read addr */
ch_clc[ch] = CHAINC (clc); /* incr chan pc */ ch_clc[ch] = CHAINC (clc); /* incr chan pc */
if (r = ch9_wr (ch, ir, 0)) /* write to dev */ if ((r = ch9_wr (ch, ir, 0))) /* write to dev */
return r; return r;
} }
else ch_clc[ch] = clc; /* set clc */ else ch_clc[ch] = clc; /* set clc */
@ -1003,7 +1003,7 @@ if (ch_dev[ch].flags & DEV_7909) { /* 7909 */
return SCPE_OK; return SCPE_OK;
case CH9_SNS: /* sense */ case CH9_SNS: /* sense */
if (r = ch9_sel (ch, CHSL_SNS)) /* send sense to dev */ if ((r = ch9_sel (ch, CHSL_SNS))) /* send sense to dev */
return r; return r;
ch_flags[ch] |= CHF_PRD; /* prepare to read */ ch_flags[ch] |= CHF_PRD; /* prepare to read */
break; /* next command */ break; /* next command */
@ -1019,13 +1019,13 @@ if (ch_dev[ch].flags & DEV_7909) { /* 7909 */
} }
ch_flags[ch] &= ~CHF_EOR; /* clear end */ ch_flags[ch] &= ~CHF_EOR; /* clear end */
if (ch_op[ch] == CH9_CTLR) { /* CTLR? */ if (ch_op[ch] == CH9_CTLR) { /* CTLR? */
if (r = ch9_sel (ch, CHSL_RDS)) /* send read sel */ if ((r = ch9_sel (ch, CHSL_RDS))) /* send read sel */
return r; return r;
ch_flags[ch] |= CHF_PRD; /* prep to read */ ch_flags[ch] |= CHF_PRD; /* prep to read */
ch_idf[ch] = 0; ch_idf[ch] = 0;
} }
else if (ch_op[ch] == CH9_CTLW) { /* CTLW? */ else if (ch_op[ch] == CH9_CTLW) { /* CTLW? */
if (r = ch9_sel (ch, CHSL_WRS)) /* end write sel */ if ((r = ch9_sel (ch, CHSL_WRS))) /* end write sel */
return r; return r;
ch_flags[ch] |= CHF_PWR; /* prep to write */ ch_flags[ch] |= CHF_PWR; /* prep to write */
} }
@ -1035,7 +1035,7 @@ if (ch_dev[ch].flags & DEV_7909) { /* 7909 */
if ((ch_wc[ch] == 0) || (ch_flags[ch] & CHF_EOR)) { /* wc == 0 or EOR? */ if ((ch_wc[ch] == 0) || (ch_flags[ch] & CHF_EOR)) { /* wc == 0 or EOR? */
if (ch_flags[ch] & (CHF_PRD|CHF_PWR|CHF_RDS|CHF_WRS)) { if (ch_flags[ch] & (CHF_PRD|CHF_PWR|CHF_RDS|CHF_WRS)) {
ch_flags[ch] &= ~(CHF_PRD|CHF_PWR|CHF_RDS|CHF_WRS); ch_flags[ch] &= ~(CHF_PRD|CHF_PWR|CHF_RDS|CHF_WRS);
if (r = ch9_wr (ch, 0, CH9DF_STOP)) /* send stop */ if ((r = ch9_wr (ch, 0, CH9DF_STOP))) /* send stop */
return r; return r;
} }
if (ch_flags[ch] & CHF_EOR) { /* EOR? */ if (ch_flags[ch] & CHF_EOR) { /* EOR? */
@ -1055,7 +1055,7 @@ if (ch_dev[ch].flags & DEV_7909) { /* 7909 */
ch_flags[ch] &= ~CHF_EOR; /* ignore */ ch_flags[ch] &= ~CHF_EOR; /* ignore */
else if (ch_flags[ch] & CHF_RDS) /* read? */ else if (ch_flags[ch] & CHF_RDS) /* read? */
ch9_rd_putw (ch); ch9_rd_putw (ch);
else if (r = ch9_wr_getw (ch)) /* no, write */ else if ((r = ch9_wr_getw (ch))) /* no, write */
return r; return r;
if (ch_wc[ch] == 0) /* done? get next */ if (ch_wc[ch] == 0) /* done? get next */
break; break;
@ -1164,7 +1164,7 @@ else { /* 7607 write */
case CH6_IOCD: /* IOCD */ case CH6_IOCD: /* IOCD */
if (ch_wc[ch]) { /* wc > 0? */ if (ch_wc[ch]) { /* wc > 0? */
if (r = ch6_wr_getw (ch, TRUE)) /* send wd to dev; err? */ if ((r = ch6_wr_getw (ch, TRUE))) /* send wd to dev; err? */
return r; return r;
if (ch_wc[ch]) /* more to do? */ if (ch_wc[ch]) /* more to do? */
return SCPE_OK; return SCPE_OK;
@ -1174,7 +1174,7 @@ else { /* 7607 write */
case CH6_IOCP: /* IOCP */ case CH6_IOCP: /* IOCP */
case CH6_IOSP: /* IOSP */ case CH6_IOSP: /* IOSP */
if (ch_wc[ch]) { /* wc > 0? */ if (ch_wc[ch]) { /* wc > 0? */
if (r = ch6_wr_getw (ch, FALSE)) /* send wd to dev; err? */ if ((r = ch6_wr_getw (ch, FALSE))) /* send wd to dev; err? */
return r; return r;
if (ch_wc[ch]) /* more to do? */ if (ch_wc[ch]) /* more to do? */
return SCPE_OK; return SCPE_OK;
@ -1184,7 +1184,7 @@ else { /* 7607 write */
case CH6_IOCT: /* IOCT */ case CH6_IOCT: /* IOCT */
case CH6_IOST: /* IOST */ case CH6_IOST: /* IOST */
if (ch_wc[ch]) { /* wc > 0? */ if (ch_wc[ch]) { /* wc > 0? */
if (r = ch6_wr_getw (ch, FALSE)) /* send wd to dev; err? */ if ((r = ch6_wr_getw (ch, FALSE))) /* send wd to dev; err? */
return r; return r;
if (ch_wc[ch]) /* more to do? */ if (ch_wc[ch]) /* more to do? */
return SCPE_OK; return SCPE_OK;
@ -1193,7 +1193,7 @@ else { /* 7607 write */
case CH6_IORP: /* IORP */ case CH6_IORP: /* IORP */
if (!(ch_flags[ch] & CHF_EOR) && ch_wc[ch]) { /* not EOR? (cdp, lpt) */ if (!(ch_flags[ch] & CHF_EOR) && ch_wc[ch]) { /* not EOR? (cdp, lpt) */
if (r = ch6_wr_getw (ch, TRUE)) /* send wd to dev; err? */ if ((r = ch6_wr_getw (ch, TRUE))) /* send wd to dev; err? */
return r; return r;
if (ch_wc[ch]) /* more to do? */ if (ch_wc[ch]) /* more to do? */
return SCPE_OK; return SCPE_OK;
@ -1203,7 +1203,7 @@ else { /* 7607 write */
case CH6_IORT: /* IORT */ case CH6_IORT: /* IORT */
if (!(ch_flags[ch] & CHF_EOR) && ch_wc[ch]) { /* not EOR? (cdp, lpt) */ if (!(ch_flags[ch] & CHF_EOR) && ch_wc[ch]) { /* not EOR? (cdp, lpt) */
if (r = ch6_wr_getw (ch, TRUE)) /* send wd to dev; err? */ if ((r = ch6_wr_getw (ch, TRUE))) /* send wd to dev; err? */
return r; return r;
if (ch_wc[ch]) /* more to do? */ if (ch_wc[ch]) /* more to do? */
return SCPE_OK; return SCPE_OK;

4
I7094/i7094_mt.c
View file

@ -564,7 +564,7 @@ switch (uptr->UST) { /* case on state */
bc = chrono_rd (xb, MT_MAXFR); /* read clock */ bc = chrono_rd (xb, MT_MAXFR); /* read clock */
else { /* real tape */ else { /* real tape */
r = sim_tape_rdrecf (uptr, xb, &bc, MT_MAXFR); /* read record */ r = sim_tape_rdrecf (uptr, xb, &bc, MT_MAXFR); /* read record */
if (r = mt_map_err (uptr, r)) /* map status */ if ((r = mt_map_err (uptr, r))) /* map status */
return r; return r;
if (mt_unit[ch] == 0) /* disconnected? */ if (mt_unit[ch] == 0) /* disconnected? */
return SCPE_OK; return SCPE_OK;
@ -736,7 +736,7 @@ if (mt_bptr[ch]) { /* any data? */
if (xb == NULL) if (xb == NULL)
return SCPE_IERR; return SCPE_IERR;
r = sim_tape_wrrecf (uptr, xb, mt_bptr[ch]); /* write record */ r = sim_tape_wrrecf (uptr, xb, mt_bptr[ch]); /* write record */
if (r = mt_map_err (uptr, r)) /* map error */ if ((r = mt_map_err (uptr, r))) /* map error */
return r; return r;
} }
uptr->UST = CHSL_WRS|CHSL_3RD; /* next state */ uptr->UST = CHSL_WRS|CHSL_3RD; /* next state */

2
Interdata/id16_cpu.c
View file

@ -604,7 +604,7 @@ while (reason == 0) { /* loop until halted */
int32 sr, st; int32 sr, st;
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) if ((reason = sim_process_event ()))
break; break;
int_eval (); int_eval ();
} }

2
Interdata/id32_cpu.c
View file

@ -664,7 +664,7 @@ while (reason == 0) { /* loop until halted */
int32 sr, st; int32 sr, st;
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) if ((reason = sim_process_event ()))
break; break;
int_eval (); int_eval ();
} }

4
Interdata/id_dp.c
View file

@ -419,7 +419,7 @@ switch (dp_cmd & 0x7) { /* case on func */
if (sch_actv (dp_dib.sch, dp_dib.dno)) { /* sch transfer? */ if (sch_actv (dp_dib.sch, dp_dib.dno)) { /* sch transfer? */
if (dp_dter (uptr, dp_1st)) /* check xfr err */ if (dp_dter (uptr, dp_1st)) /* check xfr err */
return SCPE_OK; return SCPE_OK;
if (r = dp_rds (uptr)) /* read sec, err? */ if ((r = dp_rds (uptr))) /* read sec, err? */
return r; return r;
dp_1st = 0; dp_1st = 0;
t = sch_wrmem (dp_dib.sch, dpxb, DP_NUMBY); /* write to memory */ t = sch_wrmem (dp_dib.sch, dpxb, DP_NUMBY); /* write to memory */
@ -438,7 +438,7 @@ switch (dp_cmd & 0x7) { /* case on func */
return SCPE_OK; return SCPE_OK;
dp_bptr = sch_rdmem (dp_dib.sch, dpxb, DP_NUMBY); /* read from mem */ dp_bptr = sch_rdmem (dp_dib.sch, dpxb, DP_NUMBY); /* read from mem */
dp_db = dpxb[dp_bptr - 1]; /* last byte */ dp_db = dpxb[dp_bptr - 1]; /* last byte */
if (r = dp_wds (uptr)) /* write sec, err? */ if ((r = dp_wds (uptr))) /* write sec, err? */
return r; return r;
dp_1st = 0; dp_1st = 0;
if (sch_actv (dp_dib.sch, dp_dib.dno)) { /* more to do? */ if (sch_actv (dp_dib.sch, dp_dib.dno)) { /* more to do? */

4
Interdata/id_idc.c
View file

@ -576,7 +576,7 @@ switch (uptr->FNC & CMC_MASK) { /* case on func */
if (sch_actv (idc_dib.sch, idc_dib.dno)) { /* sch transfer? */ if (sch_actv (idc_dib.sch, idc_dib.dno)) { /* sch transfer? */
if (idc_dter (uptr, idc_1st)) /* dte? done */ if (idc_dter (uptr, idc_1st)) /* dte? done */
return SCPE_OK; return SCPE_OK;
if (r = idc_rds (uptr)) /* read sec, err? */ if ((r = idc_rds (uptr))) /* read sec, err? */
return r; return r;
idc_1st = 0; idc_1st = 0;
t = sch_wrmem (idc_dib.sch, idcxb, IDC_NUMBY); /* write mem */ t = sch_wrmem (idc_dib.sch, idcxb, IDC_NUMBY); /* write mem */
@ -595,7 +595,7 @@ switch (uptr->FNC & CMC_MASK) { /* case on func */
return SCPE_OK; return SCPE_OK;
idc_bptr = sch_rdmem (idc_dib.sch, idcxb, IDC_NUMBY); /* read mem */ idc_bptr = sch_rdmem (idc_dib.sch, idcxb, IDC_NUMBY); /* read mem */
idc_db = idcxb[idc_bptr - 1]; /* last byte */ idc_db = idcxb[idc_bptr - 1]; /* last byte */
if (r = idc_wds (uptr)) /* write sec, err? */ if ((r = idc_wds (uptr))) /* write sec, err? */
return r; return r;
idc_1st = 0; idc_1st = 0;
if (sch_actv (idc_dib.sch, idc_dib.dno)) { /* more to do? */ if (sch_actv (idc_dib.sch, idc_dib.dno)) { /* more to do? */

6
Interdata/id_io.c
View file

@ -358,7 +358,7 @@ if ((r != SCPE_OK) || (newmax == sch_max)) /* err or no chg? */
if (newmax == 0) /* must be > 0 */ if (newmax == 0) /* must be > 0 */
return SCPE_ARG; return SCPE_ARG;
if (newmax < sch_max) { /* reducing? */ if (newmax < sch_max) { /* reducing? */
for (i = 0; dptr = sim_devices[i]; i++) { /* loop thru dev */ for (i = 0; (dptr = sim_devices[i]); i++) { /* loop thru dev */
dibp = (DIB *) dptr->ctxt; /* get DIB */ dibp = (DIB *) dptr->ctxt; /* get DIB */
if (dibp && (dibp->sch >= (int32) newmax)) { /* dev using chan? */ if (dibp && (dibp->sch >= (int32) newmax)) { /* dev using chan? */
printf ("Device %02X uses channel %d\n", printf ("Device %02X uses channel %d\n",
@ -439,7 +439,7 @@ int32 i, j, t;
uint32 r; uint32 r;
for (i = t = 0; i < INTSZ; i++) { /* loop thru array */ for (i = t = 0; i < INTSZ; i++) { /* loop thru array */
if (r = int_req[i] & int_enb[i]) { /* find nz int wd */ if ((r = int_req[i] & int_enb[i])) { /* find nz int wd */
for (j = 0; j < 32; t++, j++) { for (j = 0; j < 32; t++, j++) {
if (r & (1u << j)) { if (r & (1u << j)) {
int_req[i] = int_req[i] & ~(1u << j); /* clr request */ int_req[i] = int_req[i] & ~(1u << j); /* clr request */
@ -630,7 +630,7 @@ for (i = 0; i < (DEVNO / 32); i++)
/* Test each device for conflict; add to map; init tables */ /* Test each device for conflict; add to map; init tables */
for (i = 0; dptr = sim_devices[i]; i++) { /* loop thru devices */ for (i = 0; (dptr = sim_devices[i]); i++) { /* loop thru devices */
dibp = (DIB *) dptr->ctxt; /* get DIB */ dibp = (DIB *) dptr->ctxt; /* get DIB */
if ((dibp == NULL) || (dptr->flags & DEV_DIS)) /* exist, enabled? */ if ((dibp == NULL) || (dptr->flags & DEV_DIS)) /* exist, enabled? */
continue; continue;

6
Interdata/id_mt.c
View file

@ -368,13 +368,13 @@ switch (uptr->UCMD) { /* case on function */
} }
if (mt_bptr) { /* any chars? */ if (mt_bptr) { /* any chars? */
if (st = sim_tape_wrrecf (uptr, mtxb, mt_bptr)) /* write, err? */ if ((st = sim_tape_wrrecf (uptr, mtxb, mt_bptr)))/* write, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
} }
break; /* record done */ break; /* record done */
case MTC_WEOF: /* write eof */ case MTC_WEOF: /* write eof */
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
mt_sta = mt_sta | STA_EOF; /* set eof */ mt_sta = mt_sta | STA_EOF; /* set eof */
if (mt_arm[u]) /* set intr */ if (mt_arm[u]) /* set intr */
@ -402,7 +402,7 @@ switch (uptr->UCMD) { /* case on function */
break; break;
case MTC_SPCR: /* backspace */ case MTC_SPCR: /* backspace */
if (st = sim_tape_sprecr (uptr, &tbc)) /* skip rec rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) /* skip rec rev, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; break;
} /* end case */ } /* end case */

2
Interdata/id_pas.c
View file

@ -334,7 +334,7 @@ if (ln >= 0) { /* got one? */
tmxr_poll_rx (&pas_desc); /* poll for input */ tmxr_poll_rx (&pas_desc); /* poll for input */
for (ln = 0; ln < PAS_ENAB; ln++) { /* loop thru lines */ for (ln = 0; ln < PAS_ENAB; ln++) { /* loop thru lines */
if (pas_ldsc[ln].conn) { /* connected? */ if (pas_ldsc[ln].conn) { /* connected? */
if (c = tmxr_getc_ln (&pas_ldsc[ln])) { /* any char? */ if ((c = tmxr_getc_ln (&pas_ldsc[ln]))) { /* any char? */
pas_sta[ln] = pas_sta[ln] & ~(STA_FR | STA_PF); pas_sta[ln] = pas_sta[ln] & ~(STA_FR | STA_PF);
if (pas_rchp[ln]) if (pas_rchp[ln])
pas_sta[ln] = pas_sta[ln] | STA_OVR; pas_sta[ln] = pas_sta[ln] | STA_OVR;

6
LGP/lgp_cpu.c
View file

@ -288,7 +288,7 @@ if (lgp21_sov) { /* stop sense pending? *
do { do {
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (r = sim_process_event ()) if ((r = sim_process_event ()))
break; break;
} }
@ -308,7 +308,7 @@ do {
PC = (PC + 1) & AMASK; /* increment PC */ PC = (PC + 1) & AMASK; /* increment PC */
sim_interval = sim_interval - 1; sim_interval = sim_interval - 1;
if (r = cpu_one_inst (oPC, IR)) { /* one instr; error? */ if ((r = cpu_one_inst (oPC, IR))) { /* one instr; error? */
if (r == STOP_STALL) { /* stall? */ if (r == STOP_STALL) { /* stall? */
PC = oPC; /* back up PC */ PC = oPC; /* back up PC */
delay = r = 0; /* no delay */ delay = r = 0; /* no delay */
@ -744,7 +744,7 @@ if (cptr) {
else inst = IR; else inst = IR;
while ((r = cpu_one_inst (PC, inst)) == STOP_STALL) { while ((r = cpu_one_inst (PC, inst)) == STOP_STALL) {
sim_interval = 0; sim_interval = 0;
if (r = sim_process_event ()) if ((r = sim_process_event ()))
return r; return r;
} }
return r; return r;

6
LGP/lgp_stddev.c
View file

@ -394,7 +394,7 @@ t_stat ttr_svc (UNIT *uptr)
{ {
t_stat r; t_stat r;
if (r = read_reader (uptr, ttr_stopioe, (int32 *) &tti_buf)) if ((r = read_reader (uptr, ttr_stopioe, (int32 *) &tti_buf)))
return r; return r;
if (!(uptr->flags & UNIT_NOCS) && /* cstop enable? */ if (!(uptr->flags & UNIT_NOCS) && /* cstop enable? */
(tti_buf == FLEX_CSTOP)) /* cond stop? */ (tti_buf == FLEX_CSTOP)) /* cond stop? */
@ -415,7 +415,7 @@ t_stat ptr_svc (UNIT *uptr)
{ {
t_stat r; t_stat r;
if (r = read_reader (uptr, ptr_stopioe, &uptr->buf)) if ((r = read_reader (uptr, ptr_stopioe, &uptr->buf)))
return r; return r;
if (uptr->buf == FLEX_CSTOP) /* cond stop? */ if (uptr->buf == FLEX_CSTOP) /* cond stop? */
inp_done = 1; inp_done = 1;
@ -548,7 +548,7 @@ else {
ch = '\b'; ch = '\b';
else ch = flex_to_ascii[flex | (tto_uc << 6)]; /* cvt flex to ascii */ else ch = flex_to_ascii[flex | (tto_uc << 6)]; /* cvt flex to ascii */
if (ch > 0) { /* legit? */ if (ch > 0) { /* legit? */
if (r = sim_putchar_s (ch)) /* write char */ if ((r = sim_putchar_s (ch))) /* write char */
return r; return r;
tto_unit[0].pos = tto_unit[0].pos + 1; tto_unit[0].pos = tto_unit[0].pos + 1;
if (flex == FLEX_CR) { /* cr? */ if (flex == FLEX_CR) { /* cr? */

4
LGP/lgp_sys.c
View file

@ -363,7 +363,7 @@ if ((sw & SWMASK ('L')) || /* LGP hex? */
return SCPE_OK; return SCPE_OK;
if (islower (c)) if (islower (c))
c = toupper (c); c = toupper (c);
if (tptr = strchr (hex_decode, c)) if ((tptr = strchr (hex_decode, c)))
val[0] = (val[0] << 4) | (tptr - hex_decode); val[0] = (val[0] << 4) | (tptr - hex_decode);
else return SCPE_ARG; else return SCPE_ARG;
} }
@ -388,7 +388,7 @@ else sgn = 0;
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */ cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
if (gbuf[1] != 0) if (gbuf[1] != 0)
return SCPE_ARG; return SCPE_ARG;
if (tptr = strchr (opcode, gbuf[0])) if ((tptr = strchr (opcode, gbuf[0])))
val[0] = ((tptr - opcode) << I_V_OP) | sgn; /* merge opcode */ val[0] = ((tptr - opcode) << I_V_OP) | sgn; /* merge opcode */
else return SCPE_ARG; else return SCPE_ARG;
cptr = get_glyph (cptr, gbuf, 0); /* get address */ cptr = get_glyph (cptr, gbuf, 0); /* get address */

2
NOVA/eclipse_cpu.c
View file

@ -744,7 +744,7 @@ if (MapInit == 0) {
while (reason == 0) { /* loop until halted */ while (reason == 0) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) if ((reason = sim_process_event ()))
break; break;
} }

4
NOVA/nova_dkp.c
View file

@ -908,7 +908,7 @@ do {
if (uptr->FUNC == FCCY_READ) { /* read? */ if (uptr->FUNC == FCCY_READ) { /* read? */
awc = fxread (tbuf, sizeof(uint16), DKP_NUMWD, uptr->fileref); awc = fxread (tbuf, sizeof(uint16), DKP_NUMWD, uptr->fileref);
for ( ; awc < DKP_NUMWD; awc++) tbuf[awc] = 0; for ( ; awc < DKP_NUMWD; awc++) tbuf[awc] = 0;
if (err = ferror (uptr->fileref)) if ((err = ferror (uptr->fileref)))
break; break;
for (dx = 0; dx < DKP_NUMWD; dx++) { /* loop thru buffer */ for (dx = 0; dx < DKP_NUMWD; dx++) { /* loop thru buffer */
pa = MapAddr (dkp_map, (dkp_ma & AMASK)); pa = MapAddr (dkp_map, (dkp_ma & AMASK));
@ -924,7 +924,7 @@ do {
dkp_ma = (dkp_ma + 1) & AMASK; dkp_ma = (dkp_ma + 1) & AMASK;
} }
fxwrite (tbuf, sizeof(int16), DKP_NUMWD, uptr->fileref); fxwrite (tbuf, sizeof(int16), DKP_NUMWD, uptr->fileref);
if (err = ferror (uptr->fileref)) if ((err = ferror (uptr->fileref)))
break; break;
} }

8
NOVA/nova_mta.c
View file

@ -412,7 +412,7 @@ else switch (c) { /* case on command */
mtxb[p++] = M[pa] & 0377; mtxb[p++] = M[pa] & 0377;
mta_ma = (mta_ma + 1) & AMASK; mta_ma = (mta_ma + 1) & AMASK;
} }
if (st = sim_tape_wrrecf (uptr, mtxb, tbc)) { /* write rec, err? */ if ((st = sim_tape_wrrecf (uptr, mtxb, tbc))) { /* write rec, err? */
r = mta_map_err (uptr, st); /* map error */ r = mta_map_err (uptr, st); /* map error */
mta_ma = (mta_ma - wc) & AMASK; /* restore wc */ mta_ma = (mta_ma - wc) & AMASK; /* restore wc */
} }
@ -421,7 +421,7 @@ else switch (c) { /* case on command */
break; break;
case CU_WREOF: /* write eof */ case CU_WREOF: /* write eof */
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = mta_map_err (uptr, st); /* map error */ r = mta_map_err (uptr, st); /* map error */
else mta_upddsta (uptr, uptr->USTAT | STA_EOF | STA_RDY); else mta_upddsta (uptr, uptr->USTAT | STA_EOF | STA_RDY);
break; break;
@ -435,7 +435,7 @@ else switch (c) { /* case on command */
case CU_SPACEF: /* space forward */ case CU_SPACEF: /* space forward */
do { do {
mta_wc = (mta_wc + 1) & DMASK; /* incr wc */ mta_wc = (mta_wc + 1) & DMASK; /* incr wc */
if (st = sim_tape_sprecf (uptr, &tbc)) { /* space rec fwd, err? */ if ((st = sim_tape_sprecf (uptr, &tbc))) { /* space rec fwd, err? */
r = mta_map_err (uptr, st); /* map error */ r = mta_map_err (uptr, st); /* map error */
break; break;
} }
@ -447,7 +447,7 @@ else switch (c) { /* case on command */
case CU_SPACER: /* space reverse */ case CU_SPACER: /* space reverse */
do { do {
mta_wc = (mta_wc + 1) & DMASK; /* incr wc */ mta_wc = (mta_wc + 1) & DMASK; /* incr wc */
if (st = sim_tape_sprecr (uptr, &tbc)) { /* space rec rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) { /* space rec rev, err? */
r = mta_map_err (uptr, st); /* map error */ r = mta_map_err (uptr, st); /* map error */
break; break;
} }

2
NOVA/nova_tt1.c
View file

@ -184,7 +184,7 @@ int32 temp, newln;
if (tt1_ldsc.conn) { /* connected? */ if (tt1_ldsc.conn) { /* connected? */
tmxr_poll_rx (&tt_desc); /* poll for input */ tmxr_poll_rx (&tt_desc); /* poll for input */
if (temp = tmxr_getc_ln (&tt1_ldsc)) { /* get char */ if ((temp = tmxr_getc_ln (&tt1_ldsc))) { /* get char */
uptr->buf = temp & 0177; uptr->buf = temp & 0177;
if ((uptr->flags & UNIT_DASHER) && if ((uptr->flags & UNIT_DASHER) &&
(uptr->buf == '\r')) (uptr->buf == '\r'))

96
PDP1/pdp1_cpu.c
View file

@ -546,7 +546,7 @@ reason = 0;
while (reason == 0) { /* loop until halted */ while (reason == 0) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) if ((reason = sim_process_event ()))
break; break;
sbs_lvl = sbs_eval (); /* eval sbs system */ sbs_lvl = sbs_eval (); /* eval sbs system */
} }
@ -610,25 +610,25 @@ while (reason == 0) { /* loop until halted */
/* Logical, load, store instructions */ /* Logical, load, store instructions */
case 001: /* AND */ case 001: /* AND */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
AC = AC & MB; AC = AC & MB;
break; break;
case 002: /* IOR */ case 002: /* IOR */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
AC = AC | MB; AC = AC | MB;
break; break;
case 003: /* XOR */ case 003: /* XOR */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
AC = AC ^ MB; AC = AC ^ MB;
break; break;
@ -638,9 +638,9 @@ while (reason == 0) { /* loop until halted */
reason = STOP_XCT; reason = STOP_XCT;
break; break;
} }
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
xct_count = xct_count + 1; /* count XCT's */ xct_count = xct_count + 1; /* count XCT's */
IR = MB; /* get instruction */ IR = MB; /* get instruction */
@ -648,9 +648,9 @@ while (reason == 0) { /* loop until halted */
case 005: /* LCH */ case 005: /* LCH */
if (cpu_unit.flags & UNIT_1D) { /* PDP-1D? */ if (cpu_unit.flags & UNIT_1D) { /* PDP-1D? */
if (reason = Ea_ch (IR, &byno)) /* MA <- eff addr */ if ((reason = Ea_ch (IR, &byno))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
AC = (MB << byt_shf[byno]) & 0770000; /* extract byte */ AC = (MB << byt_shf[byno]) & 0770000; /* extract byte */
} }
@ -659,9 +659,9 @@ while (reason == 0) { /* loop until halted */
case 006: /* DCH */ case 006: /* DCH */
if (cpu_unit.flags & UNIT_1D) { /* PDP-1D? */ if (cpu_unit.flags & UNIT_1D) { /* PDP-1D? */
if (reason = Ea_ch (IR, &byno)) /* MA <- eff addr */ if ((reason = Ea_ch (IR, &byno))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
MB = (MB & ~(0770000 >> byt_shf[byno])) | /* insert byte */ MB = (MB & ~(0770000 >> byt_shf[byno])) | /* insert byte */
((AC & 0770000) >> byt_shf[byno]); ((AC & 0770000) >> byt_shf[byno]);
@ -683,55 +683,55 @@ while (reason == 0) { /* loop until halted */
break; break;
case 010: /* LAC */ case 010: /* LAC */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
AC = MB; AC = MB;
break; break;
case 011: /* LIO */ case 011: /* LIO */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
IO = MB; IO = MB;
break; break;
case 012: /* DAC */ case 012: /* DAC */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
MB = AC; MB = AC;
reason = Write (); reason = Write ();
break; break;
case 013: /* DAP */ case 013: /* DAP */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
MB = (AC & DAMASK) | (MB & ~DAMASK); MB = (AC & DAMASK) | (MB & ~DAMASK);
reason = Write (); reason = Write ();
break; break;
case 014: /* DIP */ case 014: /* DIP */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
MB = (AC & ~DAMASK) | (MB & DAMASK); MB = (AC & ~DAMASK) | (MB & DAMASK);
reason = Write (); reason = Write ();
break; break;
case 015: /* DIO */ case 015: /* DIO */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
MB = IO; MB = IO;
reason = Write (); reason = Write ();
break; break;
case 016: /* DZM */ case 016: /* DZM */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
MB = 0; MB = 0;
reason = Write (); reason = Write ();
@ -755,9 +755,9 @@ while (reason == 0) { /* loop until halted */
case 017: /* TAD */ case 017: /* TAD */
if (cpu_unit.flags & UNIT_1D) { /* PDP-1D? */ if (cpu_unit.flags & UNIT_1D) { /* PDP-1D? */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
AC = AC + MB + ((PF & PF_L)? 1: 0); /* AC + opnd + L */ AC = AC + MB + ((PF & PF_L)? 1: 0); /* AC + opnd + L */
if (AC > DMASK) /* carry? set L */ if (AC > DMASK) /* carry? set L */
@ -769,9 +769,9 @@ while (reason == 0) { /* loop until halted */
break; break;
case 020: /* ADD */ case 020: /* ADD */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
t = AC; t = AC;
AC = AC + MB; AC = AC + MB;
@ -784,9 +784,9 @@ while (reason == 0) { /* loop until halted */
break; break;
case 021: /* SUB */ case 021: /* SUB */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
t = AC ^ DMASK; /* complement AC */ t = AC ^ DMASK; /* complement AC */
AC = t + MB; /* -AC + MB */ AC = t + MB; /* -AC + MB */
@ -798,9 +798,9 @@ while (reason == 0) { /* loop until halted */
break; break;
case 022: /* IDX */ case 022: /* IDX */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
AC = MB + 1; AC = MB + 1;
if (AC >= DMASK) if (AC >= DMASK)
@ -810,9 +810,9 @@ while (reason == 0) { /* loop until halted */
break; break;
case 023: /* ISP */ case 023: /* ISP */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
AC = MB + 1; AC = MB + 1;
if (AC >= DMASK) if (AC >= DMASK)
@ -824,18 +824,18 @@ while (reason == 0) { /* loop until halted */
break; break;
case 024: /* SAD */ case 024: /* SAD */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
if (AC != MB) if (AC != MB)
PC = INCR_ADDR (PC); PC = INCR_ADDR (PC);
break; break;
case 025: /* SAS */ case 025: /* SAS */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
if (AC == MB) if (AC == MB)
PC = INCR_ADDR (PC); PC = INCR_ADDR (PC);
@ -863,7 +863,7 @@ while (reason == 0) { /* loop until halted */
hst[hst_p].ea = PC; hst[hst_p].ea = PC;
} }
else { /* normal JMP */ else { /* normal JMP */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
PCQ_ENTRY; PCQ_ENTRY;
PC = MA; PC = MA;
@ -871,7 +871,7 @@ while (reason == 0) { /* loop until halted */
break; break;
case 031: /* JSP */ case 031: /* JSP */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
AC = EPC_WORD; AC = EPC_WORD;
PCQ_ENTRY; PCQ_ENTRY;
@ -889,9 +889,9 @@ while (reason == 0) { /* loop until halted */
*/ */
case 026: /* MUL */ case 026: /* MUL */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
if (cpu_unit.flags & UNIT_MDV) { /* hardware? */ if (cpu_unit.flags & UNIT_MDV) { /* hardware? */
sign = AC ^ MB; /* result sign */ sign = AC ^ MB; /* result sign */
@ -919,9 +919,9 @@ while (reason == 0) { /* loop until halted */
break; break;
case 027: /* DIV */ case 027: /* DIV */
if (reason = Ea (IR)) /* MA <- eff addr */ if ((reason = Ea (IR))) /* MA <- eff addr */
break; break;
if (reason = Read ()) /* MB <- data */ if ((reason = Read ())) /* MB <- data */
break; break;
if (cpu_unit.flags & UNIT_MDV) { /* hardware */ if (cpu_unit.flags & UNIT_MDV) { /* hardware */
sign = AC ^ MB; /* result sign */ sign = AC ^ MB; /* result sign */
@ -1362,13 +1362,13 @@ t_stat r;
MA = (PC & EPCMASK) | (IR & DAMASK); /* direct address */ MA = (PC & EPCMASK) | (IR & DAMASK); /* direct address */
if (IR & IA) { /* indirect addr? */ if (IR & IA) { /* indirect addr? */
if (extm) { /* extend? */ if (extm) { /* extend? */
if (r = Read ()) /* read; err? */ if ((r = Read ())) /* read; err? */
return r; return r;
MA = MB & AMASK; /* one level */ MA = MB & AMASK; /* one level */
} }
else { /* multi-level */ else { /* multi-level */
for (i = 0; i < ind_max; i++) { /* count indirects */ for (i = 0; i < ind_max; i++) { /* count indirects */
if (r = Read ()) /* get ind word */ if ((r = Read ())) /* get ind word */
return r; return r;
MA = (PC & EPCMASK) | (MB & DAMASK); MA = (PC & EPCMASK) | (MB & DAMASK);
if ((MB & IA) == 0) if ((MB & IA) == 0)
@ -1392,12 +1392,12 @@ t_stat r;
MA = (PC & EPCMASK) | (IR & DAMASK); /* direct address */ MA = (PC & EPCMASK) | (IR & DAMASK); /* direct address */
if (extm) { /* extend? */ if (extm) { /* extend? */
if (r = Read ()) /* read; err? */ if ((r = Read ())) /* read; err? */
return r; return r;
} }
else { /* multi-level */ else { /* multi-level */
for (i = 0; i < ind_max; i++) { /* count indirects */ for (i = 0; i < ind_max; i++) { /* count indirects */
if (r = Read ()) /* get ind word */ if ((r = Read ())) /* get ind word */
return r; return r;
if ((MB & IA) == 0) if ((MB & IA) == 0)
break; break;

2
PDP1/pdp1_dcs.c
View file

@ -251,7 +251,7 @@ if (ln >= 0) { /* got one? */
tmxr_poll_rx (&dcs_desc); /* poll for input */ tmxr_poll_rx (&dcs_desc); /* poll for input */
for (ln = 0; ln < DCS_NUMLIN; ln++) { /* loop thru lines */ for (ln = 0; ln < DCS_NUMLIN; ln++) { /* loop thru lines */
if (dcs_ldsc[ln].conn) { /* connected? */ if (dcs_ldsc[ln].conn) { /* connected? */
if (c = tmxr_getc_ln (&dcs_ldsc[ln])) { /* get char */ if ((c = tmxr_getc_ln (&dcs_ldsc[ln]))) { /* get char */
if (c & SCPE_BREAK) /* break? */ if (c & SCPE_BREAK) /* break? */
c = 0; c = 0;
else c = sim_tt_inpcvt (c, TT_GET_MODE (dcsl_unit[ln].flags)|TTUF_KSR); else c = sim_tt_inpcvt (c, TT_GET_MODE (dcsl_unit[ln].flags)|TTUF_KSR);

6
PDP10/pdp10_cpu.c
View file

@ -705,7 +705,7 @@ pager_tc = FALSE; /* not in trap cycle */
pflgs = 0; /* not in PXCT */ pflgs = 0; /* not in PXCT */
xct_cnt = 0; /* count XCT's */ xct_cnt = 0; /* count XCT's */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (i = sim_process_event ()) /* error? stop sim */ if ((i = sim_process_event ())) /* error? stop sim */
ABORT (i); ABORT (i);
pi_eval (); /* eval pi system */ pi_eval (); /* eval pi system */
} }
@ -719,7 +719,7 @@ if (sim_interval <= 0) { /* check clock queue */
if (qintr) { if (qintr) {
int32 vec, uba; int32 vec, uba;
pager_pi = TRUE; /* flag in pi seq */ pager_pi = TRUE; /* flag in pi seq */
if (vec = pi_ub_vec (qintr, &uba)) { /* Unibus interrupt? */ if ((vec = pi_ub_vec (qintr, &uba))) { /* Unibus interrupt? */
mb = ReadP (epta + EPT_UBIT + uba); /* get dispatch table */ mb = ReadP (epta + EPT_UBIT + uba); /* get dispatch table */
if (mb == 0) /* invalid? stop */ if (mb == 0) /* invalid? stop */
ABORT (STOP_ZERINT); ABORT (STOP_ZERINT);
@ -2019,7 +2019,7 @@ int32 test_int (void)
int32 t; int32 t;
if (sim_interval <= 0) { /* check queue */ if (sim_interval <= 0) { /* check queue */
if (t = sim_process_event ()) /* IO event? */ if ((t = sim_process_event ())) /* IO event? */
return t; return t;
if (pi_eval ()) /* interrupt? */ if (pi_eval ()) /* interrupt? */
return (INTERRUPT); return (INTERRUPT);

4
PDP10/pdp10_ksio.c
View file

@ -401,7 +401,7 @@ uint32 pa = (uint32) ea;
int32 i, n, val; int32 i, n, val;
DIB *dibp; DIB *dibp;
for (i = 0; dibp = dib_tab[i]; i++ ) { for (i = 0; (dibp = dib_tab[i]); i++ ) {
if ((pa >= dibp->ba) && if ((pa >= dibp->ba) &&
(pa < (dibp->ba + dibp->lnt))) { (pa < (dibp->ba + dibp->lnt))) {
dibp->rd (&val, pa, READ); dibp->rd (&val, pa, READ);
@ -418,7 +418,7 @@ uint32 pa = (uint32) ea;
int32 i, n; int32 i, n;
DIB *dibp; DIB *dibp;
for (i = 0; dibp = dib_tab[i]; i++ ) { for (i = 0; (dibp = dib_tab[i]); i++ ) {
if ((pa >= dibp->ba) && if ((pa >= dibp->ba) &&
(pa < (dibp->ba + dibp->lnt))) { (pa < (dibp->ba + dibp->lnt))) {
dibp->wr ((int32) val, pa, mode); dibp->wr ((int32) val, pa, mode);

4
PDP10/pdp10_lp20.c
View file

@ -563,7 +563,7 @@ lp20_unit.pos = ftell (lp20_unit.fileref); /* print 'n' newlines */
if (dvuadv) /* update DAVFU ptr */ if (dvuadv) /* update DAVFU ptr */
dvptr = (dvptr + cnt) % dvlnt; dvptr = (dvptr + cnt) % dvlnt;
if (davfu[dvptr] & (1 << DV_TOF)) { /* at top of form? */ if (davfu[dvptr] & (1 << DV_TOF)) { /* at top of form? */
if (lppagc = (lppagc - 1) & PAGC_MASK) { /* decr page cntr */ if ((lppagc = (lppagc - 1) & PAGC_MASK)) { /* decr page cntr */
lpcsa = lpcsa & ~CSA_PZRO; /* update status */ lpcsa = lpcsa & ~CSA_PZRO; /* update status */
return TRUE; return TRUE;
} }
@ -592,7 +592,7 @@ for (i = 0; i < dvlnt; i++) { /* search DAVFU */
lp20_adv (1, FALSE); lp20_adv (1, FALSE);
fputc ('\f', lp20_unit.fileref); /* print form feed */ fputc ('\f', lp20_unit.fileref); /* print form feed */
lp20_unit.pos = ftell (lp20_unit.fileref); lp20_unit.pos = ftell (lp20_unit.fileref);
if (lppagc = (lppagc - 1) & PAGC_MASK) { /* decr page cntr */ if ((lppagc = (lppagc - 1) & PAGC_MASK)) { /* decr page cntr */
lpcsa = lpcsa & ~CSA_PZRO; /* update status */ lpcsa = lpcsa & ~CSA_PZRO; /* update status */
return TRUE; return TRUE;
} }

2
PDP10/pdp10_mdfp.c
View file

@ -493,7 +493,7 @@ if (a.fhi >= 2 * b.fhi) { /* will divide work? */
SETF (F_AOV | F_DCK | F_FOV | F_T1); SETF (F_AOV | F_DCK | F_FOV | F_T1);
return FALSE; return FALSE;
} }
if (savhi = a.fhi) { /* dvd = 0? quo = 0 */ if ((savhi = a.fhi)) { /* dvd = 0? quo = 0 */
a.sign = a.sign ^ b.sign; /* result sign */ a.sign = a.sign ^ b.sign; /* result sign */
a.exp = a.exp - b.exp + FP_BIAS + 1; /* result exponent */ a.exp = a.exp - b.exp + FP_BIAS + 1; /* result exponent */
a.fhi = a.fhi / (b.fhi >> (FP_N_FHI + 1)); /* do divide */ a.fhi = a.fhi / (b.fhi >> (FP_N_FHI + 1)); /* do divide */

2
PDP10/pdp10_rp.c
View file

@ -951,7 +951,7 @@ switch (uptr->FUNC) { /* case on function */
if ((rpcs2 & CS2_UAI) == 0) if ((rpcs2 & CS2_UAI) == 0)
ba = ba + 4; ba = ba + 4;
} }
if (fc10 = twc10 & (RP_NUMWD - 1)) { /* fill? */ if ((fc10 = twc10 & (RP_NUMWD - 1))) { /* fill? */
fc10 = RP_NUMWD - fc10; fc10 = RP_NUMWD - fc10;
for (i = 0; i < fc10; i++) for (i = 0; i < fc10; i++)
dbuf[twc10 + i] = 0; dbuf[twc10 + i] = 0;

12
PDP10/pdp10_tu.c
View file

@ -833,7 +833,7 @@ switch (fnc) { /* case on function */
case FNC_SPACEF: /* space forward */ case FNC_SPACEF: /* space forward */
do { do {
tufc = (tufc + 1) & 0177777; /* incr fc */ tufc = (tufc + 1) & 0177777; /* incr fc */
if (st = sim_tape_sprecf (uptr, &tbc)) { /* space rec fwd, err? */ if ((st = sim_tape_sprecf (uptr, &tbc))) { /* space rec fwd, err? */
r = tu_map_err (uptr, st, 0); /* map error */ r = tu_map_err (uptr, st, 0); /* map error */
break; break;
} }
@ -847,7 +847,7 @@ switch (fnc) { /* case on function */
case FNC_SPACER: /* space reverse */ case FNC_SPACER: /* space reverse */
do { do {
tufc = (tufc + 1) & 0177777; /* incr wc */ tufc = (tufc + 1) & 0177777; /* incr wc */
if (st = sim_tape_sprecr (uptr, &tbc)) { /* space rec rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) { /* space rec rev, err? */
r = tu_map_err (uptr, st, 0); /* map error */ r = tu_map_err (uptr, st, 0); /* map error */
break; break;
} }
@ -859,7 +859,7 @@ switch (fnc) { /* case on function */
break; break;
case FNC_WREOF: /* write end of file */ case FNC_WREOF: /* write end of file */
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = tu_map_err (uptr, st, 0); /* map error */ r = tu_map_err (uptr, st, 0); /* map error */
tufs = tufs | FS_ATA; tufs = tufs | FS_ATA;
break; break;
@ -889,7 +889,7 @@ switch (fnc) { /* case on function */
if ((uptr->UDENS == TC_1600) && sim_tape_bot (uptr)) if ((uptr->UDENS == TC_1600) && sim_tape_bot (uptr))
tufs = tufs | FS_ID; /* PE BOT? ID burst */ tufs = tufs | FS_ID; /* PE BOT? ID burst */
TXFR (ba, wc, 0); /* validate transfer */ TXFR (ba, wc, 0); /* validate transfer */
if (st = sim_tape_rdrecf (uptr, xbuf, &tbc, MT_MAXFR)) { /* read fwd */ if ((st = sim_tape_rdrecf (uptr, xbuf, &tbc, MT_MAXFR))) {/* read fwd */
if (st == MTSE_TMK) /* TMK also sets FCE */ if (st == MTSE_TMK) /* TMK also sets FCE */
set_tuer (ER_FCE); set_tuer (ER_FCE);
r = tu_map_err (uptr, st, 1); /* map error */ r = tu_map_err (uptr, st, 1); /* map error */
@ -936,7 +936,7 @@ switch (fnc) { /* case on function */
} /* end for */ } /* end for */
if (j < fc) /* short record? */ if (j < fc) /* short record? */
fc = j; fc = j;
if (st = sim_tape_wrrecf (uptr, xbuf, fc)) /* write rec, err? */ if ((st = sim_tape_wrrecf (uptr, xbuf, fc))) /* write rec, err? */
r = tu_map_err (uptr, st, 1); /* map error */ r = tu_map_err (uptr, st, 1); /* map error */
else { else {
tufc = (tufc + fc) & 0177777; tufc = (tufc + fc) & 0177777;
@ -951,7 +951,7 @@ switch (fnc) { /* case on function */
case FNC_WCHKR: /* wcheck = read */ case FNC_WCHKR: /* wcheck = read */
tufc = 0; /* clear frame count */ tufc = 0; /* clear frame count */
TXFR (ba, wc, 1); /* validate xfer rev */ TXFR (ba, wc, 1); /* validate xfer rev */
if (st = sim_tape_rdrecr (uptr, xbuf + 4, &tbc, MT_MAXFR)) { /* read rev */ if ((st = sim_tape_rdrecr (uptr, xbuf + 4, &tbc, MT_MAXFR))) {/* read rev */
if (st == MTSE_TMK) /* TMK also sets FCE */ if (st == MTSE_TMK) /* TMK also sets FCE */
set_tuer (ER_FCE); set_tuer (ER_FCE);
r = tu_map_err (uptr, st, 1); /* map error */ r = tu_map_err (uptr, st, 1); /* map error */

8
PDP11/pdp11_cis.c
View file

@ -1134,7 +1134,7 @@ switch (op) { /* case on opcode */
result = (A2ADR << 16) | A2LNT; /* op in VAX format */ result = (A2ADR << 16) | A2LNT; /* op in VAX format */
CVTLx: CVTLx:
dst = Dstr0; /* clear result */ dst = Dstr0; /* clear result */
if (dst.sign = GET_SIGN_L (result)) if ((dst.sign = GET_SIGN_L (result)))
result = (~result + 1) & 0xFFFFFFFF; result = (~result + 1) & 0xFFFFFFFF;
for (i = 1; (i < (DSTRLNT * 8)) && result; i++) { for (i = 1; (i < (DSTRLNT * 8)) && result; i++) {
digit = result % 10; digit = result % 10;
@ -1267,7 +1267,7 @@ for (i = 0; i < DSTRLNT; i++) { /* loop thru value */
mask = 0xFFFFFFFF; mask = 0xFFFFFFFF;
if (dst->val[i] & mask) /* test for ovflo */ if (dst->val[i] & mask) /* test for ovflo */
V = 1; V = 1;
if (dst->val[i] = dst->val[i] & ~mask) /* test nz */ if ((dst->val[i] = dst->val[i] & ~mask)) /* test nz */
Z = 0; Z = 0;
} }
dst->sign = dst->sign & ~unsignedtab[type] & ~(Z & ~V); dst->sign = dst->sign & ~unsignedtab[type] & ~(Z & ~V);
@ -1523,7 +1523,7 @@ uint32 NibbleRshift (DSTR *dsrc, int32 sc, uint32 cin)
{ {
int32 i, s, nc; int32 i, s, nc;
if (s = sc * 4) { if ((s = sc * 4)) {
for (i = DSTRMAX; i >= 0; i--) { for (i = DSTRMAX; i >= 0; i--) {
nc = (dsrc->val[i] << (32 - s)) & 0xFFFFFFFF; nc = (dsrc->val[i] << (32 - s)) & 0xFFFFFFFF;
dsrc->val[i] = ((dsrc->val[i] >> s) | dsrc->val[i] = ((dsrc->val[i] >> s) |
@ -1548,7 +1548,7 @@ int32 i, s;
uint32 nc, cin; uint32 nc, cin;
cin = 0; cin = 0;
if (s = sc * 4) { if ((s = sc * 4)) {
for (i = 0; i < DSTRLNT; i++) { for (i = 0; i < DSTRLNT; i++) {
nc = dsrc->val[i] >> (32 - s); nc = dsrc->val[i] >> (32 - s);
dsrc->val[i] = ((dsrc->val[i] << s) | cin) & 0xFFFFFFFF; dsrc->val[i] = ((dsrc->val[i] << s) | cin) & 0xFFFFFFFF;

4
PDP11/pdp11_cpu.c
View file

@ -731,7 +731,7 @@ while (reason == 0) {
if (trap_req) { /* check traps, ints */ if (trap_req) { /* check traps, ints */
trapea = 0; /* assume srch fails */ trapea = 0; /* assume srch fails */
if (t = trap_req & TRAP_ALL) { /* if a trap */ if ((t = trap_req & TRAP_ALL)) { /* if a trap */
for (trapnum = 0; trapnum < TRAP_V_MAX; trapnum++) { for (trapnum = 0; trapnum < TRAP_V_MAX; trapnum++) {
if ((t >> trapnum) & 1) { /* trap set? */ if ((t >> trapnum) & 1) { /* trap set? */
trapea = trap_vec[trapnum]; /* get vec, clr */ trapea = trap_vec[trapnum]; /* get vec, clr */
@ -1292,7 +1292,7 @@ while (reason == 0) {
break; break;
case 070: /* CSM */ case 070: /* CSM */
if (CPUT (HAS_CSM) && (MMR3 & MMR3_CSM) || (cm != MD_KER)) { if ((CPUT (HAS_CSM) && (MMR3 & MMR3_CSM)) || (cm != MD_KER)) {
dst = dstreg? R[dstspec]: ReadW (GeteaW (dstspec)); dst = dstreg? R[dstspec]: ReadW (GeteaW (dstspec));
PSW = get_PSW () & ~PSW_CC; /* PSW, cc = 0 */ PSW = get_PSW () & ~PSW_CC; /* PSW, cc = 0 */
STACKFILE[cm] = SP; STACKFILE[cm] = SP;

2
PDP11/pdp11_cpumod.c
View file

@ -1075,7 +1075,7 @@ t_stat r;
for (i = 0; cnf_tab[i].dib != NULL; i++) { /* loop thru config tab */ for (i = 0; cnf_tab[i].dib != NULL; i++) { /* loop thru config tab */
if (((cnf_tab[i].cpum == 0) || (cpu_type & cnf_tab[i].cpum)) && if (((cnf_tab[i].cpum == 0) || (cpu_type & cnf_tab[i].cpum)) &&
((cnf_tab[i].optm == 0) || (cpu_opt & cnf_tab[i].optm))) { ((cnf_tab[i].optm == 0) || (cpu_opt & cnf_tab[i].optm))) {
if (r = build_ubus_tab (&cpu_dev, cnf_tab[i].dib)) /* add to dispatch tab */ if ((r = build_ubus_tab (&cpu_dev, cnf_tab[i].dib)))/* add to dispatch tab */
return r; return r;
} }
} }

2
PDP11/pdp11_dl.c
View file

@ -346,7 +346,7 @@ if (ln >= 0) { /* got one? rcv enb */
tmxr_poll_rx (&dlx_desc); /* poll for input */ tmxr_poll_rx (&dlx_desc); /* poll for input */
for (ln = 0; ln < DLX_LINES; ln++) { /* loop thru lines */ for (ln = 0; ln < DLX_LINES; ln++) { /* loop thru lines */
if (dlx_ldsc[ln].conn) { /* connected? */ if (dlx_ldsc[ln].conn) { /* connected? */
if (temp = tmxr_getc_ln (&dlx_ldsc[ln])) { /* get char */ if ((temp = tmxr_getc_ln (&dlx_ldsc[ln]))) { /* get char */
if (temp & SCPE_BREAK) /* break? */ if (temp & SCPE_BREAK) /* break? */
c = DLIBUF_ERR|DLIBUF_RBRK; c = DLIBUF_ERR|DLIBUF_RBRK;
else c = sim_tt_inpcvt (temp, TT_GET_MODE (dlo_unit[ln].flags)); else c = sim_tt_inpcvt (temp, TT_GET_MODE (dlo_unit[ln].flags));

2
PDP11/pdp11_fp.c
View file

@ -438,7 +438,7 @@ switch ((IR >> 8) & 017) { /* decode IR<11:8> */
else fac.l = ReadI (GeteaFP (dstspec, leni), dstspec, leni); else fac.l = ReadI (GeteaFP (dstspec, leni), dstspec, leni);
fac.h = 0; fac.h = 0;
if (fac.l) { if (fac.l) {
if (sign = GET_SIGN_L (fac.l)) if ((sign = GET_SIGN_L (fac.l)))
fac.l = (fac.l ^ 0xFFFFFFFF) + 1; fac.l = (fac.l ^ 0xFFFFFFFF) + 1;
for (i = 0; GET_SIGN_L (fac.l) == 0; i++) for (i = 0; GET_SIGN_L (fac.l) == 0; i++)
fac.l = fac.l << 1; fac.l = fac.l << 1;

8
PDP11/pdp11_hk.c
View file

@ -887,7 +887,7 @@ switch (fnc) { /* case on function */
err = fseek (uptr->fileref, da * sizeof (int16), SEEK_SET); err = fseek (uptr->fileref, da * sizeof (int16), SEEK_SET);
if (uptr->FNC == FNC_WRITE) { /* write? */ if (uptr->FNC == FNC_WRITE) { /* write? */
if (hkcs2 & CS2_UAI) { /* no addr inc? */ if (hkcs2 & CS2_UAI) { /* no addr inc? */
if (t = Map_ReadW (ba, 2, &comp)) { /* get 1st wd */ if ((t = Map_ReadW (ba, 2, &comp))) { /* get 1st wd */
wc = 0; /* NXM, no xfr */ wc = 0; /* NXM, no xfr */
hkcs2 = hkcs2 | CS2_NEM; /* set nxm err */ hkcs2 = hkcs2 | CS2_NEM; /* set nxm err */
} }
@ -895,7 +895,7 @@ switch (fnc) { /* case on function */
hkxb[i] = comp; hkxb[i] = comp;
} }
else { /* normal */ else { /* normal */
if (t = Map_ReadW (ba, wc << 1, hkxb)) { /* get buf */ if ((t = Map_ReadW (ba, wc << 1, hkxb))) {/* get buf */
wc = wc - (t >> 1); /* NXM, adj wc */ wc = wc - (t >> 1); /* NXM, adj wc */
hkcs2 = hkcs2 | CS2_NEM; /* set nxm err */ hkcs2 = hkcs2 | CS2_NEM; /* set nxm err */
} }
@ -915,13 +915,13 @@ switch (fnc) { /* case on function */
for ( ; i < wc; i++) /* fill buf */ for ( ; i < wc; i++) /* fill buf */
hkxb[i] = 0; hkxb[i] = 0;
if (hkcs2 & CS2_UAI) { /* no addr inc? */ if (hkcs2 & CS2_UAI) { /* no addr inc? */
if (t = Map_WriteW (ba, 2, &hkxb[wc - 1])) { if ((t = Map_WriteW (ba, 2, &hkxb[wc - 1]))) {
wc = 0; /* NXM, no xfr */ wc = 0; /* NXM, no xfr */
hkcs2 = hkcs2 | CS2_NEM; /* set nxm err */ hkcs2 = hkcs2 | CS2_NEM; /* set nxm err */
} }
} }
else { /* normal */ else { /* normal */
if (t = Map_WriteW (ba, wc << 1, hkxb)) { /* put buf */ if ((t = Map_WriteW (ba, wc << 1, hkxb))) {/* put buf */
wc = wc - (t >> 1); /* NXM, adj wc */ wc = wc - (t >> 1); /* NXM, adj wc */
hkcs2 = hkcs2 | CS2_NEM; /* set nxm err */ hkcs2 = hkcs2 | CS2_NEM; /* set nxm err */
} }

6
PDP11/pdp11_io.c
View file

@ -372,17 +372,17 @@ init_ubus_tab (); /* init Unibus tables */
init_mbus_tab (); /* init Massbus tables */ init_mbus_tab (); /* init Massbus tables */
for (i = 0; i < 7; i++) /* seed PIRQ intr */ for (i = 0; i < 7; i++) /* seed PIRQ intr */
int_vec[i + 1][pirq_bit[i]] = VEC_PIRQ; int_vec[i + 1][pirq_bit[i]] = VEC_PIRQ;
if (r = cpu_build_dib ()) /* build CPU entries */ if ((r = cpu_build_dib ())) /* build CPU entries */
return r; return r;
for (i = 0; (dptr = sim_devices[i]) != NULL; i++) { /* loop thru dev */ for (i = 0; (dptr = sim_devices[i]) != NULL; i++) { /* loop thru dev */
dibp = (DIB *) dptr->ctxt; /* get DIB */ dibp = (DIB *) dptr->ctxt; /* get DIB */
if (dibp && !(dptr->flags & DEV_DIS)) { /* defined, enabled? */ if (dibp && !(dptr->flags & DEV_DIS)) { /* defined, enabled? */
if (dptr->flags & DEV_MBUS) { /* Massbus? */ if (dptr->flags & DEV_MBUS) { /* Massbus? */
if (r = build_mbus_tab (dptr, dibp)) /* add to Mbus tab */ if ((r = build_mbus_tab (dptr, dibp))) /* add to Mbus tab */
return r; return r;
} }
else { /* no, Unibus */ else { /* no, Unibus */
if (r = build_ubus_tab (dptr, dibp)) /* add to Unibus tab */ if ((r = build_ubus_tab (dptr, dibp))) /* add to Unibus tab */
return r; return r;
} }
} /* end if enabled */ } /* end if enabled */

4
PDP11/pdp11_ke.c
View file

@ -252,7 +252,7 @@ switch (PA & 017) { /* decode PA<3:0> */
data = data & 077; /* 6b shift count */ data = data & 077; /* 6b shift count */
if (data != 0) { if (data != 0) {
t32 = (ke_AC << 16) | ke_MQ; /* 32b operand */ t32 = (ke_AC << 16) | ke_MQ; /* 32b operand */
if (sign = GET_SIGN_W (ke_AC)) /* sext operand */ if ((sign = GET_SIGN_W (ke_AC))) /* sext operand */
t32 = t32 | ~017777777777; t32 = t32 | ~017777777777;
if (data < 32) { /* [1,31] - left */ if (data < 32) { /* [1,31] - left */
sout = (t32 >> (32 - data)) | (-sign << data); sout = (t32 >> (32 - data)) | (-sign << data);
@ -282,7 +282,7 @@ switch (PA & 017) { /* decode PA<3:0> */
data = data & 077; /* 6b shift count */ data = data & 077; /* 6b shift count */
if (data != 0) { if (data != 0) {
t32 = (ke_AC << 16) | ke_MQ; /* 32b operand */ t32 = (ke_AC << 16) | ke_MQ; /* 32b operand */
if (sign = GET_SIGN_W (ke_AC)) /* sext operand */ if ((sign = GET_SIGN_W (ke_AC))) /* sext operand */
t32 = t32 | ~017777777777; t32 = t32 | ~017777777777;
if (data < 32) { /* [1,31] - left */ if (data < 32) { /* [1,31] - left */
sout = (t32 >> (31 - data)) | (-sign << data); sout = (t32 >> (31 - data)) | (-sign << data);

10
PDP11/pdp11_rk.c
View file

@ -545,13 +545,13 @@ if (wc && (err == 0)) { /* seek ok? */
rkxb[i] = 0; rkxb[i] = 0;
} }
if (rkcs & RKCS_INH) { /* incr inhibit? */ if (rkcs & RKCS_INH) { /* incr inhibit? */
if (t = Map_WriteW (ma, 2, &rkxb[wc - 1])) { /* store last */ if ((t = Map_WriteW (ma, 2, &rkxb[wc - 1]))) {/* store last */
rker = rker | RKER_NXM; /* NXM? set flag */ rker = rker | RKER_NXM; /* NXM? set flag */
wc = 0; /* no transfer */ wc = 0; /* no transfer */
} }
} }
else { /* normal store */ else { /* normal store */
if (t = Map_WriteW (ma, wc << 1, rkxb)) { /* store buf */ if ((t = Map_WriteW (ma, wc << 1, rkxb))) { /* store buf */
rker = rker | RKER_NXM; /* NXM? set flag */ rker = rker | RKER_NXM; /* NXM? set flag */
wc = wc - t; /* adj wd cnt */ wc = wc - t; /* adj wd cnt */
} }
@ -560,7 +560,7 @@ if (wc && (err == 0)) { /* seek ok? */
case RKCS_WRITE: /* write */ case RKCS_WRITE: /* write */
if (rkcs & RKCS_INH) { /* incr inhibit? */ if (rkcs & RKCS_INH) { /* incr inhibit? */
if (t = Map_ReadW (ma, 2, &comp)) { /* get 1st word */ if ((t = Map_ReadW (ma, 2, &comp))) { /* get 1st word */
rker = rker | RKER_NXM; /* NXM? set flag */ rker = rker | RKER_NXM; /* NXM? set flag */
wc = 0; /* no transfer */ wc = 0; /* no transfer */
} }
@ -568,7 +568,7 @@ if (wc && (err == 0)) { /* seek ok? */
rkxb[i] = comp; rkxb[i] = comp;
} }
else { /* normal fetch */ else { /* normal fetch */
if (t = Map_ReadW (ma, wc << 1, rkxb)) { /* get buf */ if ((t = Map_ReadW (ma, wc << 1, rkxb))) { /* get buf */
rker = rker | RKER_NXM; /* NXM? set flg */ rker = rker | RKER_NXM; /* NXM? set flg */
wc = wc - t; /* adj wd cnt */ wc = wc - t; /* adj wd cnt */
} }
@ -584,7 +584,7 @@ if (wc && (err == 0)) { /* seek ok? */
case RKCS_WCHK: /* write check */ case RKCS_WCHK: /* write check */
i = fxread (rkxb, sizeof (int16), wc, uptr->fileref); i = fxread (rkxb, sizeof (int16), wc, uptr->fileref);
if (err = ferror (uptr->fileref)) { /* read error? */ if ((err = ferror (uptr->fileref))) { /* read error? */
wc = 0; /* no transfer */ wc = 0; /* no transfer */
break; break;
} }

34
PDP11/pdp11_rq.c
View file

@ -1442,7 +1442,7 @@ DEVICE *dptr = rq_devmap[cp->cnum];
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_abo\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_abo\n");
tpkt = 0; /* set no mtch */ tpkt = 0; /* set no mtch */
if (uptr = rq_getucb (cp, lu)) { /* get unit */ if ((uptr = rq_getucb (cp, lu))) { /* get unit */
if (uptr->cpkt && /* curr pkt? */ if (uptr->cpkt && /* curr pkt? */
(GETP32 (uptr->cpkt, CMD_REFL) == ref)) { /* match ref? */ (GETP32 (uptr->cpkt, CMD_REFL) == ref)) { /* match ref? */
tpkt = uptr->cpkt; /* save match */ tpkt = uptr->cpkt; /* save match */
@ -1455,8 +1455,8 @@ if (uptr = rq_getucb (cp, lu)) { /* get unit */
tpkt = uptr->pktq; /* save match */ tpkt = uptr->pktq; /* save match */
uptr->pktq = cp->pak[tpkt].link; /* unlink */ uptr->pktq = cp->pak[tpkt].link; /* unlink */
} }
else if (prv = uptr->pktq) { /* srch pkt q */ else if ((prv = uptr->pktq)) { /* srch pkt q */
while (tpkt = cp->pak[prv].link) { /* walk list */ while ((tpkt = cp->pak[prv].link)) { /* walk list */
if (GETP32 (tpkt, RSP_REFL) == ref) { /* match? unlink */ if (GETP32 (tpkt, RSP_REFL) == ref) { /* match? unlink */
cp->pak[prv].link = cp->pak[tpkt].link; cp->pak[prv].link = cp->pak[tpkt].link;
break; break;
@ -1486,7 +1486,7 @@ UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_avl\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_avl\n");
if (uptr = rq_getucb (cp, lu)) { /* unit exist? */ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, &uptr->pktq, pkt); /* do later */
return OK; return OK;
@ -1546,7 +1546,7 @@ if (cp->pak[pkt].d[CMD_MOD] & MD_NXU) { /* next unit? */
cp->pak[pkt].d[RSP_UN] = lu; cp->pak[pkt].d[RSP_UN] = lu;
} }
} }
if (uptr = rq_getucb (cp, lu)) { /* unit exist? */ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */ if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */
sts = ST_OFL | SB_OFL_NV; /* offl no vol */ sts = ST_OFL | SB_OFL_NV; /* offl no vol */
else if (uptr->flags & UNIT_ONL) /* online */ else if (uptr->flags & UNIT_ONL) /* online */
@ -1583,7 +1583,7 @@ UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_onl\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_onl\n");
if (uptr = rq_getucb (cp, lu)) { /* unit exist? */ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, &uptr->pktq, pkt); /* do later */
return OK; return OK;
@ -1626,7 +1626,7 @@ else {
cmd = GETP (pkt, CMD_OPC, OPC); /* get opcode */ cmd = GETP (pkt, CMD_OPC, OPC); /* get opcode */
cp->cflgs = (cp->cflgs & CF_RPL) | /* hack ctrl flgs */ cp->cflgs = (cp->cflgs & CF_RPL) | /* hack ctrl flgs */
cp->pak[pkt].d[SCC_CFL]; cp->pak[pkt].d[SCC_CFL];
if (cp->htmo = cp->pak[pkt].d[SCC_TMO]) /* set timeout */ if ((cp->htmo = cp->pak[pkt].d[SCC_TMO])) /* set timeout */
cp->htmo = cp->htmo + 2; /* if nz, round up */ cp->htmo = cp->htmo + 2; /* if nz, round up */
cp->pak[pkt].d[SCC_CFL] = cp->cflgs; /* return flags */ cp->pak[pkt].d[SCC_CFL] = cp->cflgs; /* return flags */
cp->pak[pkt].d[SCC_TMO] = RQ_DCTMO; /* ctrl timeout */ cp->pak[pkt].d[SCC_TMO] = RQ_DCTMO; /* ctrl timeout */
@ -1655,7 +1655,7 @@ UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_suc\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_suc\n");
if (uptr = rq_getucb (cp, lu)) { /* unit exist? */ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, &uptr->pktq, pkt); /* do later */
return OK; return OK;
@ -1686,7 +1686,7 @@ UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_fmt\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_fmt\n");
if (uptr = rq_getucb (cp, lu)) { /* unit exist? */ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, &uptr->pktq, pkt); /* do later */
return OK; return OK;
@ -1722,7 +1722,7 @@ UNIT *uptr;
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw(lu=%d, pkt=%d, queue=%s)\n", lu, pkt, q?"yes" : "no"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw(lu=%d, pkt=%d, queue=%s)\n", lu, pkt, q?"yes" : "no");
if (uptr = rq_getucb (cp, lu)) { /* unit exist? */ if ((uptr = rq_getucb (cp, lu))) { /* unit exist? */
if (q && uptr->cpkt) { /* need to queue? */ if (q && uptr->cpkt) { /* need to queue? */
sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw - queued\n"); sim_debug (DBG_TRC, rq_devmap[cp->cnum], "rq_rw - queued\n");
rq_enqt (cp, &uptr->pktq, pkt); /* do later */ rq_enqt (cp, &uptr->pktq, pkt); /* do later */
@ -1854,7 +1854,7 @@ if (!uptr->io_complete) { /* Top End (I/O Initiation) Processing */
else if (cmd == OP_WR) { /* write? */ else if (cmd == OP_WR) { /* write? */
t = Map_ReadW (ba, tbc, uptr->rqxb); /* fetch buffer */ t = Map_ReadW (ba, tbc, uptr->rqxb); /* fetch buffer */
if (abc = tbc - t) { /* any xfer? */ if ((abc = tbc - t)) { /* any xfer? */
wwc = ((abc + (RQ_NUMBY - 1)) & ~(RQ_NUMBY - 1)) >> 1; wwc = ((abc + (RQ_NUMBY - 1)) & ~(RQ_NUMBY - 1)) >> 1;
for (i = (abc >> 1); i < wwc; i++) for (i = (abc >> 1); i < wwc; i++)
((uint16 *)(uptr->rqxb))[i] = 0; ((uint16 *)(uptr->rqxb))[i] = 0;
@ -1889,7 +1889,7 @@ else { /* Bottom End (After I/O processing) */
else { else {
sim_disk_data_trace(uptr, uptr->rqxb, bl, tbc, "sim_disk_rdsect", DBG_DAT & rq_devmap[cp->cnum]->dctrl, DBG_REQ); sim_disk_data_trace(uptr, uptr->rqxb, bl, tbc, "sim_disk_rdsect", DBG_DAT & rq_devmap[cp->cnum]->dctrl, DBG_REQ);
if ((cmd == OP_RD) && !err) { /* read? */ if ((cmd == OP_RD) && !err) { /* read? */
if (t = Map_WriteW (ba, tbc, uptr->rqxb)) { /* store, nxm? */ if ((t = Map_WriteW (ba, tbc, uptr->rqxb))) {/* store, nxm? */
PUTP32 (pkt, RW_WBCL, bc - (tbc - t)); /* adj bc */ PUTP32 (pkt, RW_WBCL, bc - (tbc - t)); /* adj bc */
PUTP32 (pkt, RW_WBAL, ba + (tbc - t)); /* adj ba */ PUTP32 (pkt, RW_WBAL, ba + (tbc - t)); /* adj ba */
if (rq_hbe (cp, uptr)) /* post err log */ if (rq_hbe (cp, uptr)) /* post err log */
@ -2746,11 +2746,11 @@ if ((uptr->flags & UNIT_ONL) == 0) {
if (uptr->cpkt) { if (uptr->cpkt) {
fprintf (st, "Unit %d current ", u); fprintf (st, "Unit %d current ", u);
rq_show_pkt (st, cp, uptr->cpkt); rq_show_pkt (st, cp, uptr->cpkt);
if (pkt = uptr->pktq) { if ((pkt = uptr->pktq)) {
do { do {
fprintf (st, "Unit %d queued ", u); fprintf (st, "Unit %d queued ", u);
rq_show_pkt (st, cp, pkt); rq_show_pkt (st, cp, pkt);
} while (pkt = cp->pak[pkt].link); } while ((pkt = cp->pak[pkt].link));
} }
} }
else fprintf (st, "Unit %d queues are empty\n", u); else fprintf (st, "Unit %d queues are empty\n", u);
@ -2777,7 +2777,7 @@ if (val & RQ_SH_RI) {
rq_show_ring (st, &cp->rq); rq_show_ring (st, &cp->rq);
} }
if (val & RQ_SH_FR) { if (val & RQ_SH_FR) {
if (pkt = cp->freq) { if ((pkt = cp->freq)) {
for (i = 0; pkt != 0; i++, pkt = cp->pak[pkt].link) { for (i = 0; pkt != 0; i++, pkt = cp->pak[pkt].link) {
if (i == 0) if (i == 0)
fprintf (st, "Free queue = %d", pkt); fprintf (st, "Free queue = %d", pkt);
@ -2790,11 +2790,11 @@ if (val & RQ_SH_FR) {
else fprintf (st, "Free queue is empty\n"); else fprintf (st, "Free queue is empty\n");
} }
if (val & RQ_SH_RS) { if (val & RQ_SH_RS) {
if (pkt = cp->rspq) { if ((pkt = cp->rspq)) {
do { do {
fprintf (st, "Response "); fprintf (st, "Response ");
rq_show_pkt (st, cp, pkt); rq_show_pkt (st, cp, pkt);
} while (pkt = cp->pak[pkt].link); } while ((pkt = cp->pak[pkt].link));
} }
else fprintf (st, "Response queue is empty\n"); else fprintf (st, "Response queue is empty\n");
} }

2
PDP11/pdp11_sys.c
View file

@ -992,7 +992,7 @@ switch (j) { /* case on class */
disp = (disp - addr) & 0177777; disp = (disp - addr) & 0177777;
else return SCPE_ARG; else return SCPE_ARG;
} }
if ((disp & 1) || (disp > 0400) && (disp < 0177402)) if ((disp & 1) || ((disp > 0400) && (disp < 0177402)))
return SCPE_ARG; return SCPE_ARG;
val[0] = val[0] | (((disp - 2) >> 1) & 0377); val[0] = val[0] | (((disp - 2) >> 1) & 0377);
break; break;

8
PDP11/pdp11_ta.c
View file

@ -397,13 +397,13 @@ switch (uptr->FNC) { /* case on function */
case TACS_WRITE|TACS_3RD: /* write CRC */ case TACS_WRITE|TACS_3RD: /* write CRC */
if (ta_bptr) { /* anything to write? */ if (ta_bptr) { /* anything to write? */
if (st = sim_tape_wrrecf (uptr, ta_xb, ta_bptr)) /* write, err? */ if ((st = sim_tape_wrrecf (uptr, ta_xb, ta_bptr)))/* write, err? */
r = ta_map_err (uptr, st); /* map error */ r = ta_map_err (uptr, st); /* map error */
} }
break; /* op done */ break; /* op done */
case TACS_WFG: /* write file gap */ case TACS_WFG: /* write file gap */
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = ta_map_err (uptr, st); /* map error */ r = ta_map_err (uptr, st); /* map error */
break; break;
@ -413,7 +413,7 @@ switch (uptr->FNC) { /* case on function */
break; break;
case TACS_SRB: /* space rev blk */ case TACS_SRB: /* space rev blk */
if (st = sim_tape_sprecr (uptr, &tbc)) /* space rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) /* space rev, err? */
r = ta_map_err (uptr, st); /* map error */ r = ta_map_err (uptr, st); /* map error */
break; break;
@ -425,7 +425,7 @@ switch (uptr->FNC) { /* case on function */
break; break;
case TACS_SFB: /* space fwd blk */ case TACS_SFB: /* space fwd blk */
if (st = sim_tape_sprecf (uptr, &tbc)) /* space rev, err? */ if ((st = sim_tape_sprecf (uptr, &tbc))) /* space rev, err? */
r = ta_map_err (uptr, st); /* map error */ r = ta_map_err (uptr, st); /* map error */
ta_cs |= TACS_CRC; /* CRC sets, no err */ ta_cs |= TACS_CRC; /* CRC sets, no err */
break; break;

12
PDP11/pdp11_tm.c
View file

@ -439,7 +439,7 @@ switch (f) { /* case on function */
tm_sta = tm_sta | STA_RLE; tm_sta = tm_sta | STA_RLE;
if (tbc < cbc) /* use smaller */ if (tbc < cbc) /* use smaller */
cbc = tbc; cbc = tbc;
if (t = Map_WriteB (xma, cbc, tmxb)) { /* copy buf to mem */ if ((t = Map_WriteB (xma, cbc, tmxb))) { /* copy buf to mem */
tm_sta = tm_sta | STA_NXM; /* NXM, set err */ tm_sta = tm_sta | STA_NXM; /* NXM, set err */
cbc = cbc - t; /* adj byte cnt */ cbc = cbc - t; /* adj byte cnt */
} }
@ -449,13 +449,13 @@ switch (f) { /* case on function */
case MTC_WRITE: /* write */ case MTC_WRITE: /* write */
case MTC_WREXT: /* write ext gap */ case MTC_WREXT: /* write ext gap */
if (t = Map_ReadB (xma, cbc, tmxb)) { /* copy mem to buf */ if ((t = Map_ReadB (xma, cbc, tmxb))) { /* copy mem to buf */
tm_sta = tm_sta | STA_NXM; /* NXM, set err */ tm_sta = tm_sta | STA_NXM; /* NXM, set err */
cbc = cbc - t; /* adj byte cnt */ cbc = cbc - t; /* adj byte cnt */
if (cbc == 0) /* no xfr? done */ if (cbc == 0) /* no xfr? done */
break; break;
} }
if (st = sim_tape_wrrecf (uptr, tmxb, cbc)) /* write rec, err? */ if ((st = sim_tape_wrrecf (uptr, tmxb, cbc))) /* write rec, err? */
r = tm_map_err (uptr, st); /* map error */ r = tm_map_err (uptr, st); /* map error */
else { else {
xma = (xma + cbc) & 0777777; /* inc bus addr */ xma = (xma + cbc) & 0777777; /* inc bus addr */
@ -464,14 +464,14 @@ switch (f) { /* case on function */
break; break;
case MTC_WREOF: /* write eof */ case MTC_WREOF: /* write eof */
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = tm_map_err (uptr, st); /* map error */ r = tm_map_err (uptr, st); /* map error */
break; break;
case MTC_SPACEF: /* space forward */ case MTC_SPACEF: /* space forward */
do { do {
tm_bc = (tm_bc + 1) & 0177777; /* incr wc */ tm_bc = (tm_bc + 1) & 0177777; /* incr wc */
if (st = sim_tape_sprecf (uptr, &tbc)) { /* spc rec fwd, err? */ if ((st = sim_tape_sprecf (uptr, &tbc))) { /* spc rec fwd, err? */
r = tm_map_err (uptr, st); /* map error */ r = tm_map_err (uptr, st); /* map error */
break; break;
} }
@ -481,7 +481,7 @@ switch (f) { /* case on function */
case MTC_SPACER: /* space reverse */ case MTC_SPACER: /* space reverse */
do { do {
tm_bc = (tm_bc + 1) & 0177777; /* incr wc */ tm_bc = (tm_bc + 1) & 0177777; /* incr wc */
if (st = sim_tape_sprecr (uptr, &tbc)) { /* spc rec rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) { /* spc rec rev, err? */
r = tm_map_err (uptr, st); /* map error */ r = tm_map_err (uptr, st); /* map error */
break; break;
} }

42
PDP11/pdp11_tq.c
View file

@ -828,7 +828,7 @@ else if (mdf & ~tq_cmf[cmd]) { /* invalid mod? */
sts = ST_CMD | I_MODF; /* ill mods */ sts = ST_CMD | I_MODF; /* ill mods */
} }
else { /* valid cmd */ else { /* valid cmd */
if (uptr = tq_getucb (lu)) { /* valid unit? */ if ((uptr = tq_getucb (lu))) { /* valid unit? */
if (q && (tq_cmf[cmd] & CMF_SEQ) && /* queueing, seq, */ if (q && (tq_cmf[cmd] & CMF_SEQ) && /* queueing, seq, */
(uptr->cpkt || uptr->pktq)) { /* and active? */ (uptr->cpkt || uptr->pktq)) { /* and active? */
tq_enqt (&uptr->pktq, pkt); /* do later */ tq_enqt (&uptr->pktq, pkt); /* do later */
@ -909,7 +909,7 @@ UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_abo\n"); sim_debug(DBG_TRC, &tq_dev, "tq_abo\n");
tpkt = 0; /* set no mtch */ tpkt = 0; /* set no mtch */
if (uptr = tq_getucb (lu)) { /* get unit */ if ((uptr = tq_getucb (lu))) { /* get unit */
if (uptr->cpkt && /* curr pkt? */ if (uptr->cpkt && /* curr pkt? */
(GETP32 (uptr->cpkt, CMD_REFL) == ref)) { /* match ref? */ (GETP32 (uptr->cpkt, CMD_REFL) == ref)) { /* match ref? */
tpkt = uptr->cpkt; /* save match */ tpkt = uptr->cpkt; /* save match */
@ -922,8 +922,8 @@ if (uptr = tq_getucb (lu)) { /* get unit */
tpkt = uptr->pktq; /* save match */ tpkt = uptr->pktq; /* save match */
uptr->pktq = tq_pkt[tpkt].link; /* unlink */ uptr->pktq = tq_pkt[tpkt].link; /* unlink */
} }
else if (prv = uptr->pktq) { /* srch pkt q */ else if ((prv = uptr->pktq)) { /* srch pkt q */
while (tpkt = tq_pkt[prv].link) { /* walk list */ while ((tpkt = tq_pkt[prv].link)) { /* walk list */
if (GETP32 (tpkt, RSP_REFL) == ref) { /* match ref? */ if (GETP32 (tpkt, RSP_REFL) == ref) { /* match ref? */
tq_pkt[prv].link = tq_pkt[tpkt].link; /* unlink */ tq_pkt[prv].link = tq_pkt[tpkt].link; /* unlink */
break; break;
@ -953,7 +953,7 @@ UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_avl\n"); sim_debug(DBG_TRC, &tq_dev, "tq_avl\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if ((uptr = tq_getucb (lu))) { /* unit exist? */
if (uptr->flags & UNIT_SXC) /* ser exc pending? */ if (uptr->flags & UNIT_SXC) /* ser exc pending? */
sts = ST_SXC; sts = ST_SXC;
else { else {
@ -1012,7 +1012,7 @@ if (tq_pkt[pkt].d[CMD_MOD] & MD_NXU) { /* next unit? */
tq_pkt[pkt].d[RSP_UN] = lu; tq_pkt[pkt].d[RSP_UN] = lu;
} }
} }
if (uptr = tq_getucb (lu)) { /* unit exist? */ if ((uptr = tq_getucb (lu))) { /* unit exist? */
if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */ if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */
sts = ST_OFL | SB_OFL_NV; /* offl no vol */ sts = ST_OFL | SB_OFL_NV; /* offl no vol */
else if (uptr->flags & UNIT_ONL) /* online */ else if (uptr->flags & UNIT_ONL) /* online */
@ -1039,7 +1039,7 @@ UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_onl\n"); sim_debug(DBG_TRC, &tq_dev, "tq_onl\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if ((uptr = tq_getucb (lu))) { /* unit exist? */
if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */ if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */
sts = ST_OFL | SB_OFL_NV; /* offl no vol */ sts = ST_OFL | SB_OFL_NV; /* offl no vol */
else if (uptr->flags & UNIT_ONL) /* already online? */ else if (uptr->flags & UNIT_ONL) /* already online? */
@ -1070,7 +1070,7 @@ if (tq_pkt[pkt].d[SCC_MSV]) /* MSCP ver = 0? */
else { else {
tq_cflgs = (tq_cflgs & CF_RPL) | /* hack ctrl flgs */ tq_cflgs = (tq_cflgs & CF_RPL) | /* hack ctrl flgs */
tq_pkt[pkt].d[SCC_CFL]; tq_pkt[pkt].d[SCC_CFL];
if (tq_htmo = tq_pkt[pkt].d[SCC_TMO]) /* set timeout */ if ((tq_htmo = tq_pkt[pkt].d[SCC_TMO])) /* set timeout */
tq_htmo = tq_htmo + 2; /* if nz, round up */ tq_htmo = tq_htmo + 2; /* if nz, round up */
tq_pkt[pkt].d[SCC_CFL] = tq_cflgs; /* return flags */ tq_pkt[pkt].d[SCC_CFL] = tq_cflgs; /* return flags */
tq_pkt[pkt].d[SCC_TMO] = TQ_DCTMO; /* ctrl timeout */ tq_pkt[pkt].d[SCC_TMO] = TQ_DCTMO; /* ctrl timeout */
@ -1096,7 +1096,7 @@ UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_suc\n"); sim_debug(DBG_TRC, &tq_dev, "tq_suc\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if ((uptr = tq_getucb (lu))) { /* unit exist? */
if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */ if ((uptr->flags & UNIT_ATT) == 0) /* not attached? */
sts = ST_OFL | SB_OFL_NV; /* offl no vol */ sts = ST_OFL | SB_OFL_NV; /* offl no vol */
else { else {
@ -1120,7 +1120,7 @@ UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_flu\n"); sim_debug(DBG_TRC, &tq_dev, "tq_flu\n");
if (uptr = tq_getucb (lu)) /* unit exist? */ if ((uptr = tq_getucb (lu))) /* unit exist? */
sts = tq_mot_valid (uptr, OP_FLU); /* validate req */ sts = tq_mot_valid (uptr, OP_FLU); /* validate req */
else sts = ST_OFL; /* offline */ else sts = ST_OFL; /* offline */
tq_putr (pkt, OP_FLU | OP_END, tq_efl (uptr), sts, FLU_LNT, UQ_TYP_SEQ); tq_putr (pkt, OP_FLU | OP_END, tq_efl (uptr), sts, FLU_LNT, UQ_TYP_SEQ);
@ -1138,7 +1138,7 @@ UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_erase\n"); sim_debug(DBG_TRC, &tq_dev, "tq_erase\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if ((uptr = tq_getucb (lu))) { /* unit exist? */
sts = tq_mot_valid (uptr, cmd); /* validity checks */ sts = tq_mot_valid (uptr, cmd); /* validity checks */
if (sts == ST_SUC) { /* ok? */ if (sts == ST_SUC) { /* ok? */
uptr->cpkt = pkt; /* op in progress */ uptr->cpkt = pkt; /* op in progress */
@ -1162,7 +1162,7 @@ UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_wtm\n"); sim_debug(DBG_TRC, &tq_dev, "tq_wtm\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if ((uptr = tq_getucb (lu))) { /* unit exist? */
objp = uptr->objp; /* position op */ objp = uptr->objp; /* position op */
sts = tq_mot_valid (uptr, OP_WTM); /* validity checks */ sts = tq_mot_valid (uptr, OP_WTM); /* validity checks */
if (sts == ST_SUC) { /* ok? */ if (sts == ST_SUC) { /* ok? */
@ -1188,7 +1188,7 @@ UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_pos\n"); sim_debug(DBG_TRC, &tq_dev, "tq_pos\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if ((uptr = tq_getucb (lu))) { /* unit exist? */
objp = uptr->objp; /* position op */ objp = uptr->objp; /* position op */
sts = tq_mot_valid (uptr, OP_POS); /* validity checks */ sts = tq_mot_valid (uptr, OP_POS); /* validity checks */
if (sts == ST_SUC) { /* ok? */ if (sts == ST_SUC) { /* ok? */
@ -1224,7 +1224,7 @@ UNIT *uptr;
sim_debug(DBG_TRC, &tq_dev, "tq_rw\n"); sim_debug(DBG_TRC, &tq_dev, "tq_rw\n");
if (uptr = tq_getucb (lu)) { /* unit exist? */ if ((uptr = tq_getucb (lu))) { /* unit exist? */
objp = uptr->objp; /* position op */ objp = uptr->objp; /* position op */
sts = tq_mot_valid (uptr, cmd); /* validity checks */ sts = tq_mot_valid (uptr, cmd); /* validity checks */
if (sts == ST_SUC) { /* ok? */ if (sts == ST_SUC) { /* ok? */
@ -1363,7 +1363,7 @@ switch (cmd) { /* case on command */
} }
else wbc = res->tbc; else wbc = res->tbc;
if (cmd == OP_RD) { /* read? */ if (cmd == OP_RD) { /* read? */
if (t = Map_WriteB (ba, wbc, res->tqxb)) { /* store, nxm? */ if ((t = Map_WriteB (ba, wbc, res->tqxb))) {/* store, nxm? */
PUTP32 (pkt, RW_BCL, wbc - t); /* adj bc */ PUTP32 (pkt, RW_BCL, wbc - t); /* adj bc */
if (tq_hbe (uptr, ba + wbc - t)) /* post err log */ if (tq_hbe (uptr, ba + wbc - t)) /* post err log */
tq_mot_end (uptr, EF_LOG, ST_HST | SB_HST_NXM, res->tbc); tq_mot_end (uptr, EF_LOG, ST_HST | SB_HST_NXM, res->tbc);
@ -1402,7 +1402,7 @@ switch (cmd) { /* case on command */
case OP_WR: /* write */ case OP_WR: /* write */
if (!io_complete) { /* Top half processing */ if (!io_complete) { /* Top half processing */
if (t = Map_ReadB (ba, bc, res->tqxb)) { /* fetch buf, nxm? */ if ((t = Map_ReadB (ba, bc, res->tqxb))) { /* fetch buf, nxm? */
PUTP32 (pkt, RW_BCL, 0); /* no bytes xfer'd */ PUTP32 (pkt, RW_BCL, 0); /* no bytes xfer'd */
if (tq_hbe (uptr, ba + bc - t)) /* post err log */ if (tq_hbe (uptr, ba + bc - t)) /* post err log */
tq_mot_end (uptr, EF_LOG, ST_HST | SB_HST_NXM, bc); tq_mot_end (uptr, EF_LOG, ST_HST | SB_HST_NXM, bc);
@ -2291,11 +2291,11 @@ if ((uptr->flags & UNIT_ONL) == 0) {
if (uptr->cpkt) { if (uptr->cpkt) {
fprintf (st, "Unit %d current ", u); fprintf (st, "Unit %d current ", u);
tq_show_pkt (st, uptr->cpkt); tq_show_pkt (st, uptr->cpkt);
if (pkt = uptr->pktq) { if ((pkt = uptr->pktq)) {
do { do {
fprintf (st, "Unit %d queued ", u); fprintf (st, "Unit %d queued ", u);
tq_show_pkt (st, pkt); tq_show_pkt (st, pkt);
} while (pkt = tq_pkt[pkt].link); } while ((pkt = tq_pkt[pkt].link));
} }
} }
else fprintf (st, "Unit %d queues are empty\n", u); else fprintf (st, "Unit %d queues are empty\n", u);
@ -2320,7 +2320,7 @@ if (val & TQ_SH_RI) {
tq_show_ring (st, &tq_rq); tq_show_ring (st, &tq_rq);
} }
if (val & TQ_SH_FR) { if (val & TQ_SH_FR) {
if (pkt = tq_freq) { if ((pkt = tq_freq)) {
for (i = 0; pkt != 0; i++, pkt = tq_pkt[pkt].link) { for (i = 0; pkt != 0; i++, pkt = tq_pkt[pkt].link) {
if (i == 0) if (i == 0)
fprintf (st, "Free queue = %d", pkt); fprintf (st, "Free queue = %d", pkt);
@ -2333,11 +2333,11 @@ if (val & TQ_SH_FR) {
else fprintf (st, "Free queue is empty\n"); else fprintf (st, "Free queue is empty\n");
} }
if (val & TQ_SH_RS) { if (val & TQ_SH_RS) {
if (pkt = tq_rspq) { if ((pkt = tq_rspq)) {
do { do {
fprintf (st, "Response "); fprintf (st, "Response ");
tq_show_pkt (st, pkt); tq_show_pkt (st, pkt);
} while (pkt = tq_pkt[pkt].link); } while ((pkt = tq_pkt[pkt].link));
} }
else fprintf (st, "Response queue is empty\n"); else fprintf (st, "Response queue is empty\n");
} }

8
PDP11/pdp11_ts.c
View file

@ -490,7 +490,7 @@ do {
fc = (fc - 1) & DMASK; /* decr wc */ fc = (fc - 1) & DMASK; /* decr wc */
if (upd) if (upd)
msgrfc = fc; msgrfc = fc;
if (st = sim_tape_sprecf (uptr, &tbc)) /* space rec fwd, err? */ if ((st = sim_tape_sprecf (uptr, &tbc))) /* space rec fwd, err? */
return ts_map_status (st); /* map status */ return ts_map_status (st); /* map status */
msgxs0 = msgxs0 | XS0_MOT; /* tape has moved */ msgxs0 = msgxs0 | XS0_MOT; /* tape has moved */
} while (fc != 0); } while (fc != 0);
@ -533,7 +533,7 @@ do {
fc = (fc - 1) & DMASK; /* decr wc */ fc = (fc - 1) & DMASK; /* decr wc */
if (upd) if (upd)
msgrfc = fc; msgrfc = fc;
if (st = sim_tape_sprecr (uptr, &tbc)) /* space rec rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) /* space rec rev, err? */
return ts_map_status (st); /* map status */ return ts_map_status (st); /* map status */
msgxs0 = msgxs0 | XS0_MOT; /* tape has moved */ msgxs0 = msgxs0 | XS0_MOT; /* tape has moved */
} while (fc != 0); } while (fc != 0);
@ -666,7 +666,7 @@ else {
return TC5; return TC5;
} }
} }
if (st = sim_tape_wrrecf (uptr, tsxb, fc)) /* write rec, err? */ if ((st = sim_tape_wrrecf (uptr, tsxb, fc))) /* write rec, err? */
return ts_map_status (st); /* return status */ return ts_map_status (st); /* return status */
msgxs0 = msgxs0 | XS0_MOT; /* tape has moved */ msgxs0 = msgxs0 | XS0_MOT; /* tape has moved */
msgrfc = 0; msgrfc = 0;
@ -679,7 +679,7 @@ int32 ts_wtmk (UNIT *uptr)
{ {
t_stat st; t_stat st;
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
return ts_map_status (st); /* return status */ return ts_map_status (st); /* return status */
msgxs0 = msgxs0 | XS0_MOT; /* tape has moved */ msgxs0 = msgxs0 | XS0_MOT; /* tape has moved */
if (sim_tape_eot (&ts_unit)) /* EOT on write? */ if (sim_tape_eot (&ts_unit)) /* EOT on write? */

12
PDP11/pdp11_tu.c
View file

@ -647,7 +647,7 @@ switch (fnc) { /* case on function */
case FNC_SPACEF: /* space forward */ case FNC_SPACEF: /* space forward */
do { do {
tufc = (tufc + 1) & 0177777; /* incr fc */ tufc = (tufc + 1) & 0177777; /* incr fc */
if (st = sim_tape_sprecf (uptr, &tbc)) { /* space rec fwd, err? */ if ((st = sim_tape_sprecf (uptr, &tbc))) { /* space rec fwd, err? */
r = tu_map_err (drv, st, 0); /* map error */ r = tu_map_err (drv, st, 0); /* map error */
break; break;
} }
@ -660,7 +660,7 @@ switch (fnc) { /* case on function */
case FNC_SPACER: /* space reverse */ case FNC_SPACER: /* space reverse */
do { do {
tufc = (tufc + 1) & 0177777; /* incr wc */ tufc = (tufc + 1) & 0177777; /* incr wc */
if (st = sim_tape_sprecr (uptr, &tbc)) { /* space rec rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) { /* space rec rev, err? */
r = tu_map_err (drv, st, 0); /* map error */ r = tu_map_err (drv, st, 0); /* map error */
break; break;
} }
@ -671,7 +671,7 @@ switch (fnc) { /* case on function */
break; break;
case FNC_WREOF: /* write end of file */ case FNC_WREOF: /* write end of file */
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = tu_map_err (drv, st, 0); /* map error */ r = tu_map_err (drv, st, 0); /* map error */
break; break;
@ -687,7 +687,7 @@ switch (fnc) { /* case on function */
tufc = 0; /* clear frame count */ tufc = 0; /* clear frame count */
if ((uptr->UDENS == TC_1600) && sim_tape_bot (uptr)) if ((uptr->UDENS == TC_1600) && sim_tape_bot (uptr))
tufs = tufs | FS_ID; /* PE BOT? ID burst */ tufs = tufs | FS_ID; /* PE BOT? ID burst */
if (st = sim_tape_rdrecf (uptr, xbuf, &tbc, MT_MAXFR)) { /* read fwd */ if ((st = sim_tape_rdrecf (uptr, xbuf, &tbc, MT_MAXFR))) {/* read fwd */
if (st == MTSE_TMK) /* tmk also sets FCE */ if (st == MTSE_TMK) /* tmk also sets FCE */
tu_set_er (ER_FCE); tu_set_er (ER_FCE);
r = tu_map_err (drv, st, 1); /* map error */ r = tu_map_err (drv, st, 1); /* map error */
@ -739,7 +739,7 @@ switch (fnc) { /* case on function */
} }
tbc = xbc; tbc = xbc;
} }
if (st = sim_tape_wrrecf (uptr, xbuf, tbc)) /* write rec, err? */ if ((st = sim_tape_wrrecf (uptr, xbuf, tbc))) /* write rec, err? */
r = tu_map_err (drv, st, 1); /* map error */ r = tu_map_err (drv, st, 1); /* map error */
else { else {
tufc = (tufc + tbc) & 0177777; tufc = (tufc + tbc) & 0177777;
@ -751,7 +751,7 @@ switch (fnc) { /* case on function */
case FNC_READR: /* read reverse */ case FNC_READR: /* read reverse */
case FNC_WCHKR: /* wcheck = read */ case FNC_WCHKR: /* wcheck = read */
tufc = 0; /* clear frame count */ tufc = 0; /* clear frame count */
if (st = sim_tape_rdrecr (uptr, xbuf + 4, &tbc, MT_MAXFR)) { /* read rev */ if ((st = sim_tape_rdrecr (uptr, xbuf + 4, &tbc, MT_MAXFR))) {/* read rev */
if (st == MTSE_TMK) /* tmk also sets FCE */ if (st == MTSE_TMK) /* tmk also sets FCE */
tu_set_er (ER_FCE); tu_set_er (ER_FCE);
r = tu_map_err (drv, st, 1); /* map error */ r = tu_map_err (drv, st, 1); /* map error */

2
PDP11/pdp11_xq.c
View file

@ -1187,7 +1187,7 @@ t_stat xq_process_setup(CTLR* xq)
xq->var->setup.multicast = (0 != (len & XQ_SETUP_MC)); xq->var->setup.multicast = (0 != (len & XQ_SETUP_MC));
xq->var->setup.promiscuous = (0 != (len & XQ_SETUP_PM)); xq->var->setup.promiscuous = (0 != (len & XQ_SETUP_PM));
if (led = (len & XQ_SETUP_LD) >> 2) { if ((led = (len & XQ_SETUP_LD) >> 2)) {
switch (led) { switch (led) {
case 1: xq->var->setup.l1 = 0; break; case 1: xq->var->setup.l1 = 0; break;
case 2: xq->var->setup.l2 = 0; break; case 2: xq->var->setup.l2 = 0; break;

2
PDP18B/pdp18b_cpu.c
View file

@ -604,7 +604,7 @@ while (reason == 0) { /* loop until halted */
int32 link_init, fill; int32 link_init, fill;
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) if ((reason = sim_process_event ()))
break; break;
api_int = api_eval (&int_pend); /* eval API */ api_int = api_eval (&int_pend); /* eval API */
} }

26
PDP18B/pdp18b_fpp.c
View file

@ -253,7 +253,7 @@ switch (fop) { /* case on subop */
break; break;
case FOP_SUB: /* subtract */ case FOP_SUB: /* subtract */
if (sta = fp15_opnd (fir, ar, &fmb)) /* fetch op to FMB */ if ((sta = fp15_opnd (fir, ar, &fmb))) /* fetch op to FMB */
break; break;
if (fir & FI_FP) /* fp? */ if (fir & FI_FP) /* fp? */
sta = fp15_fadd (fir, &fma, &fmb, 1); /* yes, fp sub */ sta = fp15_fadd (fir, &fma, &fmb, 1); /* yes, fp sub */
@ -262,7 +262,7 @@ switch (fop) { /* case on subop */
case FOP_RSUB: /* reverse sub */ case FOP_RSUB: /* reverse sub */
fmb = fma; /* FMB <- FMA */ fmb = fma; /* FMB <- FMA */
if (sta = fp15_opnd (fir, ar, &fma)) /* fetch op to FMA */ if ((sta = fp15_opnd (fir, ar, &fma))) /* fetch op to FMA */
break; break;
if (fir & FI_FP) /* fp? */ if (fir & FI_FP) /* fp? */
sta = fp15_fadd (fir, &fma, &fmb, 1); /* yes, fp sub */ sta = fp15_fadd (fir, &fma, &fmb, 1); /* yes, fp sub */
@ -270,7 +270,7 @@ switch (fop) { /* case on subop */
break; break;
case FOP_MUL: /* multiply */ case FOP_MUL: /* multiply */
if (sta = fp15_opnd (fir, ar, &fmb)) /* fetch op to FMB */ if ((sta = fp15_opnd (fir, ar, &fmb))) /* fetch op to FMB */
break; break;
if (fir & FI_FP) /* fp? */ if (fir & FI_FP) /* fp? */
sta = fp15_fmul (fir, &fma, &fmb); /* yes, fp mul */ sta = fp15_fmul (fir, &fma, &fmb); /* yes, fp mul */
@ -278,9 +278,9 @@ switch (fop) { /* case on subop */
break; break;
case FOP_DIV: /* divide */ case FOP_DIV: /* divide */
if (sta = fp15_opnd (fir, ar, &fmb)) /* fetch op to FMB */ if ((sta = fp15_opnd (fir, ar, &fmb))) /* fetch op to FMB */
break; break;
if (sta = fp15_opnd (fir, ar, &fmb)) break; /* fetch op to FMB */ if ((sta = fp15_opnd (fir, ar, &fmb)))break; /* fetch op to FMB */
if (fir & FI_FP) /* fp? */ if (fir & FI_FP) /* fp? */
sta = fp15_fdiv (fir, &fma, &fmb); /* yes, fp div */ sta = fp15_fdiv (fir, &fma, &fmb); /* yes, fp div */
else sta = fp15_idiv (fir, &fma, &fmb); /* no, int div */ else sta = fp15_idiv (fir, &fma, &fmb); /* no, int div */
@ -288,7 +288,7 @@ switch (fop) { /* case on subop */
case FOP_RDIV: /* reverse divide */ case FOP_RDIV: /* reverse divide */
fmb = fma; /* FMB <- FMA */ fmb = fma; /* FMB <- FMA */
if (sta = fp15_opnd (fir, ar, &fma)) /* fetch op to FMA */ if ((sta = fp15_opnd (fir, ar, &fma))) /* fetch op to FMA */
break; break;
if (fir & FI_FP) /* fp? */ if (fir & FI_FP) /* fp? */
sta = fp15_fdiv (fir, &fma, &fmb); /* yes, fp div */ sta = fp15_fdiv (fir, &fma, &fmb); /* yes, fp div */
@ -296,7 +296,7 @@ switch (fop) { /* case on subop */
break; break;
case FOP_LD: /* load */ case FOP_LD: /* load */
if (sta = fp15_opnd (fir, ar, &fma)) /* fetch op to FMA */ if ((sta = fp15_opnd (fir, ar, &fma))) /* fetch op to FMA */
break; break;
fp15_asign (fir, &fma); /* modify A sign */ fp15_asign (fir, &fma); /* modify A sign */
if (fir & FI_FP) /* fp? */ if (fir & FI_FP) /* fp? */
@ -309,7 +309,7 @@ switch (fop) { /* case on subop */
break; break;
case FOP_FLT: /* float */ case FOP_FLT: /* float */
if (sta = fp15_opnd (fir, ar, &fma)) /* fetch op to FMA */ if ((sta = fp15_opnd (fir, ar, &fma))) /* fetch op to FMA */
break; break;
fma.exp = 35; fma.exp = 35;
fp15_asign (fir, &fma); /* adjust A sign */ fp15_asign (fir, &fma); /* adjust A sign */
@ -317,13 +317,13 @@ switch (fop) { /* case on subop */
break; break;
case FOP_FIX: /* fix */ case FOP_FIX: /* fix */
if (sta = fp15_opnd (fir, ar, &fma)) /* fetch op to FMA */ if ((sta = fp15_opnd (fir, ar, &fma))) /* fetch op to FMA */
break; break;
sta = fp15_fix (fir, &fma); /* fix */ sta = fp15_fix (fir, &fma); /* fix */
break; break;
case FOP_LFMQ: /* load FMQ */ case FOP_LFMQ: /* load FMQ */
if (sta = fp15_opnd (fir, ar, &fma)) /* fetch op to FMA */ if ((sta = fp15_opnd (fir, ar, &fma))) /* fetch op to FMA */
break; break;
dp_swap (&fma, &fmq); /* swap FMA, FMQ */ dp_swap (&fma, &fmq); /* swap FMA, FMQ */
fp15_asign (fir, &fma); /* adjust A sign */ fp15_asign (fir, &fma); /* adjust A sign */
@ -337,7 +337,7 @@ switch (fop) { /* case on subop */
sta = Write (ar, dat, WR); sta = Write (ar, dat, WR);
} }
else { /* no, load */ else { /* no, load */
if (sta = Read (ar, &dat, RD)) if ((sta = Read (ar, &dat, RD)))
break; break;
fguard = (dat >> JEA_V_GUARD) & 1; fguard = (dat >> JEA_V_GUARD) & 1;
jea = dat & JEA_EAMASK; jea = dat & JEA_EAMASK;
@ -345,7 +345,7 @@ switch (fop) { /* case on subop */
break; break;
case FOP_ADD: /* add */ case FOP_ADD: /* add */
if (sta = fp15_opnd (fir, ar, &fmb)) /* fetch op to FMB */ if ((sta = fp15_opnd (fir, ar, &fmb))) /* fetch op to FMB */
break; break;
if (fir & FI_FP) /* fp? */ if (fir & FI_FP) /* fp? */
sta = fp15_fadd (fir, &fma, &fmb, 0); /* yes, fp add */ sta = fp15_fadd (fir, &fma, &fmb, 0); /* yes, fp add */
@ -429,7 +429,7 @@ t_stat sta;
fguard = 0; /* clear guard */ fguard = 0; /* clear guard */
if (ir & FI_FP) { /* fp? */ if (ir & FI_FP) { /* fp? */
if (sta = fp15_norm (ir, a, NULL, 0)) /* normalize */ if ((sta = fp15_norm (ir, a, NULL, 0))) /* normalize */
return sta; return sta;
if (ir & FI_DP) { /* dp? */ if (ir & FI_DP) { /* dp? */
wd[0] = a->exp & DMASK; /* exponent */ wd[0] = a->exp & DMASK; /* exponent */

8
PDP18B/pdp18b_mt.c
View file

@ -353,7 +353,7 @@ switch (f) { /* case on function */
mtxb[p++] = M[xma] & 0377; mtxb[p++] = M[xma] & 0377;
} }
} /* end for */ } /* end for */
if (st = sim_tape_wrrecf (uptr, mtxb, tbc)) /* write rec, err? */ if ((st = sim_tape_wrrecf (uptr, mtxb, tbc))) /* write rec, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
else { else {
M[MT_CA] = (M[MT_CA] + wc) & DMASK; /* advance mem addr */ M[MT_CA] = (M[MT_CA] + wc) & DMASK; /* advance mem addr */
@ -363,7 +363,7 @@ switch (f) { /* case on function */
break; break;
case FN_WREOF: case FN_WREOF:
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
else uptr->USTAT = STA_EOF; else uptr->USTAT = STA_EOF;
mt_cu = mt_cu & ~CU_ERASE; /* clear erase flag */ mt_cu = mt_cu & ~CU_ERASE; /* clear erase flag */
@ -372,7 +372,7 @@ switch (f) { /* case on function */
case FN_SPACEF: /* space forward */ case FN_SPACEF: /* space forward */
do { do {
M[MT_WC] = (M[MT_WC] + 1) & DMASK; /* inc WC */ M[MT_WC] = (M[MT_WC] + 1) & DMASK; /* inc WC */
if (st = sim_tape_sprecf (uptr, &tbc)) { /* space rec fwd, err? */ if ((st = sim_tape_sprecf (uptr, &tbc))) { /* space rec fwd, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; break;
} }
@ -382,7 +382,7 @@ switch (f) { /* case on function */
case FN_SPACER: /* space reverse */ case FN_SPACER: /* space reverse */
do { do {
M[MT_WC] = (M[MT_WC] + 1) & DMASK; /* inc WC */ M[MT_WC] = (M[MT_WC] + 1) & DMASK; /* inc WC */
if (st = sim_tape_sprecr (uptr, &tbc)) { /* space rec rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) { /* space rec rev, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; break;
} }

2
PDP18B/pdp18b_stddev.c
View file

@ -594,7 +594,7 @@ if ((temp = getc (ptr_unit.fileref)) == EOF) { /* end of file? */
if (ptr_state == 0) { /* ASCII */ if (ptr_state == 0) { /* ASCII */
if (ptr_unit.flags & UNIT_RASCII) { /* want parity? */ if (ptr_unit.flags & UNIT_RASCII) { /* want parity? */
ptr_unit.buf = temp = temp & 0177; /* parity off */ ptr_unit.buf = temp = temp & 0177; /* parity off */
while (temp = temp & (temp - 1)) while ((temp = temp & (temp - 1)))
ptr_unit.buf = ptr_unit.buf ^ 0200; /* count bits */ ptr_unit.buf = ptr_unit.buf ^ 0200; /* count bits */
ptr_unit.buf = ptr_unit.buf ^ 0200; /* set even parity */ ptr_unit.buf = ptr_unit.buf ^ 0200; /* set even parity */
} }

2
PDP18B/pdp18b_sys.c
View file

@ -1009,7 +1009,7 @@ for (i = 0; opc_val[i] >= 0; i++) { /* loop thru ops */
break; break;
case I_V_OPR: /* operate */ case I_V_OPR: /* operate */
if (sp = (inst & 03730)) if ((sp = (inst & 03730)))
fprintf (of, "%s", opcode[i]); fprintf (of, "%s", opcode[i]);
fprint_opr (of, inst & 014047, I_V_OPR, sp); fprint_opr (of, inst & 014047, I_V_OPR, sp);
break; break;

2
PDP18B/pdp18b_tt1.c
View file

@ -222,7 +222,7 @@ if (ln >= 0) /* got one? rcv enab */
tmxr_poll_rx (&ttx_desc); /* poll for input */ tmxr_poll_rx (&ttx_desc); /* poll for input */
for (ln = 0; ln < TTX_MAXL; ln++) { /* loop thru lines */ for (ln = 0; ln < TTX_MAXL; ln++) { /* loop thru lines */
if (ttx_ldsc[ln].conn) { /* connected? */ if (ttx_ldsc[ln].conn) { /* connected? */
if (temp = tmxr_getc_ln (&ttx_ldsc[ln])) { /* get char */ if ((temp = tmxr_getc_ln (&ttx_ldsc[ln]))) { /* get char */
if (temp & SCPE_BREAK) /* break? */ if (temp & SCPE_BREAK) /* break? */
c = 0; c = 0;
else c = sim_tt_inpcvt (temp, TT_GET_MODE (ttox_unit[ln].flags) | TTUF_KSR); else c = sim_tt_inpcvt (temp, TT_GET_MODE (ttox_unit[ln].flags) | TTUF_KSR);

2
PDP8/pdp8_cpu.c
View file

@ -344,7 +344,7 @@ reason = 0;
while (reason == 0) { /* loop until halted */ while (reason == 0) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) if ((reason = sim_process_event ()))
break; break;
} }

8
PDP8/pdp8_ct.c
View file

@ -270,7 +270,7 @@ switch (IR & 07) { /* decode IR<9:11> */
case 6: /* KGOA */ case 6: /* KGOA */
ct_df = 0; /* clear data flag */ ct_df = 0; /* clear data flag */
if (uptr = ct_busy ()) /* op in progress? */ if ((uptr = ct_busy ())) /* op in progress? */
AC = ct_go_cont (uptr, AC); /* yes */ AC = ct_go_cont (uptr, AC); /* yes */
else AC = ct_go_start (AC); /* no, start */ else AC = ct_go_start (AC); /* no, start */
ct_updsta (NULL); ct_updsta (NULL);
@ -433,7 +433,7 @@ switch (uptr->FNC) { /* case on function */
case SRA_CRC: /* CRC */ case SRA_CRC: /* CRC */
if (ct_write) { /* write? */ if (ct_write) { /* write? */
if (st = sim_tape_wrrecf (uptr, ct_xb, ct_bptr)) /* write, err? */ if ((st = sim_tape_wrrecf (uptr, ct_xb, ct_bptr)))/* write, err? */
r = ct_map_err (uptr, st); /* map error */ r = ct_map_err (uptr, st); /* map error */
break; /* write done */ break; /* write done */
} }
@ -452,7 +452,7 @@ switch (uptr->FNC) { /* case on function */
break; /* read done */ break; /* read done */
case SRA_WFG: /* write file gap */ case SRA_WFG: /* write file gap */
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = ct_map_err (uptr, st); /* map error */ r = ct_map_err (uptr, st); /* map error */
break; break;
@ -462,7 +462,7 @@ switch (uptr->FNC) { /* case on function */
break; break;
case SRA_SRB: /* space rev blk */ case SRA_SRB: /* space rev blk */
if (st = sim_tape_sprecr (uptr, &tbc)) /* space rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) /* space rev, err? */
r = ct_map_err (uptr, st); /* map error */ r = ct_map_err (uptr, st); /* map error */
break; break;

8
PDP8/pdp8_mt.c
View file

@ -453,7 +453,7 @@ switch (f) { /* case on function */
mtxb[p++] = M[xma] & 077; mtxb[p++] = M[xma] & 077;
} }
} }
if (st = sim_tape_wrrecf (uptr, mtxb, tbc)) { /* write rec, err? */ if ((st = sim_tape_wrrecf (uptr, mtxb, tbc))) { /* write rec, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
xma = GET_EMA (mt_cu) + mt_ca; /* restore xma */ xma = GET_EMA (mt_cu) + mt_ca; /* restore xma */
} }
@ -461,14 +461,14 @@ switch (f) { /* case on function */
break; break;
case FN_WREOF: case FN_WREOF:
if (st = sim_tape_wrtmk (uptr)) /* write tmk, err? */ if ((st = sim_tape_wrtmk (uptr))) /* write tmk, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; break;
case FN_SPACEF: /* space forward */ case FN_SPACEF: /* space forward */
do { do {
mt_wc = (mt_wc + 1) & 07777; /* incr wc */ mt_wc = (mt_wc + 1) & 07777; /* incr wc */
if (st = sim_tape_sprecf (uptr, &tbc)) { /* space rec fwd, err? */ if ((st = sim_tape_sprecf (uptr, &tbc))) { /* space rec fwd, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; /* stop */ break; /* stop */
} }
@ -478,7 +478,7 @@ switch (f) { /* case on function */
case FN_SPACER: /* space reverse */ case FN_SPACER: /* space reverse */
do { do {
mt_wc = (mt_wc + 1) & 07777; /* incr wc */ mt_wc = (mt_wc + 1) & 07777; /* incr wc */
if (st = sim_tape_sprecr (uptr, &tbc)) { /* space rec rev, err? */ if ((st = sim_tape_sprecr (uptr, &tbc))) { /* space rec rev, err? */
r = mt_map_err (uptr, st); /* map error */ r = mt_map_err (uptr, st); /* map error */
break; /* stop */ break; /* stop */
} }

2
PDP8/pdp8_ttx.c
View file

@ -233,7 +233,7 @@ if (ln >= 0) /* got one? rcv enb*/
tmxr_poll_rx (&ttx_desc); /* poll for input */ tmxr_poll_rx (&ttx_desc); /* poll for input */
for (ln = 0; ln < TTX_LINES; ln++) { /* loop thru lines */ for (ln = 0; ln < TTX_LINES; ln++) { /* loop thru lines */
if (ttx_ldsc[ln].conn) { /* connected? */ if (ttx_ldsc[ln].conn) { /* connected? */
if (temp = tmxr_getc_ln (&ttx_ldsc[ln])) { /* get char */ if ((temp = tmxr_getc_ln (&ttx_ldsc[ln]))) { /* get char */
if (temp & SCPE_BREAK) /* break? */ if (temp & SCPE_BREAK) /* break? */
c = 0; c = 0;
else c = sim_tt_inpcvt (temp, TT_GET_MODE (ttox_unit[ln].flags)); else c = sim_tt_inpcvt (temp, TT_GET_MODE (ttox_unit[ln].flags));

2
S3/s3_cd.c
View file

@ -280,7 +280,7 @@ t_stat r;
if (sim_is_active (&cdr_unit)) { /* busy? */ if (sim_is_active (&cdr_unit)) { /* busy? */
sim_cancel (&cdr_unit); /* cancel */ sim_cancel (&cdr_unit); /* cancel */
if (r = cdr_svc (&cdr_unit)) return r; /* process */ if ((r = cdr_svc (&cdr_unit))) return r; /* process */
} }
if (((cdp_unit.flags & UNIT_ATT) != 0 || if (((cdp_unit.flags & UNIT_ATT) != 0 ||

2
S3/s3_cpu.c
View file

@ -527,7 +527,7 @@ reason = 0;
while (reason == 0) { /* loop until halted */ while (reason == 0) { /* loop until halted */
if (sim_interval <= 0) { /* check clock queue */ if (sim_interval <= 0) { /* check clock queue */
if (reason = sim_process_event ()) break; if ((reason = sim_process_event ())) break;
} }
if (int_req) { /* interrupt? */ if (int_req) { /* interrupt? */

10
S3/s3_disk.c
View file

@ -298,7 +298,7 @@ int32 dsk (int32 disk, int32 op, int32 m, int32 n, int32 data)
addr++; addr++;
} }
if ((sect == 55) ) { /* HJS MODS */ if (sect == 55) { /* HJS MODS */
S = sect; S = sect;
N = nsects - i - 2; N = nsects - i - 2;
if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */ if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */
@ -349,7 +349,7 @@ int32 dsk (int32 disk, int32 op, int32 m, int32 n, int32 data)
diskerr[disk] |= 0x0800; diskerr[disk] |= 0x0800;
break; break;
} }
if ((sect == 55) ) { /* HJS MODS */ if (sect == 55) { /* HJS MODS */
S = sect; S = sect;
N = nsects - i - 2; N = nsects - i - 2;
if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */ if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */
@ -392,7 +392,7 @@ int32 dsk (int32 disk, int32 op, int32 m, int32 n, int32 data)
diskerr[disk] |= 0x0400; diskerr[disk] |= 0x0400;
break; break;
} }
if ((sect == 55) ) { /* HJS MODS */ if (sect == 55) { /* HJS MODS */
S = sect; S = sect;
N = nsects - i - 2; N = nsects - i - 2;
if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */ if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */
@ -434,7 +434,7 @@ int32 dsk (int32 disk, int32 op, int32 m, int32 n, int32 data)
diskerr[disk] |= 0x0400; diskerr[disk] |= 0x0400;
break; break;
} }
if ((sect == 55) ) { if (sect == 55) {
S = sect; S = sect;
N = nsects - i - 2; N = nsects - i - 2;
if (N > 0) diskerr[disk] |= 0x0020; if (N > 0) diskerr[disk] |= 0x0020;
@ -486,7 +486,7 @@ int32 dsk (int32 disk, int32 op, int32 m, int32 n, int32 data)
found[disk] = 1; found[disk] = 1;
if (res == data) if (res == data)
break; break;
if ((sect == 55) ) { /* HJS MODS */ if (sect == 55) { /* HJS MODS */
S = sect; S = sect;
N = nsects - i - 2; N = nsects - i - 2;
if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */ if (N > -1) diskerr[disk] |= 0x0020; /* end of cyl. */

186
SDS/sds_cpu.c
View file

@ -385,14 +385,14 @@ while (reason == 0) { /* loop until halted */
} }
if (sim_interval <= 0) { /* event queue? */ if (sim_interval <= 0) { /* event queue? */
if (reason = sim_process_event ()) /* process */ if ((reason = sim_process_event ())) /* process */
break; break;
int_reqhi = api_findreq (); /* recalc int req */ int_reqhi = api_findreq (); /* recalc int req */
chan_req = chan_testact (); /* recalc chan act */ chan_req = chan_testact (); /* recalc chan act */
} }
if (chan_req) { /* channel request? */ if (chan_req) { /* channel request? */
if (reason = chan_process ()) /* process */ if ((reason = chan_process ())) /* process */
break; break;
int_reqhi = api_findreq (); /* recalc int req */ int_reqhi = api_findreq (); /* recalc int req */
chan_req = chan_testact (); /* recalc chan act */ chan_req = chan_testact (); /* recalc chan act */
@ -506,7 +506,7 @@ if (inst & I_POP) { /* POP? */
} }
else { /* normal POP */ else { /* normal POP */
dat = (OV << 23) | dat; /* ov in <0> */ dat = (OV << 23) | dat; /* ov in <0> */
if (r = Write (0, dat)) if ((r = Write (0, dat)))
return r; return r;
} }
} }
@ -525,49 +525,49 @@ switch (op) { /* case on opcode */
/* Loads and stores */ /* Loads and stores */
case LDA: case LDA:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &A)) /* get operand */ if ((r = Read (va, &A))) /* get operand */
return r; return r;
break; break;
case LDB: case LDB:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &B)) /* get operand */ if ((r = Read (va, &B))) /* get operand */
return r; return r;
break; break;
case LDX: case LDX:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &X)) /* get operand */ if ((r = Read (va, &X))) /* get operand */
return r; return r;
break; break;
case STA: case STA:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Write (va, A)) /* write operand */ if ((r = Write (va, A))) /* write operand */
return r; return r;
break; break;
case STB: case STB:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Write (va, B)) /* write operand */ if ((r = Write (va, B))) /* write operand */
return r; return r;
break; break;
case STX: case STX:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Write (va, X)) /* write operand */ if ((r = Write (va, X))) /* write operand */
return r; return r;
break; break;
case EAX: case EAX:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (nml_mode || usr_mode) /* normal or user? */ if (nml_mode || usr_mode) /* normal or user? */
X = (X & ~VA_MASK) | (va & VA_MASK); /* only 14b */ X = (X & ~VA_MASK) | (va & VA_MASK); /* only 14b */
@ -575,11 +575,11 @@ switch (op) { /* case on opcode */
break; break;
case XMA: case XMA:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
if (r = Write (va, A)) /* write A */ if ((r = Write (va, A))) /* write A */
return r; return r;
A = dat; /* load A */ A = dat; /* load A */
break; break;
@ -587,95 +587,95 @@ switch (op) { /* case on opcode */
/* Arithmetic and logical */ /* Arithmetic and logical */
case ADD: case ADD:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
A = Add24 (A, dat, 0); /* add */ A = Add24 (A, dat, 0); /* add */
break; break;
case ADC: case ADC:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
OV = 0; /* clear overflow */ OV = 0; /* clear overflow */
A = Add24 (A, dat, X >> 23); /* add with carry */ A = Add24 (A, dat, X >> 23); /* add with carry */
break; break;
case SUB: case SUB:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
A = Add24 (A, dat ^ DMASK, 1); /* subtract */ A = Add24 (A, dat ^ DMASK, 1); /* subtract */
break; break;
case SUC: case SUC:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
OV = 0; /* clear overflow */ OV = 0; /* clear overflow */
A = Add24 (A, dat ^ DMASK, X >> 23); /* sub with carry */ A = Add24 (A, dat ^ DMASK, X >> 23); /* sub with carry */
break; break;
case ADM: case ADM:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
dat = AddM24 (dat, A); /* mem + A */ dat = AddM24 (dat, A); /* mem + A */
if (r = Write (va, dat)) /* rewrite */ if ((r = Write (va, dat))) /* rewrite */
return r; return r;
break; break;
case MIN: case MIN:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
dat = AddM24 (dat, 1); /* mem + 1 */ dat = AddM24 (dat, 1); /* mem + 1 */
if (r = Write (va, dat)) /* rewrite */ if ((r = Write (va, dat))) /* rewrite */
return r; return r;
break; break;
case MUL: case MUL:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
Mul48 (A, dat); /* multiply */ Mul48 (A, dat); /* multiply */
break; break;
case DIV: case DIV:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
Div48 (A, B, dat); /* divide */ Div48 (A, B, dat); /* divide */
break; break;
case ETR: case ETR:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
A = A & dat; /* and */ A = A & dat; /* and */
break; break;
case MRG: case MRG:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
A = A | dat; /* or */ A = A | dat; /* or */
break; break;
case EOR: case EOR:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
A = A ^ dat; /* xor */ A = A ^ dat; /* xor */
break; break;
@ -683,75 +683,75 @@ switch (op) { /* case on opcode */
/* Skips */ /* Skips */
case SKE: case SKE:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
if (A == dat) /* if A = op, skip */ if (A == dat) /* if A = op, skip */
P = (P + 1) & VA_MASK; P = (P + 1) & VA_MASK;
break; break;
case SKG: case SKG:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
if (SXT (A) > SXT (dat)) /* if A > op, skip */ if (SXT (A) > SXT (dat)) /* if A > op, skip */
P = (P + 1) & VA_MASK; P = (P + 1) & VA_MASK;
break; break;
case SKM: case SKM:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
if (((A ^ dat) & B) == 0) /* if A = op masked */ if (((A ^ dat) & B) == 0) /* if A = op masked */
P = (P + 1) & VA_MASK; P = (P + 1) & VA_MASK;
break; break;
case SKA: case SKA:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
if ((A & dat) == 0) /* if !(A & op), skip */ if ((A & dat) == 0) /* if !(A & op), skip */
P = (P + 1) & VA_MASK; P = (P + 1) & VA_MASK;
break; break;
case SKB: case SKB:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
if ((B & dat) == 0) /* if !(B & op), skip */ if ((B & dat) == 0) /* if !(B & op), skip */
P = (P + 1) & VA_MASK; P = (P + 1) & VA_MASK;
break; break;
case SKN: case SKN:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
if (dat & SIGN) /* if op < 0, skip */ if (dat & SIGN) /* if op < 0, skip */
P = (P + 1) & VA_MASK; P = (P + 1) & VA_MASK;
break; break;
case SKR: case SKR:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
dat = AddM24 (dat, DMASK); /* decr operand */ dat = AddM24 (dat, DMASK); /* decr operand */
if (r = Write (va, dat)) /* rewrite */ if ((r = Write (va, dat))) /* rewrite */
return r; return r;
if (dat & SIGN) /* if op < 0, skip */ if (dat & SIGN) /* if op < 0, skip */
P = (P + 1) & VA_MASK; P = (P + 1) & VA_MASK;
break; break;
case SKD: case SKD:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
if (SXT_EXP (B) < SXT_EXP (dat)) { /* B < dat? */ if (SXT_EXP (B) < SXT_EXP (dat)) { /* B < dat? */
X = (dat - B) & DMASK; /* X = dat - B */ X = (dat - B) & DMASK; /* X = dat - B */
@ -774,29 +774,29 @@ switch (op) { /* case on opcode */
exu_cnt = exu_cnt + 1; /* count chained EXU */ exu_cnt = exu_cnt + 1; /* count chained EXU */
if (exu_cnt > exu_lim) /* too many? */ if (exu_cnt > exu_lim) /* too many? */
return STOP_EXULIM; return STOP_EXULIM;
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
inst = dat; inst = dat;
goto EXU_LOOP; goto EXU_LOOP;
case BRU: case BRU:
if (nml_mode && (inst & I_IND)) api_dismiss (); /* normal BRU*, dism */ if (nml_mode && (inst & I_IND)) api_dismiss (); /* normal BRU*, dism */
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
PCQ_ENTRY; PCQ_ENTRY;
P = va & VA_MASK; /* branch */ P = va & VA_MASK; /* branch */
break; break;
case BRX: case BRX:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
X = (X + 1) & DMASK; /* incr X */ X = (X + 1) & DMASK; /* incr X */
if (X & I_IND) { /* bit 9 set? */ if (X & I_IND) { /* bit 9 set? */
if (r = Read (va, &dat)) /* test dest access */ if ((r = Read (va, &dat))) /* test dest access */
return r; return r;
PCQ_ENTRY; PCQ_ENTRY;
P = va & VA_MASK; /* branch */ P = va & VA_MASK; /* branch */
@ -804,22 +804,22 @@ switch (op) { /* case on opcode */
break; break;
case BRM: case BRM:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
dat = (EM3 << 18) | (EM2 << 15) | pc; /* form return word */ dat = (EM3 << 18) | (EM2 << 15) | pc; /* form return word */
if (!nml_mode && !usr_mode) /* monitor mode? */ if (!nml_mode && !usr_mode) /* monitor mode? */
dat = dat | (mode << 23) | (OV << 21); dat = dat | (mode << 23) | (OV << 21);
else dat = dat | (OV << 23); /* normal or user */ else dat = dat | (OV << 23); /* normal or user */
if (r = Write (va, dat)) /* write ret word */ if ((r = Write (va, dat))) /* write ret word */
return r; return r;
PCQ_ENTRY; PCQ_ENTRY;
P = (va + 1) & VA_MASK; /* branch */ P = (va + 1) & VA_MASK; /* branch */
break; break;
case BRR: case BRR:
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
PCQ_ENTRY; PCQ_ENTRY;
P = (dat + 1) & VA_MASK; /* branch */ P = (dat + 1) & VA_MASK; /* branch */
@ -837,9 +837,9 @@ switch (op) { /* case on opcode */
case BRI: case BRI:
if (!nml_mode && usr_mode) /* priv inst */ if (!nml_mode && usr_mode) /* priv inst */
return MM_PRVINS; return MM_PRVINS;
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
api_dismiss (); /* dismiss hi api */ api_dismiss (); /* dismiss hi api */
PCQ_ENTRY; PCQ_ENTRY;
@ -909,7 +909,7 @@ switch (op) { /* case on opcode */
/* Shifts */ /* Shifts */
case RSH: case RSH:
if (r = EaSh (inst, &va)) /* decode eff addr */ if ((r = EaSh (inst, &va))) /* decode eff addr */
return r; return r;
shf_op = I_GETSHFOP (va); /* get eff op */ shf_op = I_GETSHFOP (va); /* get eff op */
sc = va & I_SHFMSK; /* get eff count */ sc = va & I_SHFMSK; /* get eff count */
@ -934,7 +934,7 @@ switch (op) { /* case on opcode */
break; break;
case LSH: case LSH:
if (r = EaSh (inst, &va)) /* decode eff addr */ if ((r = EaSh (inst, &va))) /* decode eff addr */
return r; return r;
shf_op = I_GETSHFOP (va); /* get eff op */ shf_op = I_GETSHFOP (va); /* get eff op */
sc = va & I_SHFMSK; /* get eff count */ sc = va & I_SHFMSK; /* get eff count */
@ -989,11 +989,11 @@ switch (op) { /* case on opcode */
case MIW: case MIY: case MIW: case MIY:
if (!nml_mode && usr_mode) /* priv inst */ if (!nml_mode && usr_mode) /* priv inst */
return MM_PRVINS; return MM_PRVINS;
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
if (r = op_miwy (inst, dat)) /* process inst */ if ((r = op_miwy (inst, dat))) /* process inst */
return r; return r;
int_reqhi = api_findreq (); /* recalc int req */ int_reqhi = api_findreq (); /* recalc int req */
chan_req = chan_testact (); /* recalc chan act */ chan_req = chan_testact (); /* recalc chan act */
@ -1002,11 +1002,11 @@ switch (op) { /* case on opcode */
case WIM: case YIM: case WIM: case YIM:
if (!nml_mode && usr_mode) /* priv inst */ if (!nml_mode && usr_mode) /* priv inst */
return MM_PRVINS; return MM_PRVINS;
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = op_wyim (inst, &dat)) /* process inst */ if ((r = op_wyim (inst, &dat))) /* process inst */
return r; return r;
if (r = Write (va, dat)) if ((r = Write (va, dat)))
return r; /* write result */ return r; /* write result */
int_reqhi = api_findreq (); /* recalc int req */ int_reqhi = api_findreq (); /* recalc int req */
chan_req = chan_testact (); /* recalc chan act */ chan_req = chan_testact (); /* recalc chan act */
@ -1015,7 +1015,7 @@ switch (op) { /* case on opcode */
case EOM: case EOD: case EOM: case EOD:
if (!nml_mode && usr_mode) /* priv inst */ if (!nml_mode && usr_mode) /* priv inst */
return MM_PRVINS; return MM_PRVINS;
if (r = op_eomd (inst)) /* process inst */ if ((r = op_eomd (inst))) /* process inst */
return r; return r;
int_reqhi = api_findreq (); /* recalc int req */ int_reqhi = api_findreq (); /* recalc int req */
chan_req = chan_testact (); /* recalc chan act */ chan_req = chan_testact (); /* recalc chan act */
@ -1025,11 +1025,11 @@ switch (op) { /* case on opcode */
case POT: case POT:
if (!nml_mode && usr_mode) /* priv inst */ if (!nml_mode && usr_mode) /* priv inst */
return MM_PRVINS; return MM_PRVINS;
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
if (r = op_pot (dat)) /* process inst */ if ((r = op_pot (dat))) /* process inst */
return r; return r;
int_reqhi = api_findreq (); /* recalc int req */ int_reqhi = api_findreq (); /* recalc int req */
chan_req = chan_testact (); /* recalc chan act */ chan_req = chan_testact (); /* recalc chan act */
@ -1038,11 +1038,11 @@ switch (op) { /* case on opcode */
case PIN: case PIN:
if (!nml_mode && usr_mode) /* priv inst */ if (!nml_mode && usr_mode) /* priv inst */
return MM_PRVINS; return MM_PRVINS;
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = op_pin (&dat)) /* process inst */ if ((r = op_pin (&dat))) /* process inst */
return r; return r;
if (r = Write (va, dat)) /* write result */ if ((r = Write (va, dat))) /* write result */
return r; return r;
int_reqhi = api_findreq (); /* recalc int req */ int_reqhi = api_findreq (); /* recalc int req */
chan_req = chan_testact (); /* recalc chan act */ chan_req = chan_testact (); /* recalc chan act */
@ -1051,7 +1051,7 @@ switch (op) { /* case on opcode */
case SKS: case SKS:
if (!nml_mode && usr_mode) /* priv inst */ if (!nml_mode && usr_mode) /* priv inst */
return MM_PRVINS; return MM_PRVINS;
if (r = op_sks (inst, &dat)) /* process inst */ if ((r = op_sks (inst, &dat))) /* process inst */
return r; return r;
if (dat) if (dat)
P = (P + 1) & VA_MASK; P = (P + 1) & VA_MASK;
@ -1085,7 +1085,7 @@ for (i = 0; i < ind_lim; i++) { /* count indirects */
hst[hst_p].ea = *addr; hst[hst_p].ea = *addr;
return SCPE_OK; return SCPE_OK;
} }
if (r = Read (va, &wd)) /* read ind; fails? */ if ((r = Read (va, &wd))) /* read ind; fails? */
return r; return r;
va = (va & VA_USR) | (wd & XVA_MASK); va = (va & VA_USR) | (wd & XVA_MASK);
} }
@ -1112,7 +1112,7 @@ for (i = 0; i < ind_lim; i++) { /* count indirects */
} }
if (wd & I_IDX) if (wd & I_IDX)
va = (va & VA_USR) | ((va + X) & VA_MASK); va = (va & VA_USR) | ((va + X) & VA_MASK);
if (r = Read (va, &wd)) /* read ind; fails? */ if ((r = Read (va, &wd))) /* read ind; fails? */
return r; return r;
va = (va & VA_USR) | (wd & XVA_MASK); va = (va & VA_USR) | (wd & XVA_MASK);
} }
@ -1569,12 +1569,12 @@ if (op == MIN) /* incr */
else if (op == SKR) /* decr */ else if (op == SKR) /* decr */
val = DMASK; val = DMASK;
else return STOP_RTCINS; /* can't do it */ else return STOP_RTCINS; /* can't do it */
if (r = Ea (inst, &va)) /* decode eff addr */ if ((r = Ea (inst, &va))) /* decode eff addr */
return r; return r;
if (r = Read (va, &dat)) /* get operand */ if ((r = Read (va, &dat))) /* get operand */
return r; return r;
dat = AddM24 (dat, val); /* mem +/- 1 */ dat = AddM24 (dat, val); /* mem +/- 1 */
if (r = Write (va, dat)) /* rewrite */ if ((r = Write (va, dat))) /* rewrite */
return r; return r;
if (dat == 0) /* set clk sync int */ if (dat == 0) /* set clk sync int */
int_req = int_req | INT_RTCS; int_req = int_req | INT_RTCS;

4
SDS/sds_dsk.c
View file

@ -204,7 +204,7 @@ switch (fnc) { /* case on function */
case IO_READ: case IO_READ:
xfr_req = xfr_req & ~XFR_DSK; /* clr xfr req */ xfr_req = xfr_req & ~XFR_DSK; /* clr xfr req */
if (dsk_bptr >= dsk_blnt) { /* no more data? */ if (dsk_bptr >= dsk_blnt) { /* no more data? */
if (r = dsk_read_buf (inst)) /* read sector */ if ((r = dsk_read_buf (inst))) /* read sector */
return r; return r;
} }
dsk_wptr = dsk_bptr >> 2; /* word pointer */ dsk_wptr = dsk_bptr >> 2; /* word pointer */
@ -219,7 +219,7 @@ switch (fnc) { /* case on function */
case IO_WRITE: case IO_WRITE:
xfr_req = xfr_req & ~XFR_DSK; /* clr xfr req */ xfr_req = xfr_req & ~XFR_DSK; /* clr xfr req */
if (dsk_bptr >= (DSK_NUMWD * 4)) { /* full? */ if (dsk_bptr >= (DSK_NUMWD * 4)) { /* full? */
if (r = dsk_write_buf (inst)) /* write sector */ if ((r = dsk_write_buf (inst))) /* write sector */
return r; return r;
} }
dsk_wptr = dsk_bptr >> 2; /* word pointer */ dsk_wptr = dsk_bptr >> 2; /* word pointer */

4
SDS/sds_io.c
View file

@ -336,7 +336,7 @@ switch (mod) {
chan_mode[ch] = chan_uar[ch] = 0; chan_mode[ch] = chan_uar[ch] = 0;
if (ch >= CHAN_E) if (ch >= CHAN_E)
chan_mode[ch] = CHM_CE; chan_mode[ch] = CHM_CE;
if (r = dev_dsp[dev][ch] (IO_CONN, inst, NULL)) /* connect */ if ((r = dev_dsp[dev][ch] (IO_CONN, inst, NULL)))/* connect */
return r; return r;
if ((inst & I_IND) || (ch >= CHAN_C)) { /* C-H? alert ilc */ if ((inst & I_IND) || (ch >= CHAN_C)) { /* C-H? alert ilc */
alert = POT_ILCY + ch; alert = POT_ILCY + ch;
@ -958,7 +958,7 @@ for (i = 0; i < NUM_CHAN; i++) {
/* Test each device for conflict; add to map; init tables */ /* Test each device for conflict; add to map; init tables */
for (i = 0; dptr = sim_devices[i]; i++) { /* loop thru devices */ for (i = 0; (dptr = sim_devices[i]); i++) { /* loop thru devices */
dibp = (DIB *) dptr->ctxt; /* get DIB */ dibp = (DIB *) dptr->ctxt; /* get DIB */
if ((dibp == NULL) || (dptr->flags & DEV_DIS)) /* exist, enabled? */ if ((dibp == NULL) || (dptr->flags & DEV_DIS)) /* exist, enabled? */
continue; continue;

2
SDS/sds_lp.c
View file

@ -177,7 +177,7 @@ switch (fnc) { /* case function */
t = I_GETSKCND (inst); /* sks cond */ t = I_GETSKCND (inst); /* sks cond */
if (((t == 020) && (!CHP (7, lpt_cct[lpt_ccp]))) || /* 14062: !ch 7 */ if (((t == 020) && (!CHP (7, lpt_cct[lpt_ccp]))) || /* 14062: !ch 7 */
((t == 010) && (lpt_unit.flags & UNIT_ATT)) || /* 12062: !online */ ((t == 010) && (lpt_unit.flags & UNIT_ATT)) || /* 12062: !online */
(t == 004) && !lpt_err) /* 11062: !err */ ((t == 004) && !lpt_err)) /* 11062: !err */
*dat = 1; *dat = 1;
break; break;

4
SDS/sds_mt.c
View file

@ -235,14 +235,14 @@ switch (fnc) { /* case function */
case IO_DISC: /* disconnect */ case IO_DISC: /* disconnect */
sim_cancel (uptr); /* no more xfr's */ sim_cancel (uptr); /* no more xfr's */
if (inst & DEV_OUT) { /* write? */ if (inst & DEV_OUT) { /* write? */
if (r = mt_wrend (inst)) /* end record */ if ((r = mt_wrend (inst))) /* end record */
return r; return r;
} }
break; break;
case IO_WREOR: /* write eor */ case IO_WREOR: /* write eor */
chan_set_flag (mt_dib.chan, CHF_EOR); /* set eor flg */ chan_set_flag (mt_dib.chan, CHF_EOR); /* set eor flg */
if (r = mt_wrend (inst)) /* end record */ if ((r = mt_wrend (inst))) /* end record */
return r; return r;
mt_gap = 1; /* in gap */ mt_gap = 1; /* in gap */
sim_activate (uptr, mt_gtime); /* start timer */ sim_activate (uptr, mt_gtime); /* start timer */

2
SDS/sds_mux.c
View file

@ -363,7 +363,7 @@ if (ln >= 0) { /* got one? */
tmxr_poll_rx (&mux_desc); /* poll for input */ tmxr_poll_rx (&mux_desc); /* poll for input */
for (ln = 0; ln < MUX_NUMLIN; ln++) { /* loop thru lines */ for (ln = 0; ln < MUX_NUMLIN; ln++) { /* loop thru lines */
if (mux_ldsc[ln].conn) { /* connected? */ if (mux_ldsc[ln].conn) { /* connected? */
if (c = tmxr_getc_ln (&mux_ldsc[ln])) { /* get char */ if ((c = tmxr_getc_ln (&mux_ldsc[ln]))) { /* get char */
if (mux_sta[ln] & MUX_SCHP) /* already got one? */ if (mux_sta[ln] & MUX_SCHP) /* already got one? */
mux_sta[ln] = mux_sta[ln] | MUX_SOVR; /* overrun */ mux_sta[ln] = mux_sta[ln] | MUX_SOVR; /* overrun */
else mux_sta[ln] = mux_sta[ln] | MUX_SCHP; /* char pending */ else mux_sta[ln] = mux_sta[ln] | MUX_SCHP; /* char pending */

2
SDS/sds_stddev.c
View file

@ -395,7 +395,7 @@ t_stat r = SCPE_OK;
if (ptp_ldr) { /* need leader? */ if (ptp_ldr) { /* need leader? */
for (i = 0; i < 12; i++) { /* punch leader */ for (i = 0; i < 12; i++) { /* punch leader */
if (r = ptp_out (0)) if ((r = ptp_out (0)))
break; break;
} }
} }

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