From 0fa5807e1dae435c129b9e94a09f89f6bff3775d Mon Sep 17 00:00:00 2001
From: Seth Morabito <web@loomcom.com>
Date: Mon, 28 May 2018 11:58:42 -0700
Subject: [PATCH] 3b2: Fix coverity scan issues

---
 3B2/3b2_ctc.c   | 43 ++++++++++++++++++++++++++++++-------------
 3B2/3b2_ctc.h   |  1 +
 3B2/3b2_iu.c    |  3 +--
 3B2/3b2_ports.c | 10 +++++-----
 4 files changed, 37 insertions(+), 20 deletions(-)

diff --git a/3B2/3b2_ctc.c b/3B2/3b2_ctc.c
index 2a6026da..e7d0f58c 100644
--- a/3B2/3b2_ctc.c
+++ b/3B2/3b2_ctc.c
@@ -260,6 +260,7 @@ static void ctc_cmd(uint8 cid,
     t_seccnt secrw = 0;
     struct vtoc vtoc = {0};
     struct pdinfo pdinfo = {0};
+    t_stat result;
 
     uint32 lba;   /* Logical Block Address */
 
@@ -486,13 +487,18 @@ static void ctc_cmd(uint8 cid,
                 sec_buf[j] = pread_b(rqe->address + (b * 512) + j);
             }
             lba = blkno + b;
-            sim_debug(TRACE_DBG, &ctc_dev,
-                      "[ctc_cmd] ... CTC_WRITE: 512 bytes at block %d (0x%x)\n",
-                      lba, lba);
-            sim_disk_wrsect(&ctc_unit, lba, sec_buf, &secrw, 1);
+            result = sim_disk_wrsect(&ctc_unit, lba, sec_buf, &secrw, 1);
+            if (result == SCPE_OK) {
+                sim_debug(TRACE_DBG, &ctc_dev,
+                          "[ctc_cmd] ... CTC_WRITE: 512 bytes at block %d (0x%x)\n",
+                          lba, lba);
+                cqe->opcode = CTC_SUCCESS;
+            } else {
+                cqe->opcode = CTC_RWERROR;
+                break;
+            }
         }
 
-        cqe->opcode = CTC_SUCCESS;
         break;
     case CTC_READ:
         sim_debug(TRACE_DBG, &ctc_dev,
@@ -518,17 +524,28 @@ static void ctc_cmd(uint8 cid,
         for (b = 0; b < rqe->byte_count / 512; b++) {
             ctc_state[dev].time += 10;
             lba = blkno + b;
-            sim_debug(TRACE_DBG, &ctc_dev,
-                      "[ctc_cmd] ... CTC_READ: 512 bytes from block %d (0x%x)\n",
-                      lba, lba);
-            sim_disk_rdsect(&ctc_unit, lba, sec_buf, &secrw, 1);
-            for (j = 0; j < 512; j++) {
-                /* Drain the buffer */
-                pwrite_b(rqe->address + (b * 512) + j, sec_buf[j]);
+            result = sim_disk_rdsect(&ctc_unit, lba, sec_buf, &secrw, 1);
+            if (result == SCPE_OK) {
+                sim_debug(TRACE_DBG, &ctc_dev,
+                          "[ctc_cmd] ... CTC_READ: 512 bytes from block %d (0x%x)\n",
+                          lba, lba);
+                for (j = 0; j < 512; j++) {
+                    /* Drain the buffer */
+                    pwrite_b(rqe->address + (b * 512) + j, sec_buf[j]);
+                }
+            } else {
+                sim_debug(TRACE_DBG, &ctc_dev,
+                          "[ctc_cmd] Error reading sector at address %d. Giving up\n", lba);
+                break;
             }
         }
 
-        cqe->opcode = CTC_SUCCESS;
+        if (result == SCPE_OK) {
+            cqe->opcode = CTC_SUCCESS;
+        } else {
+            cqe->opcode = CTC_RWERROR;
+        }
+
         break;
     case CTC_CONFIG:
         sim_debug(TRACE_DBG, &ctc_dev,
diff --git a/3B2/3b2_ctc.h b/3B2/3b2_ctc.h
index 7b0d6556..14e3b401 100644
--- a/3B2/3b2_ctc.h
+++ b/3B2/3b2_ctc.h
@@ -75,6 +75,7 @@
 #define CTC_HWERROR     32
 #define CTC_RDONLY      33
 #define CTC_NOTREADY    36
+#define CTC_RWERROR     37
 #define CTC_NOMEDIA     42
 
 /* VTOC values */
diff --git a/3B2/3b2_iu.c b/3B2/3b2_iu.c
index 5b17d773..7cc4c8ea 100644
--- a/3B2/3b2_iu.c
+++ b/3B2/3b2_iu.c
@@ -538,7 +538,7 @@ t_stat iu_svc_timer(UNIT *uptr)
 uint32 iu_read(uint32 pa, size_t size)
 {
     uint8 reg, modep;
-    uint32 data;
+    uint32 data = 0;
 
     reg = (uint8) (pa - IUBASE);
 
@@ -621,7 +621,6 @@ uint32 iu_read(uint32 pa, size_t size)
         csr_data &= ~CSRDMA;
         break;
     default:
-        data = 0;
         break;
     }
 
diff --git a/3B2/3b2_ports.c b/3B2/3b2_ports.c
index ff571ec3..90506ca0 100644
--- a/3B2/3b2_ports.c
+++ b/3B2/3b2_ports.c
@@ -463,7 +463,7 @@ static void ports_cmd(uint8 cid, cio_entry *rentry, uint8 *rapp_data)
  */
 static void ports_update_conn(uint32 ln)
 {
-    cio_entry centry;
+    cio_entry centry = {0};
     uint8 cid;
     uint8 app_data[4] = {0};
 
@@ -499,7 +499,7 @@ static void ports_update_conn(uint32 ln)
 
 void ports_sysgen(uint8 cid)
 {
-    cio_entry cqe;
+    cio_entry cqe = {0};
     uint8 app_data[4] = {0};
 
     cqe.opcode = 3; /* Sysgen success! */
@@ -515,7 +515,7 @@ void ports_sysgen(uint8 cid)
 
 void ports_express(uint8 cid)
 {
-    cio_entry rqe;
+    cio_entry rqe = {0};
     uint8 app_data[4] = {0};
     cio_rexpress(cid, PPQESIZE, &rqe, app_data);
     ports_cmd(cid, &rqe, app_data);
@@ -524,7 +524,7 @@ void ports_express(uint8 cid)
 void ports_full(uint8 cid)
 {
     uint32 i;
-    cio_entry rqe;
+    cio_entry rqe = {0};
     uint8 app_data[4] = {0};
 
     for (i = 0; i < PORTS_LINES; i++) {
@@ -745,7 +745,7 @@ t_stat ports_xmt_svc(UNIT *uptr)
     uint8 cid, ln;
     char c;
     t_bool tx = FALSE; /* Did a tx ever occur? */
-    cio_entry centry;
+    cio_entry centry = {0};
     uint8 app_data[4] = {0};
     uint32 wait = 0x7fffffff;