All VAX: Adjust sim_interval by reasonable amount for string instructions

Previously sim_interval was adjusted by 1 plus the total number of bytes
referenced in string instructions (SCANC, SPANC, LOCC, SKPC, CMPC3,
CMPC5, MOVC3, MOVC5).  Since the amount of data that a string
instruction can reference is arbitrarily large (32bit size), the adjustment
to sim_interval could be ridiculously excessive.  This can result in wild
variances in clock calibration when large string data are referenced.
This commit is contained in:
Mark Pizzolato 2017-01-17 15:58:55 -08:00
parent d9688833f9
commit 1555056396
3 changed files with 11 additions and 8 deletions

View file

@ -263,6 +263,7 @@ int32 ibufl, ibufh; /* prefetch buf */
int32 ibcnt, ppc; /* prefetch ctl */
uint32 cpu_idle_mask = VAX_IDLE_VMS; /* idle mask */
uint32 cpu_idle_type = 1; /* default VMS */
int32 extra_bytes; /* bytes referenced by current string instruction */
jmp_buf save_env;
REG *pcq_r = NULL; /* PC queue reg ptr */
int32 pcq[PCQ_SIZE] = { 0 }; /* PC queue */
@ -702,7 +703,8 @@ for ( ;; ) {
ABORT (STOP_IBKPT); /* stop simulation */
}
sim_interval = sim_interval - 1; /* count instr */
sim_interval = sim_interval - (1 + (extra_bytes>>5));/* count instr */
extra_bytes = 0; /* digest string count */
GET_ISTR (opc, L_BYTE); /* get opcode */
if (opc == 0xFD) { /* 2 byte op? */
GET_ISTR (opc, L_BYTE); /* get second byte */

View file

@ -865,7 +865,7 @@ switch (R[5] & MVC_M_STATE) { /* case on state */
mlnt[2] = R[2] - mlnt[0] - mlnt[1]; /* tail */
for (i = 0; i < 3; i++) { /* head, align, tail */
lnt = looplnt[i]; /* length for loop */
for (j = 0; j < mlnt[i]; j = j + lnt, sim_interval--) {
for (j = 0; j < mlnt[i]; j = j + lnt, extra_bytes++) {
wd = Read (R[1], lnt, RA); /* read src */
Write (R[3], wd, lnt, WA); /* write dst */
R[1] = R[1] + lnt; /* inc src addr */
@ -883,7 +883,7 @@ switch (R[5] & MVC_M_STATE) { /* case on state */
mlnt[2] = R[2] - mlnt[0] - mlnt[1]; /* tail */
for (i = 0; i < 3; i++) { /* head, align, tail */
lnt = looplnt[i]; /* length for loop */
for (j = 0; j < mlnt[i]; j = j + lnt, sim_interval--) {
for (j = 0; j < mlnt[i]; j = j + lnt, extra_bytes++) {
wd = Read (R[1] - lnt, lnt, RA); /* read src */
Write (R[3] - lnt, wd, lnt, WA); /* write dst */
R[1] = R[1] - lnt; /* dec src addr */
@ -909,7 +909,7 @@ switch (R[5] & MVC_M_STATE) { /* case on state */
fill = fill & BMASK; /* fill for loop */
if (lnt == L_LONG)
fill = (((uint32) fill) << 24) | (fill << 16) | (fill << 8) | fill;
for (j = 0; j < mlnt[i]; j = j + lnt, sim_interval--) {
for (j = 0; j < mlnt[i]; j = j + lnt, extra_bytes++) {
Write (R[3], fill, lnt, WA); /* write fill */
R[3] = R[3] + lnt; /* inc dst addr */
R[4] = R[4] - lnt; /* dec fill lnt */
@ -973,7 +973,7 @@ else {
PSL = PSL | PSL_FPD;
}
R[2] = R[2] & STR_LNMASK; /* mask src2len */
for (s1 = s2 = 0; ((R[0] | R[2]) & STR_LNMASK) != 0; sim_interval--) {
for (s1 = s2 = 0; ((R[0] | R[2]) & STR_LNMASK) != 0; extra_bytes++) {
if (R[0] & STR_LNMASK) /* src1? read */
s1 = Read (R[1], L_BYTE, RA);
else s1 = fill; /* no, use fill */
@ -1023,7 +1023,7 @@ else {
R[1] = opnd[2]; /* src addr */
PSL = PSL | PSL_FPD;
}
for ( ; (R[0] & STR_LNMASK) != 0; sim_interval-- ) { /* loop thru string */
for ( ; (R[0] & STR_LNMASK) != 0; extra_bytes++ ) { /* loop thru string */
c = Read (R[1], L_BYTE, RA); /* get src byte */
if ((c == match) ^ skpc) /* match & locc? */
break;
@ -1064,7 +1064,7 @@ else {
R[0] = STR_PACK (mask, opnd[0]); /* srclen + FPD data */
PSL = PSL | PSL_FPD;
}
for ( ; (R[0] & STR_LNMASK) != 0; sim_interval-- ) { /* loop thru string */
for ( ; (R[0] & STR_LNMASK) != 0; extra_bytes++ ) { /* loop thru string */
c = Read (R[1], L_BYTE, RA); /* get byte */
t = Read (R[3] + c, L_BYTE, RA); /* get table ent */
if (((t & mask) != 0) ^ spanc) /* test vs instr */

View file

@ -763,6 +763,7 @@ enum opcodes {
#define VAX_IDLE_SYSV 0x40
#define VAX_IDLE_ELN 0x40 /* VAXELN */
extern uint32 cpu_idle_mask; /* idle mask */
extern int32 extra_bytes; /* bytes referenced by current string instruction */
void cpu_idle (void);
/* Instruction History */