PDP11, VAX: Correct MSCP & TMSCP register access debug output to mention correct register names and data being written on register writes
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176540f639
2 changed files with 4 additions and 4 deletions
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@ -1323,7 +1323,7 @@ int32 cidx = rq_map_pa ((uint32) PA);
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MSC *cp = rq_ctxmap[cidx];
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DEVICE *dptr = rq_devmap[cidx];
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sim_debug(DBG_REG, dptr, "rq_rd(PA=0x%08X [%s], access=%d)\n", PA, ((PA >> 1) & 01) ? "IP" : "SA", access);
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sim_debug(DBG_REG, dptr, "rq_rd(PA=0x%08X [%s], access=%d)=0x%04X\n", PA, ((PA >> 1) & 01) ? "SA" : "IP", access, ((PA >> 1) & 01) ? cp->sa : 0);
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if (cidx < 0)
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return SCPE_IERR;
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@ -1356,7 +1356,7 @@ DEVICE *dptr = rq_devmap[cidx];
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if (cidx < 0)
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return SCPE_IERR;
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sim_debug(DBG_REG, dptr, "rq_wr(PA=0x%08X [%s], access=%d)\n", PA, ((PA >> 1) & 01) ? "IP" : "SA", access);
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sim_debug(DBG_REG, dptr, "rq_wr(PA=0x%08X [%s], access=%d, data=0x%04X)\n", PA, ((PA >> 1) & 01) ? "SA" : "IP", access, data);
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switch ((PA >> 1) & 01) { /* decode PA<1> */
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@ -570,7 +570,7 @@ struct tq_req_results { /* intermediate State during tape motion comma
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t_stat tq_rd (int32 *data, int32 PA, int32 access)
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{
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sim_debug(DBG_REG, &tq_dev, "tq_rd(PA=0x%08X [%s], access=%d)\n", PA, ((PA >> 1) & 01) ? "IP" : "SA", access);
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sim_debug(DBG_REG, &tq_dev, "tq_rd(PA=0x%08X [%s], access=%d)=0x%04X\n", PA, ((PA >> 1) & 01) ? "SA" : "IP", access, ((PA >> 1) & 01) ? tq_sa : 0);
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switch ((PA >> 1) & 01) { /* decode PA<1> */
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case 0: /* IP */
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@ -593,7 +593,7 @@ return SCPE_OK;
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t_stat tq_wr (int32 data, int32 PA, int32 access)
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{
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sim_debug(DBG_REG, &tq_dev, "tq_wr(PA=0x%08X [%s], access=%d)\n", PA, ((PA >> 1) & 01) ? "IP" : "SA", access);
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sim_debug(DBG_REG, &tq_dev, "tq_wr(PA=0x%08X [%s], access=%d, data=0x%04X)\n", PA, ((PA >> 1) & 01) ? "SA" : "IP", access, data);
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switch ((PA >> 1) & 01) { /* decode PA<1> */
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