VAX,PDP11,PDP10: Added explicit support to enable (or disable) DMR Micro Diagnostics which corresponds to the SW10 hardware switch.
Also, always process initialization commands without regard to whether the DMC/DMR line is attached and return diag error status if the line isn't attached.
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1 changed files with 57 additions and 14 deletions
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@ -882,6 +882,8 @@ t_stat dmc_setpeer (UNIT* uptr, int32 val, char* cptr, void* desc);
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t_stat dmc_showpeer (FILE* st, UNIT* uptr, int32 val, void* desc);
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t_stat dmc_setspeed (UNIT* uptr, int32 val, char* cptr, void* desc);
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t_stat dmc_showspeed (FILE* st, UNIT* uptr, int32 val, void* desc);
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t_stat dmc_set_microdiag (UNIT* uptr, int32 val, char* cptr, void* desc);
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t_stat dmc_show_microdiag (FILE* st, UNIT* uptr, int32 val, void* desc);
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t_stat dmc_settype (UNIT* uptr, int32 val, char* cptr, void* desc);
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t_stat dmc_showtype (FILE* st, UNIT* uptr, int32 val, void* desc);
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t_stat dmc_setstats (UNIT* uptr, int32 val, char* cptr, void* desc);
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@ -965,6 +967,7 @@ char dmc_port[DMC_NUMDEVICE][CBUFSIZE];
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uint32 dmc_baseaddr[DMC_NUMDEVICE];
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uint16 dmc_basesize[DMC_NUMDEVICE];
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uint8 dmc_modem[DMC_NUMDEVICE];
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t_bool dmc_microdiag[DMC_NUMDEVICE];
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CSRS dmp_csrs[DMP_NUMDEVICE];
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uint16 dmp_sel0[DMC_NUMDEVICE];
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@ -1014,6 +1017,7 @@ REG dmc_reg[] = {
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{ BRDATAD (SEL4, dmc_sel4, DEV_RDX, 16, DMC_NUMDEVICE, "Select 4 CSR") },
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{ BRDATAD (SEL6, dmc_sel6, DEV_RDX, 16, DMC_NUMDEVICE, "Select 6 CSR") },
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{ BRDATAD (SPEED, dmc_speed, DEV_RDX, 32, DMC_NUMDEVICE, "line speed") },
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{ BRDATAD (DIAG, dmc_microdiag, DEV_RDX, 1, DMC_NUMDEVICE, "Microdiagnostic Enabled") },
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{ BRDATAD (PEER, dmc_peer, DEV_RDX, 8, DMC_NUMDEVICE*CBUFSIZE, "peer address:port") },
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{ BRDATAD (PORT, dmc_port, DEV_RDX, 8, DMC_NUMDEVICE*CBUFSIZE, "listen port") },
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{ BRDATAD (BASEADDR, dmc_baseaddr, DEV_RDX, 32, DMC_NUMDEVICE, "program set base address") },
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@ -1047,6 +1051,8 @@ MTAB dmc_mod[] = {
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&dmc_setpeer, &dmc_showpeer, NULL, "Display destination/source" },
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{ MTAB_XTD|MTAB_VUN, 0, "SPEED", "SPEED=bits/sec (0=unrestricted)" ,
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&dmc_setspeed, &dmc_showspeed, NULL, "Display rate limit" },
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{ MTAB_XTD|MTAB_VUN, 0, "MICRODIAG", "MICRODIAG={ENABLE,DISABLE}" ,
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&dmc_set_microdiag, &dmc_show_microdiag, NULL, "MicroDiagnostic Enable" },
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#if !defined (VM_PDP10)
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{ MTAB_XTD|MTAB_VUN|MTAB_VALR,0, "TYPE", "TYPE={DMR,DMC}" ,&dmc_settype, &dmc_showtype, NULL, "Set/Display device type" },
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#endif
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@ -1256,6 +1262,32 @@ speeds[dmc] = newspeed;
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return SCPE_OK;
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}
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t_stat dmc_show_microdiag (FILE* st, UNIT* uptr, int32 val, void* desc)
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{
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int32 dmc = (int32)(uptr-dmc_dev.units);
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fprintf(st, "MicroDiag=%s", dmc_microdiag[dmc] ? "enabled" : "disabled");
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return SCPE_OK;
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}
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t_stat dmc_set_microdiag(UNIT* uptr, int32 val, char* cptr, void* desc)
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{
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int32 dmc = (int32)(uptr-dmc_dev.units);
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char gbuf[CBUFSIZE];
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if ((cptr == NULL) || (*cptr == '\0'))
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return SCPE_ARG;
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get_glyph (cptr, gbuf, 0);
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if (MATCH_CMD (gbuf, "ENABLE") == 0)
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dmc_microdiag[dmc] = TRUE;
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else
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if (MATCH_CMD (gbuf, "DISABLE") == 0)
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dmc_microdiag[dmc] = FALSE;
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else
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return SCPE_ARG;
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return SCPE_OK;
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}
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t_stat dmc_showtype (FILE* st, UNIT* uptr, int32 val, void* desc)
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{
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DEVICE *dptr = (UNIBUS) ? ((&dmc_dev == find_dev_from_unit(uptr)) ? &dmc_dev : &dmp_dev) : &dmv_dev;
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@ -2172,8 +2204,18 @@ while ((control = controller->control_out)) {
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controller->control_out = NULL;
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dmc_setreg(controller, 0, 0, DBG_RGC);
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if (controller->dev_type == DMR) {
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/* DMR-11 indicates microdiagnostics complete when this is set */
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dmc_setreg(controller, 2, 0x8000, DBG_RGC);
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if (dmc_is_attached(controller->unit)) {
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/* Indicates microdiagnostics complete */
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if (((*controller->csrs->sel0 & DMC_SEL0_M_UDIAG) != 0) ^
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(dmc_microdiag[controller->index]))
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dmc_setreg(controller, 2, 0x8000, DBG_RGC);/* Microdiagnostics Complete */
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else
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dmc_setreg(controller, 2, 0x4000, DBG_RGC); /* Microdiagnostics Inhibited */
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}
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else {
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/* Indicate M8203 (Line Unit) test failed */
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dmc_setreg(controller, 2, 0x0200, DBG_RGC);
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}
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}
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else {
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/* preserve contents of BSEL3 if DMC-11 */
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@ -2191,7 +2233,8 @@ else
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dmc_buffer_queue_init_all(controller);
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controller->transfer_state = Idle;
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dmc_set_run(controller);
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if (dmc_is_attached(controller->unit))
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dmc_set_run(controller);
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}
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void dmc_start_input_transfer(CTLR *controller)
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@ -2242,9 +2285,8 @@ DEVICE *dptr = controller->device;
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sim_debug(DBG_TRC, dptr, "dmc_svc(%s%d)\n", controller->device->name, controller->index);
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if (dmc_is_attached(controller->unit)) {
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/* Perform delayed register actions */
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if (controller->dmc_wr_delay) {
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/* Perform delayed register actions */
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if (controller->dmc_wr_delay) {
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controller->dmc_wr_delay = 0;
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dmc_process_command(controller);
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if (controller->link.xmt_buffer) {
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@ -2252,6 +2294,7 @@ if (dmc_is_attached(controller->unit)) {
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return SCPE_OK;
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}
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}
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if (dmc_is_attached(controller->unit)) {
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/* Speed limited transmissions are completed here after the appropriate service delay */
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if (controller->link.xmt_buffer) {
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dmc_complete_transmit(controller);
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@ -3374,8 +3417,7 @@ else {
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dmc_setreg(controller, PA, (oldValue & ~mask) | (data & mask), DBG_REG);
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}
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if (dmc_is_attached(controller->unit) &&
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(dmc_getsel(reg) == 0 || dmc_getsel(reg) == 1)) {/* writes to SEL0 and SEL2 are actionable */
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if ((dmc_getsel(reg) == 0) || (dmc_getsel(reg) == 1)) {/* writes to SEL0 and SEL2 are actionable */
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if (0 == controller->dmc_wr_delay) { /* Not waiting? */
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controller->dmc_wr_delay = 10; /* Wait a bit before acting on the changed register */
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sim_activate_abs (controller->unit, controller->dmc_wr_delay);
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@ -3496,6 +3538,7 @@ if (0 == dmc_units[0].flags) { /* First Time Initializations */
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#endif
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dmc_dev.units[i] = dmc_unit_template;
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controller->unit->ctlr = (void *)controller;
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dmc_microdiag[i] = TRUE;
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}
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tmxr_set_modem_control_passthru (&dmc_desc); /* We always want Modem Control */
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dmc_units[dmc_dev.numunits-2] = dmc_poll_unit_template;
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