diff --git a/VAX/is1000_defs.h b/VAX/is1000_defs.h
index 5fe01f00..50548ec4 100644
--- a/VAX/is1000_defs.h
+++ b/VAX/is1000_defs.h
@@ -262,6 +262,7 @@ extern int32 sys_model;
 #define XS_READW(ba,bc,buf)    Map_ReadW(ba, bc, buf, FALSE)
 #define XS_WRITEB(ba,bc,buf)   Map_WriteB(ba, bc, buf, FALSE)
 #define XS_WRITEW(ba,bc,buf)   Map_WriteW(ba, bc, buf, FALSE)
+#define XS_ADRMBO       (0)
 
 /* Function prototypes for I/O */
 
diff --git a/VAX/vax410_defs.h b/VAX/vax410_defs.h
index 3f9d8766..69efeda9 100644
--- a/VAX/vax410_defs.h
+++ b/VAX/vax410_defs.h
@@ -337,6 +337,7 @@ extern int32 sys_model;
 #define XS_READW        Map_ReadW
 #define XS_WRITEB       Map_WriteB
 #define XS_WRITEW       Map_WriteW
+#define XS_ADRMBO       (0)
 
 
 /* Function prototypes for I/O */
diff --git a/VAX/vax420_defs.h b/VAX/vax420_defs.h
index 21c4da98..906a5512 100644
--- a/VAX/vax420_defs.h
+++ b/VAX/vax420_defs.h
@@ -381,6 +381,11 @@ extern int32 sys_model;
 #define XS_READW        Map_ReadW
 #define XS_WRITEB       Map_WriteB
 #define XS_WRITEW       Map_WriteW
+#if (defined (VAX_411) || defined (VAX_412))            /* InfoServer? */
+#define XS_ADRMBO       (0)
+#else
+#define XS_ADRMBO       ((MEMSIZE -1) & 0xFF000000)     /* bits 31:24 have pull-ups */
+#endif
 
 /* Function prototypes for I/O */
 
diff --git a/VAX/vax43_defs.h b/VAX/vax43_defs.h
index 578282df..ed9945c1 100644
--- a/VAX/vax43_defs.h
+++ b/VAX/vax43_defs.h
@@ -356,6 +356,7 @@ extern int32 sys_model;
 #define XS_READW        Map_ReadW
 #define XS_WRITEB       Map_WriteB
 #define XS_WRITEW       Map_WriteW
+#define XS_ADRMBO       (0)
 
 /* Function prototypes for I/O */
 
diff --git a/VAX/vax440_defs.h b/VAX/vax440_defs.h
index 9e5ac985..257ab5f2 100644
--- a/VAX/vax440_defs.h
+++ b/VAX/vax440_defs.h
@@ -315,6 +315,7 @@ extern int32 sys_model;
 #define XS_READW        Map_ReadW
 #define XS_WRITEB       Map_WriteB
 #define XS_WRITEW       Map_WriteW
+#define XS_ADRMBO       (0)
 
 /* Function prototypes for I/O */
 
diff --git a/VAX/vax_xs.c b/VAX/vax_xs.c
index a7d6f414..50a5f55a 100644
--- a/VAX/vax_xs.c
+++ b/VAX/vax_xs.c
@@ -344,8 +344,9 @@ while (xs->var->ReadQ.count > 0) {
         }
 
     /* set buffer length and address */
-    slen = (uint16)(xs->var->rxhdr[2] * -1);     /* 2s Complement */
+    slen = (uint16)(xs->var->rxhdr[2] * -1);            /* 2s Complement */
     segb = xs->var->rxhdr[0] + ((xs->var->rxhdr[1] & RXR_HADR) << 16);
+    segb |= XS_ADRMBO;                                  /* set system specific bits */
 
     /* get first packet from receive queue */
     if (!item) {
@@ -472,8 +473,9 @@ for (;;) {
         break;
 
     /* set buffer length and address */
-    slen = (uint16)(xs->var->txhdr[2] * -1);             /* 2s complement */
+    slen = (uint16)(xs->var->txhdr[2] * -1);            /* 2s complement */
     segb = xs->var->txhdr[0] + ((xs->var->txhdr[1] & TXR_HADR) << 16);
+    segb |= XS_ADRMBO;                                  /* set system specific bits */
     wlen = slen;
 
     sim_debug(DBG_TRC, xs->dev, "Using transmit descriptor=0x%X, slen=0x%04X(%d), segb=0x%04X, ", ba, slen, slen, segb);
@@ -587,6 +589,7 @@ ethq_clear (&xs->var->ReadQ);
 memset (&xs->var->setup, 0, sizeof(struct xs_setup));
 
 xs->var->inbb = ((xs->var->csr2 & 0xFF) << 16) | (xs->var->csr1 & 0xFFFE);
+xs->var->inbb |= XS_ADRMBO;                             /* set system specific bits */
 sim_debug (DBG_REG, &xs_dev, "xs_inbb = %04X\n", xs->var->inbb);
 
 if (XS_READB (xs->var->inbb, 0x18, &inb[0])) {
@@ -610,6 +613,7 @@ w1 = GETW (inb, 0x10);
 w2 = GETW (inb, 0x12);
 
 xs->var->rdrb = ((w2 << 16) | w1) & 0xFFFFF8;
+xs->var->rdrb |= XS_ADRMBO;                             /* set system specific bits */
 xs->var->rrlen = (w2 >> 13) & 0x7;
 xs->var->rrlen = (1u << xs->var->rrlen);
 xs->var->relen = 4;
@@ -621,6 +625,7 @@ w1 = GETW (inb, 0x14);
 w2 = GETW (inb, 0x16);
 
 xs->var->tdrb = ((w2 << 16) | w1) & 0xFFFFF8;
+xs->var->tdrb |= XS_ADRMBO;                             /* set system specific bits */
 xs->var->trlen = (w2 >> 13) & 0x7;
 xs->var->trlen = (1u << xs->var->trlen);
 xs->var->telen = 4;