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Notes For V3.5-1

Browse source 
The source set has been extensively overhauled.  For correct
viewing, set Visual C++ or Emacs to have tab stops every 4
characters.

1. New Features

1.1 3.5-0

1.1.1 All Ethernet devices

- Added Windows user-defined adapter names (from Timothe Litt)

1.1.2 Interdata, SDS, HP, PDP-8, PDP-18b terminal multiplexors

- Added support for SET <unit>n DISCONNECT

1.1.3 VAX

- Added latent QDSS support
- Revised autoconfigure to handle QDSS

1.1.4 PDP-11

- Revised autoconfigure to handle more casees

2. Bugs Fixed

2.1 3.5-0

2.1.1 SCP and libraries

- Trim trailing spaces on all input (for example, attach file names)
- Fixed sim_sock spurious SIGPIPE error in Unix/Linux
- Fixed sim_tape misallocation of TPC map array for 64b simulators

2.1.2 1401

- Fixed bug, CPU reset was clearing SSB through SSG

2.1.3 PDP-11

- Fixed bug in VH vector display routine
- Fixed XU runt packet processing (found by Tim Chapman)

2.1.4 Interdata

- Fixed bug in SHOW PAS CONN/STATS
- Fixed potential integer overflow exception in divide

2.1.5 SDS

- Fixed bug in SHOW MUX CONN/STATS

2.1.6 HP

- Fixed bug in SHOW MUX CONN/STATS

2.1.7 PDP-8

- Fixed bug in SHOW TTIX CONN/STATS
- Fixed bug in SET/SHOW TTOXn LOG

2.1.8 PDP-18b

- Fixed bug in SHOW TTIX CONN/STATS
- Fixed bug in SET/SHOW TTOXn LOG

2.1.9 Nova, Eclipse

- Fixed potential integer overflow exception in divide

2.2 3.5-1

2.2.1 1401

- Changed character encodings to be compatible with Pierce 709X simulator
- Added mode for old/new character encodings

2.2.2 1620

- Changed character encodings to be compatible with Pierce 709X simulator

2.2.3 PDP-10

- Changed MOVNI to eliminate GCC warning

2.2.4 VAX

- Fixed bug in structure definitions with 32b compilation options
- Fixed bug in autoconfiguration table

2.2.5 PDP-11

- Fixed bug in autoconfiguration table
This commit is contained in:
Bob Supnik 2005-10-15 15:38:00 -07:00 • committed by Mark Pizzolato
parent b7c1eae41f
commit 1e704bf185
49 changed files with 646 additions and 294 deletions
Show stats Download patch file Download diff file Expand all files Collapse all files

61
0readme_35.txt
View file

@ -1,70 +1,99 @@
Notes For V3.5-0 Notes For V3.5-1
The source set has been extensively overhauled. For correct The source set has been extensively overhauled. For correct
viewing, set Visual C++ or Emacs to have tab stops every 4 viewing, set Visual C++ or Emacs to have tab stops every 4
characters. characters.
1. New Features in 3.4-1 1. New Features
1.1 All Ethernet devices 1.1 3.5-0
1.1.1 All Ethernet devices
- Added Windows user-defined adapter names (from Timothe Litt) - Added Windows user-defined adapter names (from Timothe Litt)
1.2 Interdata, SDS, HP, PDP-8, PDP-18b terminal multiplexors 1.1.2 Interdata, SDS, HP, PDP-8, PDP-18b terminal multiplexors
- Added support for SET <unit>n DISCONNECT - Added support for SET <unit>n DISCONNECT
1.3 VAX 1.1.3 VAX
- Added latent QDSS support - Added latent QDSS support
- Revised autoconfigure to handle QDSS - Revised autoconfigure to handle QDSS
1.4 PDP-11 1.1.4 PDP-11
- Revised autoconfigure to handle more casees - Revised autoconfigure to handle more casees
2. Bugs Fixed in 3.4-1 2. Bugs Fixed
2.1 SCP and libraries 2.1 3.5-0
2.1.1 SCP and libraries
- Trim trailing spaces on all input (for example, attach file names) - Trim trailing spaces on all input (for example, attach file names)
- Fixed sim_sock spurious SIGPIPE error in Unix/Linux - Fixed sim_sock spurious SIGPIPE error in Unix/Linux
- Fixed sim_tape misallocation of TPC map array for 64b simulators - Fixed sim_tape misallocation of TPC map array for 64b simulators
2.2 1401 2.1.2 1401
- Fixed bug, CPU reset was clearing SSB through SSG - Fixed bug, CPU reset was clearing SSB through SSG
2.3 PDP-11 2.1.3 PDP-11
- Fixed bug in VH vector display routine - Fixed bug in VH vector display routine
- Fixed XU runt packet processing (found by Tim Chapman) - Fixed XU runt packet processing (found by Tim Chapman)
2.4 Interdata 2.1.4 Interdata
- Fixed bug in SHOW PAS CONN/STATS - Fixed bug in SHOW PAS CONN/STATS
- Fixed potential integer overflow exception in divide - Fixed potential integer overflow exception in divide
2.5 SDS 2.1.5 SDS
- Fixed bug in SHOW MUX CONN/STATS - Fixed bug in SHOW MUX CONN/STATS
2.6 HP 2.1.6 HP
- Fixed bug in SHOW MUX CONN/STATS - Fixed bug in SHOW MUX CONN/STATS
2.7 PDP-8 2.1.7 PDP-8
- Fixed bug in SHOW TTIX CONN/STATS - Fixed bug in SHOW TTIX CONN/STATS
- Fixed bug in SET/SHOW TTOXn LOG - Fixed bug in SET/SHOW TTOXn LOG
2.8 PDP-18b 2.1.8 PDP-18b
- Fixed bug in SHOW TTIX CONN/STATS - Fixed bug in SHOW TTIX CONN/STATS
- Fixed bug in SET/SHOW TTOXn LOG - Fixed bug in SET/SHOW TTOXn LOG
2.9 Nova, Eclipse 2.1.9 Nova, Eclipse
- Fixed potential integer overflow exception in divide - Fixed potential integer overflow exception in divide
2.2 3.5-1
2.2.1 1401
- Changed character encodings to be compatible with Pierce 709X simulator
- Added mode for old/new character encodings
2.2.2 1620
- Changed character encodings to be compatible with Pierce 709X simulator
2.2.3 PDP-10
- Changed MOVNI to eliminate GCC warning
2.2.4 VAX
- Fixed bug in structure definitions with 32b compilation options
- Fixed bug in autoconfiguration table
2.2.5 PDP-11
- Fixed bug in autoconfiguration table

2
AltairZ80/altairZ80_cpu.c
View file

@ -1732,7 +1732,7 @@ t_stat sim_instr (void) {
extern int32 timerInterruptHandler; extern int32 timerInterruptHandler;
extern uint32 sim_os_msec(void); extern uint32 sim_os_msec(void);
extern t_bool rtc_avail; extern t_bool rtc_avail;
extern int32 sim_brk_summ; extern uint32 sim_brk_summ;
int32 reason = 0; int32 reason = 0;
register uint32 specialProcessing; register uint32 specialProcessing;
register uint32 AF; register uint32 AF;

3
GRI/gri_cpu.c
View file

@ -25,6 +25,7 @@
cpu GRI-909 CPU cpu GRI-909 CPU
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
18-Jul-04 RMS Fixed missing ao_update calls in AX, AY write 18-Jul-04 RMS Fixed missing ao_update calls in AX, AY write
17-Jul-04 RMS Revised MSR, EAO based on additional documentation 17-Jul-04 RMS Revised MSR, EAO based on additional documentation
14-Mar-03 RMS Fixed bug in SC queue tracking 14-Mar-03 RMS Fixed bug in SC queue tracking
@ -174,7 +175,7 @@ REG *scq_r = NULL; /* PC queue reg ptr */
extern int32 sim_interval; extern int32 sim_interval;
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);

3
H316/h316_cpu.c
View file

@ -25,6 +25,7 @@
cpu H316/H516 CPU cpu H316/H516 CPU
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
15-Feb-05 RMS Added start button interrupt 15-Feb-05 RMS Added start button interrupt
01-Dec-04 RMS Fixed bug in DIV 01-Dec-04 RMS Fixed bug in DIV
@ -259,7 +260,7 @@ InstHistory *hst = NULL; /* instruction history *
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_interval; extern int32 sim_interval;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern FILE *sim_log; extern FILE *sim_log;
extern DEVICE *sim_devices[]; extern DEVICE *sim_devices[];

3
HP2100/hp2100_cpu.c
View file

@ -27,6 +27,7 @@
MP 12892B memory protect MP 12892B memory protect
DMA0,DMA1 12895A/12897B direct memory access/dual channel port controller DMA0,DMA1 12895A/12897B direct memory access/dual channel port controller
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
21-Jan-05 JDB Reorganized CPU option flags 21-Jan-05 JDB Reorganized CPU option flags
15-Jan-05 RMS Split out EAU and MAC instructions 15-Jan-05 RMS Split out EAU and MAC instructions
26-Dec-04 RMS DMA reset doesn't clear alternate CTL flop (from Dave Bryan) 26-Dec-04 RMS DMA reset doesn't clear alternate CTL flop (from Dave Bryan)
@ -417,7 +418,7 @@ extern int32 sim_interval;
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_brk_char; extern int32 sim_brk_char;
extern int32 sim_del_char; extern int32 sim_del_char;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern FILE *sim_log; extern FILE *sim_log;
extern DEVICE *sim_devices[]; extern DEVICE *sim_devices[];
extern int32 sim_switches; extern int32 sim_switches;

97
I1401/i1401_cd.c
View file

@ -35,6 +35,7 @@
Cards are represented as ASCII text streams terminated by newlines. Cards are represented as ASCII text streams terminated by newlines.
This allows cards to be created and edited as normal files. This allows cards to be created and edited as normal files.
20-Sep-05 RMS Revised for new code tables, compatible colbinary treatment
30-Aug-05 RMS Fixed read, punch to ignore modifier on 1,4 char inst 30-Aug-05 RMS Fixed read, punch to ignore modifier on 1,4 char inst
(reported by Van Snyder) (reported by Van Snyder)
14-Nov-04 WVS Added column binary support 14-Nov-04 WVS Added column binary support
@ -48,17 +49,21 @@
#include "i1401_defs.h" #include "i1401_defs.h"
#include <ctype.h> #include <ctype.h>
#define UNIT_V_PCH (UNIT_V_UF + 0) /* output conv */
#define UNIT_PCH (1 << UNIT_V_PCH)
extern uint8 M[]; extern uint8 M[];
extern int32 ind[64], ssa, iochk; extern int32 ind[64], ssa, iochk;
extern char bcd_to_ascii[64]; extern int32 conv_old;
extern char ascii_to_bcd[128];
extern int16 colbin[64];
int32 s1sel, s2sel, s4sel, s8sel; int32 s1sel, s2sel, s4sel, s8sel;
char rbuf[2 * CBUFSIZE]; /* > CDR_WIDTH */ char rbuf[2 * CBUFSIZE]; /* > CDR_WIDTH */
t_stat cdr_svc (UNIT *uptr); t_stat cdr_svc (UNIT *uptr);
t_stat cdr_boot (int32 unitno, DEVICE *dptr); t_stat cdr_boot (int32 unitno, DEVICE *dptr);
t_stat cdr_attach (UNIT *uptr, char *cptr); t_stat cdr_attach (UNIT *uptr, char *cptr);
t_stat cd_reset (DEVICE *dptr); t_stat cd_reset (DEVICE *dptr);
int32 bcd2asc (int32 c, UNIT *uptr);
char colbin_to_bcd (uint32 cb);
/* Card reader data structures /* Card reader data structures
@ -108,8 +113,14 @@ REG cdp_reg[] = {
{ NULL } { NULL }
}; };
MTAB cdp_mod[] = {
{ UNIT_PCH, 0, "business set", "BUSINESS" },
{ UNIT_PCH, UNIT_PCH, "Fortran set", "FORTRAN" },
{ 0 }
};
DEVICE cdp_dev = { DEVICE cdp_dev = {
"CDP", &cdp_unit, cdp_reg, NULL, "CDP", &cdp_unit, cdp_reg, cdp_mod,
1, 10, 31, 1, 8, 7, 1, 10, 31, 1, 8, 7,
NULL, NULL, &cd_reset, NULL, NULL, &cd_reset,
NULL, NULL, NULL NULL, NULL, NULL
@ -139,7 +150,7 @@ REG stack_reg[] = {
}; };
DEVICE stack_dev = { DEVICE stack_dev = {
"STKR", stack_unit, stack_reg, NULL, "STKR", stack_unit, stack_reg, cdp_mod,
5, 10, 31, 1, 8, 7, 5, 10, 31, 1, 8, 7,
NULL, NULL, &cd_reset, NULL, NULL, &cd_reset,
NULL, NULL, NULL NULL, NULL, NULL
@ -153,8 +164,7 @@ DEVICE stack_dev = {
t_stat read_card (int32 ilnt, int32 mod) t_stat read_card (int32 ilnt, int32 mod)
{ {
int32 i, j, cbn; int32 i, cbn, c1, c2;
int16 c;
t_stat r; t_stat r;
if (sim_is_active (&cdr_unit)) { /* busy? */ if (sim_is_active (&cdr_unit)) { /* busy? */
@ -182,24 +192,23 @@ if (ssa) { /* if last cd on */
fseek (cdr_unit.fileref, cdr_unit.pos, SEEK_SET); fseek (cdr_unit.fileref, cdr_unit.pos, SEEK_SET);
} }
if (cbn) { /* column binary */ if (cbn) { /* column binary */
for (i = 0; i < 2 * CDR_WIDTH; i++) /* cvt to BCD */
rbuf[i] = ascii_to_bcd[rbuf[i]];
for (i = 0; i < CDR_WIDTH; i++) { for (i = 0; i < CDR_WIDTH; i++) {
M[CD_CBUF1 + i] = (M[CD_CBUF1 + i] & WM) | rbuf[i]; if (conv_old) {
M[CD_CBUF2 + i] = (M[CD_CBUF2 + i] & WM) | rbuf[CDR_WIDTH + i]; c1 = ascii2bcd (rbuf[i]);
c = (rbuf[i] << 6) | rbuf[CDR_WIDTH + i]; c2 = ascii2bcd (rbuf[CDR_WIDTH + i]);
M[CDR_BUF + i] = (M[CDR_BUF + i] & WM) | 077; }
for (j = 0; j < 64; j++) { /* look for char */ else {
if (c == colbin[j]) { c1 = ascii2bcd (rbuf[2 * i]);
M[CDR_BUF + i] = (M[CDR_BUF + i] & WM) | j; c2 = ascii2bcd (rbuf[(2 * i) + 1]);
break; }
} /* end if */ M[CD_CBUF1 + i] = (M[CD_CBUF1 + i] & WM) | c1;
} /* end for j */ M[CD_CBUF2 + i] = (M[CD_CBUF2 + i] & WM) | c2;
M[CDR_BUF + i] = colbin_to_bcd ((c1 << 6) | c2);
} /* end for i */ } /* end for i */
} /* end if col bin */ } /* end if col bin */
else { /* normal read */ else { /* normal read */
for (i = 0; i < CDR_WIDTH; i++) { /* cvt to BCD */ for (i = 0; i < CDR_WIDTH; i++) { /* cvt to BCD */
rbuf[i] = ascii_to_bcd[rbuf[i]]; rbuf[i] = ascii2bcd (rbuf[i]);
M[CDR_BUF + i] = (M[CDR_BUF + i] & WM) | rbuf[i]; M[CDR_BUF + i] = (M[CDR_BUF + i] & WM) | rbuf[i];
} }
} }
@ -221,7 +230,8 @@ if (s1sel) uptr = &stack_unit[1]; /* stacker 1? */
else if (s2sel) uptr = &stack_unit[2]; /* stacker 2? */ else if (s2sel) uptr = &stack_unit[2]; /* stacker 2? */
else uptr = &stack_unit[0]; /* then default */ else uptr = &stack_unit[0]; /* then default */
if ((uptr->flags & UNIT_ATT) == 0) return SCPE_OK; /* attached? */ if ((uptr->flags & UNIT_ATT) == 0) return SCPE_OK; /* attached? */
for (i = 0; i < CDR_WIDTH; i++) rbuf[i] = bcd_to_ascii[rbuf[i]]; for (i = 0; i < CDR_WIDTH; i++)
rbuf[i] = bcd2ascii (rbuf[i], uptr->flags & UNIT_PCH);
for (i = CDR_WIDTH - 1; (i >= 0) && (rbuf[i] == ' '); i--) rbuf[i] = 0; for (i = CDR_WIDTH - 1; (i >= 0) && (rbuf[i] == ' '); i--) rbuf[i] = 0;
rbuf[CDR_WIDTH] = 0; /* null at end */ rbuf[CDR_WIDTH] = 0; /* null at end */
fputs (rbuf, uptr->fileref); /* write card */ fputs (rbuf, uptr->fileref); /* write card */
@ -243,22 +253,32 @@ return SCPE_OK;
t_stat punch_card (int32 ilnt, int32 mod) t_stat punch_card (int32 ilnt, int32 mod)
{ {
int32 i, cbn; int32 i, cbn, c1, c2;
static char pbuf[(2 * CDP_WIDTH) + 1]; /* + null */ static char pbuf[(2 * CDP_WIDTH) + 1]; /* + null */
t_bool use_h;
UNIT *uptr; UNIT *uptr;
if (s8sel) uptr = &stack_unit[2]; /* stack 8? */ if (s8sel) uptr = &stack_unit[2]; /* stack 8? */
else if (s4sel) uptr = &stack_unit[4]; /* stack 4? */ else if (s4sel) uptr = &stack_unit[4]; /* stack 4? */
else uptr = &cdp_unit; /* normal output */ else uptr = &cdp_unit; /* normal output */
if ((uptr->flags & UNIT_ATT) == 0) return SCPE_UNATT; /* attached? */ if ((uptr->flags & UNIT_ATT) == 0) return SCPE_UNATT; /* attached? */
use_h = uptr->flags & UNIT_PCH;
ind[IN_PNCH] = s4sel = s8sel = 0; /* clear flags */ ind[IN_PNCH] = s4sel = s8sel = 0; /* clear flags */
cbn = ((ilnt == 2) || (ilnt == 5)) && (mod == BCD_C); /* col binary? */ cbn = ((ilnt == 2) || (ilnt == 5)) && (mod == BCD_C); /* col binary? */
M[CDP_BUF - 1] = 012; /* set prev loc */ M[CDP_BUF - 1] = 012; /* set prev loc */
if (cbn) { /* column binary */ if (cbn) { /* column binary */
for (i = 0; i < CDP_WIDTH; i++) { for (i = 0; i < CDP_WIDTH; i++) {
pbuf[i] = bcd_to_ascii[M[CD_CBUF1 + i] & CHAR]; c1 = bcd2ascii (M[CD_CBUF1 + i] & CHAR, use_h);
pbuf[i + CDP_WIDTH] = bcd_to_ascii[M[CD_CBUF2 + i] & CHAR]; c2 = bcd2ascii (M[CD_CBUF2 + i] & CHAR, use_h);
if (conv_old) {
pbuf[i] = c1;
pbuf[i + CDP_WIDTH] = c2;
}
else {
pbuf[2 * i] = c1;
pbuf[(2 * i) + 1] = c2;
}
} }
for (i = 2 * CDP_WIDTH - 1; (i >= 0) && (pbuf[i] == ' '); i--) for (i = 2 * CDP_WIDTH - 1; (i >= 0) && (pbuf[i] == ' '); i--)
pbuf[i] = 0; pbuf[i] = 0;
@ -266,7 +286,7 @@ if (cbn) { /* column binary */
} }
else { /* normal */ else { /* normal */
for (i = 0; i < CDP_WIDTH; i++) for (i = 0; i < CDP_WIDTH; i++)
pbuf[i] = bcd_to_ascii[M[CDP_BUF + i] & CHAR]; pbuf[i] = bcd2ascii (M[CDP_BUF + i] & CHAR, use_h);
for (i = CDP_WIDTH - 1; (i >= 0) && (pbuf[i] == ' '); i--) for (i = CDP_WIDTH - 1; (i >= 0) && (pbuf[i] == ' '); i--)
pbuf[i] = 0; pbuf[i] = 0;
pbuf[CDP_WIDTH] = 0; /* trailing null */ pbuf[CDP_WIDTH] = 0; /* trailing null */
@ -335,3 +355,30 @@ for (i = 0; i < BOOT_LEN; i++) M[BOOT_START + i] = boot_rom[i];
saved_IS = BOOT_START; saved_IS = BOOT_START;
return SCPE_OK; return SCPE_OK;
} }
/* Column binary to BCD
This is based on documentation in the IBM 1620 manual and may not be
accurate for the 7094. Each row (12,11,0,1..9) is interpreted as a bit
pattern, and the appropriate bits are set. (Double punches inclusive
OR, eg, 1,8,9 is 9.) On the 1620, double punch errors are detected;
since the 7094 only reads column binary, double punches are ignored.
Bit order, left to right, is 12, 11, 0, 1, 2, 3, 4, 5, 6, 7, 8, 9.
The for loop works right to left, so the table is reversed. */
static const char row_val[12] = {
011, 010, 007, 006, 005, 004,
003, 002, 001, 020, 040, 060
};
char colbin_to_bcd (uint32 cb)
{
uint32 i;
char bcd;
for (i = 0, bcd = 0; i < 12; i++) { /* 'sum' rows */
if (cb & (1 << i)) bcd |= row_val[i];
}
return bcd;
}

28
I1401/i1401_cpu.c
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
01-Sep-05 RMS Removed error stops in MCE 01-Sep-05 RMS Removed error stops in MCE
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
02-Jun-05 RMS Fixed SSB-SSG clearing on RESET 02-Jun-05 RMS Fixed SSB-SSG clearing on RESET
@ -182,12 +183,13 @@ int32 iochk = 0; /* I/O check stop */
int32 hst_p = 0; /* history pointer */ int32 hst_p = 0; /* history pointer */
int32 hst_lnt = 0; /* history length */ int32 hst_lnt = 0; /* history length */
InstHistory *hst = NULL; /* instruction history */ InstHistory *hst = NULL; /* instruction history */
t_bool conv_old = 0; /* old conversions */
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_emax; extern int32 sim_emax;
extern t_value *sim_eval; extern t_value *sim_eval;
extern FILE *sim_deb; extern FILE *sim_deb;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);
@ -195,6 +197,8 @@ t_stat cpu_reset (DEVICE *dptr);
t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc); t_stat cpu_set_size (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_set_hist (UNIT *uptr, int32 val, char *cptr, void *desc); t_stat cpu_set_hist (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, void *desc); t_stat cpu_show_hist (FILE *st, UNIT *uptr, int32 val, void *desc);
t_stat cpu_set_conv (UNIT *uptr, int32 val, char *cptr, void *desc);
t_stat cpu_show_conv (FILE *st, UNIT *uptr, int32 val, void *desc);
int32 store_addr_h (int32 addr); int32 store_addr_h (int32 addr);
int32 store_addr_t (int32 addr); int32 store_addr_t (int32 addr);
int32 store_addr_u (int32 addr); int32 store_addr_u (int32 addr);
@ -253,6 +257,7 @@ REG cpu_reg[] = {
{ BRDATA (ISQ, pcq, 10, 14, PCQ_SIZE), REG_RO+REG_CIRC }, { BRDATA (ISQ, pcq, 10, 14, PCQ_SIZE), REG_RO+REG_CIRC },
{ DRDATA (ISQP, pcq_p, 6), REG_HRO }, { DRDATA (ISQP, pcq_p, 6), REG_HRO },
{ ORDATA (WRU, sim_int_char, 8) }, { ORDATA (WRU, sim_int_char, 8) },
{ FLDATA (CONVOLD, conv_old, 0), REG_HIDDEN },
{ NULL } { NULL }
}; };
@ -277,6 +282,10 @@ MTAB cpu_mod[] = {
{ UNIT_MSIZE, 16000, NULL, "16K", &cpu_set_size }, { UNIT_MSIZE, 16000, NULL, "16K", &cpu_set_size },
{ MTAB_XTD|MTAB_VDV|MTAB_NMO|MTAB_SHP, 0, "HISTORY", "HISTORY", { MTAB_XTD|MTAB_VDV|MTAB_NMO|MTAB_SHP, 0, "HISTORY", "HISTORY",
&cpu_set_hist, &cpu_show_hist }, &cpu_set_hist, &cpu_show_hist },
{ MTAB_XTD|MTAB_VDV|MTAB_NMO, 0, "CONVERSIONS", "NEWCONVERSIONS",
&cpu_set_conv, &cpu_show_conv },
{ MTAB_XTD|MTAB_VDV|MTAB_NMO, 1, NULL, "OLDCONVERSIONS",
&cpu_set_conv, NULL },
{ 0 } { 0 }
}; };
@ -1770,3 +1779,20 @@ for (k = 0; k < lnt; k++) { /* print specified */
} /* end for */ } /* end for */
return SCPE_OK; return SCPE_OK;
} }
/* Set conversions */
t_stat cpu_set_conv (UNIT *uptr, int32 val, char *cptr, void *desc)
{
conv_old = val;
return SCPE_OK;
}
/* Show conversions */
t_stat cpu_show_conv (FILE *st, UNIT *uptr, int32 val, void *desc)
{
if (conv_old) fputs ("Old (pre-3.5-1) conversions\n", st);
else fputs ("New conversions\n", st);
return SCPE_OK;
}

90
I1401/i1401_dat.h
View file

@ -22,11 +22,14 @@
Except as contained in this notice, the name of Robert M Supnik shall not be Except as contained in this notice, the name of Robert M Supnik shall not be
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
20-Sep-05 RMS Updated for compatibility with Paul Pierce conventions
*/ */
/* Old tables */
/* ASCII to BCD conversion */ /* ASCII to BCD conversion */
const char ascii_to_bcd[128] = { const char ascii_to_bcd_old[128] = {
000, 000, 000, 000, 000, 000, 000, 000, /* 000 - 037 */ 000, 000, 000, 000, 000, 000, 000, 000, /* 000 - 037 */
000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000,
000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000, 000,
@ -47,7 +50,7 @@ const char ascii_to_bcd[128] = {
/* BCD to ASCII conversion - also the "full" print chain */ /* BCD to ASCII conversion - also the "full" print chain */
char bcd_to_ascii[64] = { char bcd_to_ascii_old[64] = {
' ', '1', '2', '3', '4', '5', '6', '7', ' ', '1', '2', '3', '4', '5', '6', '7',
'8', '9', '0', '#', '@', ':', '>', '(', '8', '9', '0', '#', '@', ':', '>', '(',
'^', '/', 'S', 'T', 'U', 'V', 'W', 'X', '^', '/', 'S', 'T', 'U', 'V', 'W', 'X',
@ -58,16 +61,85 @@ char bcd_to_ascii[64] = {
'H', 'I', '?', '.', ')', '[', '<', '"' 'H', 'I', '?', '.', ')', '[', '<', '"'
}; };
/* Column binary codes for valid punch combinations /* New tables */
High-order six bits are rows 12-3, low-order six bits are rows 4-9 */ /* ASCII to BCD conversion */
int16 colbin[64] = { const char ascii_to_bcd[128] = {
000, 000, 000, 000, 000, 000, 000, 000, /* 000 - 037 */
000, 000, 000, 000, 000, 000, 000, 000,
000, 000, 000, 000, 000, 000, 000, 000,
000, 000, 000, 000, 000, 000, 000, 000,
000, 052, 037, 013, 053, 034, 060, 014, /* 040 - 077 */
034, 074, 054, 060, 033, 040, 073, 021,
012, 001, 002, 003, 004, 005, 006, 007,
010, 011, 015, 056, 076, 013, 016, 072,
014, 061, 062, 063, 064, 065, 066, 067, /* 100 - 137 */
070, 071, 041, 042, 043, 044, 045, 046,
047, 050, 051, 022, 023, 024, 025, 026,
027, 030, 031, 075, 036, 055, 020, 057,
000, 061, 062, 063, 064, 065, 066, 067, /* 140 - 177 */
070, 071, 041, 042, 043, 044, 045, 046,
047, 050, 051, 022, 023, 024, 025, 026,
027, 030, 031, 017, 032, 077, 035, 000
};
/* BCD to ASCII conversion */
const char bcd_to_ascii_a[64] = {
' ', '1', '2', '3', '4', '5', '6', '7',
'8', '9', '0', '#', '@', ':', '>', '{',
'^', '/', 'S', 'T', 'U', 'V', 'W', 'X',
'Y', 'Z', '|', ',', '%', '~', '\\', '"',
'-', 'J', 'K', 'L', 'M', 'N', 'O', 'P',
'Q', 'R', '!', '$', '*', ']', ';', '_',
'&', 'A', 'B', 'C', 'D', 'E', 'F', 'G',
'H', 'I', '?', '.', ')', '[', '<', '}'
};
const char bcd_to_ascii_h[64] = {
' ', '1', '2', '3', '4', '5', '6', '7',
'8', '9', '0', '=', '\'', ':', '>', '{',
'^', '/', 'S', 'T', 'U', 'V', 'W', 'X',
'Y', 'Z', '|', ',', '(', '~', '\\', '"',
'-', 'J', 'K', 'L', 'M', 'N', 'O', 'P',
'Q', 'R', '!', '$', '*', ']', ';', '_',
'+', 'A', 'B', 'C', 'D', 'E', 'F', 'G',
'H', 'I', '?', '.', ')', '[', '<', '}'
};
/* BCD to ASCII 48 character print chains */
const char bcd_to_pca[64] = {
' ', '1', '2', '3', '4', '5', '6', '7',
'8', '9', '0', '#', '@', ' ', ' ', ' ',
' ', '/', 'S', 'T', 'U', 'V', 'W', 'X',
'Y', 'Z', ' ', ',', '%', ' ', ' ', ' ',
'-', 'J', 'K', 'L', 'M', 'N', 'O', 'P',
'Q', 'R', '-', '$', '*', ' ', ' ', ' ',
'&', 'A', 'B', 'C', 'D', 'E', 'F', 'G',
'H', 'I', '&', '.', ')', ' ', ' ', ' '
};
const char bcd_to_pch[64] = {
' ', '1', '2', '3', '4', '5', '6', '7',
'8', '9', '0', '=', '\'', ' ', ' ', ' ',
' ', '/', 'S', 'T', 'U', 'V', 'W', 'X',
'Y', 'Z', ' ', ',', '(', ' ', ' ', ' ',
'-', 'J', 'K', 'L', 'M', 'N', 'O', 'P',
'Q', 'R', '-', '$', '*', ' ', ' ', ' ',
'&', 'A', 'B', 'C', 'D', 'E', 'F', 'G',
'H', 'I', '&', '.', ')', ' ', ' ', ' '
};
/* BCD to column binary conversion */
const uint32 bcd_to_colbin[64] = {
00000, 00400, 00200, 00100, 00040, 00020, 00010, 00004, 00000, 00400, 00200, 00100, 00040, 00020, 00010, 00004,
00002, 00001, 01000, 00102, 00042, 00022, 00012, 00006, 00002, 00001, 00202, 00102, 00042, 00022, 00012, 00006,
07777, 01400, 01200, 01100, 01040, 01020, 01010, 01004, 01000, 01400, 01200, 01100, 01040, 01020, 01010, 01004,
01002, 01001, 01202, 01102, 01042, 01022, 01012, 01006, 01002, 01001, 01202, 01102, 01042, 01022, 01012, 01006,
02000, 02400, 02200, 02100, 02040, 02020, 02010, 02004, 02000, 02400, 02200, 02100, 02040, 02020, 02010, 02004,
02002, 02001, 03000, 02102, 02042, 02022, 02012, 02006, 02002, 02001, 02202, 02102, 02042, 02022, 02012, 02006,
04000, 04400, 04200, 04100, 04040, 04020, 04010, 04004, 04000, 04400, 04200, 04100, 04040, 04020, 04010, 04004,
04002, 04001, 05000, 04102, 04042, 04022, 04012, 04006 04002, 04001, 04202, 04102, 04042, 04022, 04012, 04006
}; };

6
I1401/i1401_defs.h
View file

@ -282,4 +282,10 @@
#define CRETIOE(f,c) return ((f)? (c): SCPE_OK) #define CRETIOE(f,c) return ((f)? (c): SCPE_OK)
/* Function prototypes */
int32 bcd2ascii (int32 c, t_bool use_h);
int32 ascii2bcd (int32 c);
#endif #endif

85
I1401/i1401_doc.txt
View file

@ -190,6 +190,14 @@ stackers (STKR). STRK units 0, 1, 2, and 4 correspond to the reader
normal stacker, reader stacker 1, shared stacker 2/8, and punch stacker normal stacker, reader stacker 1, shared stacker 2/8, and punch stacker
4, respectively. 4, respectively.
Card punch and stacker units support both the business (1403 print chain
A) and Fortran (1403 H chain) character sets:
SET CDP BUSINESS business character set
SET CDP FORTRAN Fortran character set
The business character set is the default.
The card reader supports the BOOT command. BOOT CDR reads a card image The card reader supports the BOOT command. BOOT CDR reads a card image
into locations 1-80, sets a word mark under location 1, clears storage, into locations 1-80, sets a word mark under location 1, clears storage,
and then transfers control to location 1. and then transfers control to location 1.
@ -245,12 +253,19 @@ Error handling is as follows:
2.3 1403 Line Printer (LPT) 2.3 1403 Line Printer (LPT)
The IBM 1403 line printer (LPT) writes its data, converted to ASCII, to The IBM 1403 line printer (LPT) writes its data, converted to ASCII, to
a disk file. The line printer supports three different print character a disk file. The line printer implements both 48- and 64-character print
sets or "chains": chains:
SET LPT PCF full 64 character chain SET LPT 64 64-character print chain
SET LPT PCA 48 character business chain SET LPT 48 48-character print chain
SET LPT PCH 48 character FORTRAN chain
The line printer also implements both the business (1403 print chain
A) and Fortran (1403 H chain) character sets:
SET LPT BUSINESS business print character set
SET LPT FORTRAN Fortran character set
The default is the 64 character print chain with the business set.
In addition, the line printer can be programmed with a carriage control In addition, the line printer can be programmed with a carriage control
tape. The LOAD command loads a new carriage control tape: tape. The LOAD command loads a new carriage control tape:
@ -297,8 +312,18 @@ Error handling is as follows:
2.4 1407 Inquiry Terminal (INQ) 2.4 1407 Inquiry Terminal (INQ)
The IBM 1407 inquiry terminal (INQ) is a half-duplex console. It polls The IBM 1407 inquiry terminal (INQ) is a half-duplex console. It polls
the console keyboard periodically for inquiry requests. The inquiry the console keyboard periodically for inquiry requests.
terminal registers are:
The inquiry terminal supports both the business (1403 print chain A)
and Fortran (1403 H chain) character sets for output:
SET INQ BUSINESS business character set
SET INQ FORTRAN Fortran character set
The business character set is the default.
The inquiry terminal registers are:
name size comments name size comments
@ -414,7 +439,7 @@ controlled by command line switches:
-d display 50 characters per line, with word -d display 50 characters per line, with word
marks denoted by "1" on the line below marks denoted by "1" on the line below
In a CPU character display, word marks are denoted by ~. In a CPU character display, word marks are denoted by `.
Input parsing is controlled by the first character typed in or by command Input parsing is controlled by the first character typed in or by command
line switches: line switches:
@ -462,11 +487,11 @@ code representation character chains
10 8 10 8
11 9 11 9
12 0 12 0
13 # = in H chain 13 # or = = in H chain
14 @ ' in H chain 14 @ or ' ' in H chain
15 : blank in A, H chains 15 : blank in A, H chains
16 > blank in A, H chains 16 > blank in A, H chains
17 ( tape mark blank in A, H chains 17 { tape mark blank in A, H chains
20 ^ alternate blank blank in A, H chains 20 ^ alternate blank blank in A, H chains
21 / 21 /
22 S 22 S
@ -477,12 +502,12 @@ code representation character chains
27 X 27 X
30 Y 30 Y
31 Z 31 Z
32 ' record mark 32 | record mark
33 , 33 ,
34 % ( in H chain 34 % or ( ( in H chain
35 = word mark blank in A, H chains 35 ~ word mark blank in A, H chains
36 \ blank in A, H chains 36 \ blank in A, H chains
37 + blank in A, H chains 37 " blank in A, H chains
40 - 40 -
41 J 41 J
42 K 42 K
@ -514,4 +539,32 @@ code representation character chains
74 ) lozenge 74 ) lozenge
75 [ blank in A, H chains 75 [ blank in A, H chains
76 < blank in A, H chains 76 < blank in A, H chains
77 " group mark blank in A, H chains 77 } group mark blank in A, H chains
2.8 Old Conversions
Starting with V3.5-1, the 1401 simulator was changed to use the same character
set as the 7094 (and other 7094 simulators). This involved the following changes
code V3.5-0 or earlier V3.5-1 or later
13 # # or = on input
14 @ @ or ' on input
17 ( {
32 ' |
34 % % or ( on input
35 = ~
37 + "
60 & & or + on input
77 " }
In addition, the word mark indicator was changed from ~ to `.
The 1401 simulator can be set to operate with either set of conventions:
SET CPU OLDCONVERSIONS
SET CPU NEWCONVERSIONS
The default is NEWCONVERSIONS.

24
I1401/i1401_iq.c
View file

@ -25,6 +25,7 @@
inq 1407 inquiry terminal inq 1407 inquiry terminal
20-Sep-05 RMS Revised for new code tables
22-Dec-02 RMS Added break support 22-Dec-02 RMS Added break support
07-Sep-01 RMS Moved function prototypes 07-Sep-01 RMS Moved function prototypes
14-Apr-99 RMS Changed t_addr to unsigned 14-Apr-99 RMS Changed t_addr to unsigned
@ -33,11 +34,14 @@
#include "i1401_defs.h" #include "i1401_defs.h"
#include <ctype.h> #include <ctype.h>
#define UNIT_V_PCH (UNIT_V_UF + 0) /* output conv */
#define UNIT_PCH (1 << UNIT_V_PCH)
extern volatile int32 stop_cpu; extern volatile int32 stop_cpu;
extern uint8 M[]; extern uint8 M[];
extern int32 BS, iochk, ind[64]; extern int32 BS, iochk, ind[64];
extern char ascii_to_bcd[128], bcd_to_ascii[64];
extern UNIT cpu_unit; extern UNIT cpu_unit;
extern t_bool conv_old;
int32 inq_char = 033; /* request inq */ int32 inq_char = 033; /* request inq */
t_stat inq_svc (UNIT *uptr); t_stat inq_svc (UNIT *uptr);
@ -62,8 +66,14 @@ REG inq_reg[] = {
{ NULL } { NULL }
}; };
MTAB inq_mod[] = {
{ UNIT_PCH, 0, "business set", "BUSINESS" },
{ UNIT_PCH, UNIT_PCH, "Fortran set", "FORTRAN" },
{ 0 }
};
DEVICE inq_dev = { DEVICE inq_dev = {
"INQ", &inq_unit, inq_reg, NULL, "INQ", &inq_unit, inq_reg, inq_mod,
1, 10, 31, 1, 8, 7, 1, 10, 31, 1, 8, 7,
NULL, NULL, &inq_reset, NULL, NULL, &inq_reset,
NULL, NULL, NULL NULL, NULL, NULL
@ -77,6 +87,7 @@ DEVICE inq_dev = {
t_stat inq_io (int32 flag, int32 mod) t_stat inq_io (int32 flag, int32 mod)
{ {
int32 i, t, wm_seen = 0; int32 i, t, wm_seen = 0;
t_bool use_h = inq_unit.flags & UNIT_PCH;
ind[IN_INC] = 0; /* clear inq clear */ ind[IN_INC] = 0; /* clear inq clear */
switch (mod) { /* case on mod */ switch (mod) { /* case on mod */
@ -103,11 +114,11 @@ switch (mod) { /* case on mod */
if (flag == MD_WM) { /* word mark mode? */ if (flag == MD_WM) { /* word mark mode? */
if ((t == '~') && (wm_seen == 0)) wm_seen = WM; if ((t == '~') && (wm_seen == 0)) wm_seen = WM;
else { else {
M[BS] = wm_seen | ascii_to_bcd[t]; M[BS] = wm_seen | ascii2bcd (t);
wm_seen = 0; wm_seen = 0;
} }
} }
else M[BS] = (M[BS] & WM) | ascii_to_bcd[t]; else M[BS] = (M[BS] & WM) | ascii2bcd (t);
if (!wm_seen) BS++; if (!wm_seen) BS++;
if (ADDR_ERR (BS)) { if (ADDR_ERR (BS)) {
BS = BA | (BS % MAXMEMSIZE); BS = BA | (BS % MAXMEMSIZE);
@ -122,10 +133,11 @@ switch (mod) { /* case on mod */
for (i = 0; (t = M[BS++]) != (BCD_GRPMRK + WM); i++) { for (i = 0; (t = M[BS++]) != (BCD_GRPMRK + WM); i++) {
if ((flag == MD_WM) && (t & WM)) { if ((flag == MD_WM) && (t & WM)) {
if (i && ((i % INQ_WIDTH) == 0)) puts_tty ("\r\n"); if (i && ((i % INQ_WIDTH) == 0)) puts_tty ("\r\n");
sim_putchar ('~'); if (conv_old) sim_putchar ('~');
else sim_putchar ('`');
} }
if (i && ((i % INQ_WIDTH) == 0)) puts_tty ("\r\n"); if (i && ((i % INQ_WIDTH) == 0)) puts_tty ("\r\n");
sim_putchar (bcd_to_ascii[t & CHAR]); sim_putchar (bcd2ascii (t & CHAR, use_h));
if (ADDR_ERR (BS)) { if (ADDR_ERR (BS)) {
BS = BA | (BS % MAXMEMSIZE); BS = BA | (BS % MAXMEMSIZE);
return STOP_NXM; return STOP_NXM;

63
I1401/i1401_lp.c
View file

@ -34,8 +34,11 @@
#include "i1401_defs.h" #include "i1401_defs.h"
extern uint8 M[]; extern uint8 M[];
extern char bcd_to_ascii[64]; extern char bcd_to_ascii_old[64];
extern char bcd_to_ascii_a[64], bcd_to_ascii_h[64];
extern char bcd_to_pca[64], bcd_to_pch[64];
extern int32 iochk, ind[64]; extern int32 iochk, ind[64];
extern t_bool conv_old;
int32 cct[CCT_LNT] = { 03 }; int32 cct[CCT_LNT] = { 03 };
int32 cctlnt = 66, cctptr = 0, lines = 0, lflag = 0; int32 cctlnt = 66, cctptr = 0, lines = 0, lflag = 0;
@ -44,42 +47,18 @@ t_stat lpt_reset (DEVICE *dptr);
t_stat lpt_attach (UNIT *uptr, char *cptr); t_stat lpt_attach (UNIT *uptr, char *cptr);
t_stat space (int32 lines, int32 lflag); t_stat space (int32 lines, int32 lflag);
char bcd_to_pca[64] = { char *pch_table_old[4] = {
' ', '1', '2', '3', '4', '5', '6', '7', bcd_to_ascii_old, bcd_to_pca, bcd_to_pch, bcd_to_ascii_old
'8', '9', '0', '#', '@', ' ', ' ', ' ',
' ', '/', 'S', 'T', 'U', 'V', 'W', 'X',
'Y', 'Z', ' ', ',', '%', ' ', ' ', ' ',
'-', 'J', 'K', 'L', 'M', 'N', 'O', 'P',
'Q', 'R', '-', '$', '*', ' ', ' ', ' ',
'&', 'A', 'B', 'C', 'D', 'E', 'F', 'G',
'H', 'I', '&', '.', ')', ' ', ' ', ' '
}; };
char bcd_to_pch[64] = {
' ', '1', '2', '3', '4', '5', '6', '7',
'8', '9', '0', '=', '\'', ' ', ' ', ' ',
' ', '/', 'S', 'T', 'U', 'V', 'W', 'X',
'Y', 'Z', ' ', ',', '(', ' ', ' ', ' ',
'-', 'J', 'K', 'L', 'M', 'N', 'O', 'P',
'Q', 'R', '-', '$', '*', ' ', ' ', ' ',
'&', 'A', 'B', 'C', 'D', 'E', 'F', 'G',
'H', 'I', '&', '.', ')', ' ', ' ', ' '
};
char *pch_table[4] = { char *pch_table[4] = {
bcd_to_ascii, bcd_to_pca, bcd_to_pch, bcd_to_ascii bcd_to_ascii_a, bcd_to_pca, bcd_to_pch, bcd_to_ascii_h
}; };
#define UNIT_V_PCHAIN (UNIT_V_UF + 0) #define UNIT_V_FT (UNIT_V_UF + 0)
#define UNIT_M_PCHAIN 03 #define UNIT_V_48 (UNIT_V_UF + 1)
#define M_PCF 00 /* full */ #define UNIT_FT (1 << UNIT_V_FT)
#define M_PCA 01 /* business */ #define UNIT_48 (1 << UNIT_V_48)
#define M_PCH 02 /* Fortran */ #define GET_PCHAIN(x) (((x) >> UNIT_V_FT) & (UNIT_FT|UNIT_48))
#define UNIT_PCHAIN (UNIT_M_PCHAIN << UNIT_V_PCHAIN)
#define PCF (M_PCF << UNIT_V_PCHAIN)
#define PCA (M_PCA << UNIT_V_PCHAIN)
#define PCH (M_PCH << UNIT_V_PCHAIN)
#define GET_PCHAIN(x) (((x) >> UNIT_V_PCHAIN) & UNIT_M_PCHAIN)
#define CHP(ch,val) ((val) & (1 << (ch))) #define CHP(ch,val) ((val) & (1 << (ch)))
/* LPT data structures /* LPT data structures
@ -104,9 +83,13 @@ REG lpt_reg[] = {
}; };
MTAB lpt_mod[] = { MTAB lpt_mod[] = {
{ UNIT_PCHAIN, PCF, "F chain", "PCF", NULL }, { UNIT_48, UNIT_48, "48 character chain", "48" },
{ UNIT_PCHAIN, PCA, "A chain", "PCA", NULL }, { UNIT_48, 0, "64 character chain", "64" },
{ UNIT_PCHAIN, PCH, "H chain", "PCH", NULL }, { UNIT_FT, UNIT_FT, "Fortran set", "FORTRAN" },
{ UNIT_FT, 0, "business set", "BUSINESS" },
{ UNIT_FT|UNIT_48, 0, NULL, "PCF" }, /* obsolete */
{ UNIT_FT|UNIT_48, UNIT_48, NULL, "PCA" },
{ UNIT_FT|UNIT_48, UNIT_FT|UNIT_48, NULL, "PCH" },
{ 0 } { 0 }
}; };
@ -127,18 +110,20 @@ DEVICE lpt_dev = {
t_stat write_line (int32 ilnt, int32 mod) t_stat write_line (int32 ilnt, int32 mod)
{ {
int32 i, t, wm, sup; int32 i, t, wm, sup;
char *pch; char *bcd2asc;
static char lbuf[LPT_WIDTH + 1]; /* + null */ static char lbuf[LPT_WIDTH + 1]; /* + null */
if ((lpt_unit.flags & UNIT_ATT) == 0) return SCPE_UNATT; /* attached? */ if ((lpt_unit.flags & UNIT_ATT) == 0) return SCPE_UNATT; /* attached? */
wm = ((ilnt == 2) || (ilnt == 5)) && (mod == BCD_SQUARE); wm = ((ilnt == 2) || (ilnt == 5)) && (mod == BCD_SQUARE);
sup = ((ilnt == 2) || (ilnt == 5)) && (mod == BCD_S); sup = ((ilnt == 2) || (ilnt == 5)) && (mod == BCD_S);
ind[IN_LPT] = 0; /* clear error */ ind[IN_LPT] = 0; /* clear error */
pch = pch_table[GET_PCHAIN (lpt_unit.flags)]; /* get print chain */ if (conv_old) /* get print chain */
bcd2asc = pch_table_old[GET_PCHAIN (lpt_unit.flags)];
else bcd2asc = pch_table[GET_PCHAIN (lpt_unit.flags)];
for (i = 0; i < LPT_WIDTH; i++) { /* convert print buf */ for (i = 0; i < LPT_WIDTH; i++) { /* convert print buf */
t = M[LPT_BUF + i]; t = M[LPT_BUF + i];
if (wm) lbuf[i] = (t & WM)? '1': ' '; /* wmarks -> 1 or sp */ if (wm) lbuf[i] = (t & WM)? '1': ' '; /* wmarks -> 1 or sp */
else lbuf[i] = pch[t & CHAR]; /* normal */ else lbuf[i] = bcd2asc[t & CHAR]; /* normal */
} }
lbuf[LPT_WIDTH] = 0; /* trailing null */ lbuf[LPT_WIDTH] = 0; /* trailing null */
for (i = LPT_WIDTH - 1; (i >= 0) && (lbuf[i] == ' '); i--) lbuf[i] = 0; for (i = LPT_WIDTH - 1; (i >= 0) && (lbuf[i] == ' '); i--) lbuf[i] = 0;

46
I1401/i1401_mt.c
View file

@ -25,6 +25,8 @@
mt 7-track magtape mt 7-track magtape
15-Sep-05 RMS Yet another fix to load read group mark plus word mark
Added debug printouts (from Van Snyder)
26-Aug-05 RMS Revised to use API for write lock check 26-Aug-05 RMS Revised to use API for write lock check
16-Aug-03 RMS End-of-record on load read works like move read 16-Aug-03 RMS End-of-record on load read works like move read
(verified on real 1401) (verified on real 1401)
@ -72,11 +74,14 @@
#define MT_NUMDR 7 /* #drives */ #define MT_NUMDR 7 /* #drives */
#define MT_MAXFR (MAXMEMSIZE * 2) /* max transfer */ #define MT_MAXFR (MAXMEMSIZE * 2) /* max transfer */
uint8 dbuf[MT_MAXFR]; /* tape buffer */
extern uint8 M[]; /* memory */ extern uint8 M[]; /* memory */
extern int32 ind[64]; extern int32 ind[64];
extern int32 BS, iochk; extern int32 BS, iochk;
extern UNIT cpu_unit; extern UNIT cpu_unit;
uint8 dbuf[MT_MAXFR]; /* tape buffer */ extern FILE *sim_deb;
t_stat mt_reset (DEVICE *dptr); t_stat mt_reset (DEVICE *dptr);
t_stat mt_boot (int32 unitno, DEVICE *dptr); t_stat mt_boot (int32 unitno, DEVICE *dptr);
t_stat mt_map_status (t_stat st); t_stat mt_map_status (t_stat st);
@ -130,7 +135,8 @@ DEVICE mt_dev = {
"MT", mt_unit, mt_reg, mt_mod, "MT", mt_unit, mt_reg, mt_mod,
MT_NUMDR, 10, 31, 1, 8, 8, MT_NUMDR, 10, 31, 1, 8, 8,
NULL, NULL, &mt_reset, NULL, NULL, &mt_reset,
&mt_boot, &sim_tape_attach, &sim_tape_detach &mt_boot, &sim_tape_attach, &sim_tape_detach,
NULL, DEV_DEBUG
}; };
/* Function routine /* Function routine
@ -153,28 +159,40 @@ if ((uptr->flags & UNIT_ATT) == 0) return SCPE_UNATT; /* attached? */
switch (mod) { /* case on modifier */ switch (mod) { /* case on modifier */
case BCD_A: /* diagnostic read */ case BCD_A: /* diagnostic read */
if (DEBUG_PRS (mt_dev)) fprintf (sim_deb,
">>MT%d: diagnostic read\n", unit);
ind[IN_END] = 0; /* clear end of file */ ind[IN_END] = 0; /* clear end of file */
st = sim_tape_sprecf (uptr, &tbc); /* space fwd */ st = sim_tape_sprecf (uptr, &tbc); /* space fwd */
break; break;
case BCD_B: /* backspace */ case BCD_B: /* backspace */
if (DEBUG_PRS (mt_dev)) fprintf (sim_deb,
">>MT%d: backspace\n", unit);
ind[IN_END] = 0; /* clear end of file */ ind[IN_END] = 0; /* clear end of file */
st = sim_tape_sprecr (uptr, &tbc); /* space rev */ st = sim_tape_sprecr (uptr, &tbc); /* space rev */
break; /* end case */ break; /* end case */
case BCD_E: /* erase = nop */ case BCD_E: /* erase = nop */
if (DEBUG_PRS (mt_dev)) fprintf (sim_deb,
">>MT%d: erase\n", unit);
if (sim_tape_wrp (uptr)) return STOP_MTL; if (sim_tape_wrp (uptr)) return STOP_MTL;
return SCPE_OK; return SCPE_OK;
case BCD_M: /* write tapemark */ case BCD_M: /* write tapemark */
if (DEBUG_PRS (mt_dev)) fprintf (sim_deb,
">>MT%d: write tape mark\n", unit);
st = sim_tape_wrtmk (uptr); /* write tmk */ st = sim_tape_wrtmk (uptr); /* write tmk */
break; break;
case BCD_R: /* rewind */ case BCD_R: /* rewind */
if (DEBUG_PRS (mt_dev)) fprintf (sim_deb,
">>MT%d: rewind\n", unit);
sim_tape_rewind (uptr); /* update position */ sim_tape_rewind (uptr); /* update position */
return SCPE_OK; return SCPE_OK;
case BCD_U: /* unload */ case BCD_U: /* unload */
if (DEBUG_PRS (mt_dev)) fprintf (sim_deb,
">>MT%d: rewind and unload\n", unit);
sim_tape_rewind (uptr); /* update position */ sim_tape_rewind (uptr); /* update position */
return detach_unit (uptr); /* detach */ return detach_unit (uptr); /* detach */
@ -214,13 +232,21 @@ if ((uptr->flags & UNIT_ATT) == 0) return SCPE_UNATT; /* attached? */
switch (mod) { switch (mod) {
case BCD_R: /* read */ case BCD_R: /* read */
if (DEBUG_PRS (mt_dev))
fprintf (sim_deb, ">>MT%d: read from %d", unit, BS);
ind[IN_TAP] = ind[IN_END] = 0; /* clear error */ ind[IN_TAP] = ind[IN_END] = 0; /* clear error */
wm_seen = 0; /* no word mk seen */ wm_seen = 0; /* no word mk seen */
st = sim_tape_rdrecf (uptr, dbuf, &tbc, MT_MAXFR); /* read rec */ st = sim_tape_rdrecf (uptr, dbuf, &tbc, MT_MAXFR); /* read rec */
if (st == MTSE_RECE) ind[IN_TAP] = 1; /* rec in error? */ if (st == MTSE_RECE) ind[IN_TAP] = 1; /* rec in error? */
else if (st != MTSE_OK) break; /* stop on error */ else if (st != MTSE_OK) { /* stop on error */
if (DEBUG_PRS (mt_dev))
fprintf (sim_deb, ", stopped by status = %d\n", st);
break;
}
for (i = 0; i < tbc; i++) { /* loop thru buf */ for (i = 0; i < tbc; i++) { /* loop thru buf */
if (M[BS] == (BCD_GRPMRK + WM)) { /* GWM in memory? */ if (M[BS] == (BCD_GRPMRK + WM)) { /* GWM in memory? */
if (DEBUG_PRS (mt_dev))
fprintf (sim_deb, " to %d, stopped by GMWM\n", BS);
BS++; /* incr BS */ BS++; /* incr BS */
if (ADDR_ERR (BS)) { /* test for wrap */ if (ADDR_ERR (BS)) { /* test for wrap */
BS = BA | (BS % MAXMEMSIZE); BS = BA | (BS % MAXMEMSIZE);
@ -244,11 +270,12 @@ switch (mod) {
return STOP_WRAP; return STOP_WRAP;
} }
} }
/* if (M[BS] != (BCD_GRPMRK + WM)) { /* not GM+WM at end? */ if (M[BS] != (BCD_GRPMRK + WM)) { /* not GM+WM at end? */
/* if (flag == MD_WM) M[BS] = BCD_GRPMRK; /* LCA: clear WM */ if (flag == MD_WM) M[BS] = BCD_GRPMRK; /* LCA: clear WM */
/* else M[BS] = (M[BS] & WM) | BCD_GRPMRK; /* MCW: save WM */ else M[BS] = (M[BS] & WM) | BCD_GRPMRK; /* MCW: save WM */
/* } */ }
M[BS] = (M[BS] & WM) | BCD_GRPMRK; /* write GM, save WM */ if (DEBUG_PRS (mt_dev))
fprintf (sim_deb, " to %d, stopped by EOR\n", BS);
BS++; /* adv BS */ BS++; /* adv BS */
if (ADDR_ERR (BS)) { /* check final BS */ if (ADDR_ERR (BS)) { /* check final BS */
BS = BA | (BS % MAXMEMSIZE); BS = BA | (BS % MAXMEMSIZE);
@ -259,6 +286,8 @@ switch (mod) {
case BCD_W: case BCD_W:
if (sim_tape_wrp (uptr)) return STOP_MTL; /* locked? */ if (sim_tape_wrp (uptr)) return STOP_MTL; /* locked? */
if (M[BS] == (BCD_GRPMRK + WM)) return STOP_MTZ;/* eor? */ if (M[BS] == (BCD_GRPMRK + WM)) return STOP_MTZ;/* eor? */
if (DEBUG_PRS (mt_dev))
fprintf (sim_deb, ">>MT%d: write from %d", unit, BS);
ind[IN_TAP] = ind[IN_END] = 0; /* clear error */ ind[IN_TAP] = ind[IN_END] = 0; /* clear error */
for (tbc = 0; (t = M[BS++]) != (BCD_GRPMRK + WM); ) { for (tbc = 0; (t = M[BS++]) != (BCD_GRPMRK + WM); ) {
if ((t & WM) && (flag == MD_WM)) dbuf[tbc++] = BCD_WM; if ((t & WM) && (flag == MD_WM)) dbuf[tbc++] = BCD_WM;
@ -270,6 +299,7 @@ switch (mod) {
return STOP_WRAP; return STOP_WRAP;
} }
} }
if (DEBUG_PRS (mt_dev)) fprintf (sim_deb, " to %d\n", BS - 1);
st = sim_tape_wrrecf (uptr, dbuf, tbc); /* write record */ st = sim_tape_wrrecf (uptr, dbuf, tbc); /* write record */
if (ADDR_ERR (BS)) { /* check final BS */ if (ADDR_ERR (BS)) { /* check final BS */
BS = BA | (BS % MAXMEMSIZE); BS = BA | (BS % MAXMEMSIZE);

66
I1401/i1401_sys.c
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
20-Sep-05 RMS Revised for new code tables
04-Jan-05 WVS Added address argument support 04-Jan-05 WVS Added address argument support
14-Nov-04 WVS Added data printout support 14-Nov-04 WVS Added data printout support
16-Mar-03 RMS Fixed mnemonic for MCS 16-Mar-03 RMS Fixed mnemonic for MCS
@ -47,11 +48,13 @@ extern DEVICE dp_dev, mt_dev;
extern UNIT cpu_unit; extern UNIT cpu_unit;
extern REG cpu_reg[]; extern REG cpu_reg[];
extern uint8 M[]; extern uint8 M[];
extern char bcd_to_ascii[64], ascii_to_bcd[128]; extern char ascii_to_bcd_old[128], ascii_to_bcd[128];
extern char bcd_to_ascii_old[64], bcd_to_ascii_a[64], bcd_to_ascii_h[64];
extern char *get_glyph (char *cptr, char *gbuf, char term); extern char *get_glyph (char *cptr, char *gbuf, char term);
extern int32 store_addr_h (int32 addr); extern int32 store_addr_h (int32 addr);
extern int32 store_addr_t (int32 addr); extern int32 store_addr_t (int32 addr);
extern int32 store_addr_u (int32 addr); extern int32 store_addr_u (int32 addr);
extern t_bool conv_old;
/* SCP data structures and interface routines /* SCP data structures and interface routines
@ -187,14 +190,15 @@ return;
/* Print unknown opcode as data */ /* Print unknown opcode as data */
t_stat dcw (FILE *of, int32 op, t_value *val) t_stat dcw (FILE *of, int32 op, t_value *val, int32 sw)
{ {
int32 i; int32 i;
t_bool use_h = sw & SWMASK ('F');
fprintf (of, "DCW @%c", bcd_to_ascii[op]); /* assume it's data */ fprintf (of, "DCW @%c", bcd2ascii (op, use_h)); /* assume it's data */
for (i = 1; i < sim_emax; i++) { for (i = 1; i < sim_emax; i++) {
if (val[i] & WM) break; if (val[i] & WM) break;
fprintf (of, "%c", bcd_to_ascii[val[i]]); fprintf (of, "%c", bcd2ascii (val[i], use_h));
} }
fprintf (of, "@"); fprintf (of, "@");
return -(i - 1); /* return # chars */ return -(i - 1); /* return # chars */
@ -219,12 +223,16 @@ t_stat fprint_sym (FILE *of, t_addr addr, t_value *val,
UNIT *uptr, int32 sw) UNIT *uptr, int32 sw)
{ {
int32 op, flags, ilnt, i, t; int32 op, flags, ilnt, i, t;
int32 wmch = conv_old? '~': '`';
t_bool use_h = sw & SWMASK ('F');
extern int32 op_table[64], len_table[9]; extern int32 op_table[64], len_table[9];
if (sw & SWMASK ('C')) { /* character? */ if (sw & SWMASK ('C')) { /* character? */
t = val[0]; t = val[0];
if (uptr->flags & UNIT_BCD) if (uptr->flags & UNIT_BCD) {
fprintf (of, (t & WM)? "~%c": "%c", bcd_to_ascii[t & CHAR]); if (t & WM) fputc (wmch, of);
fputc (bcd2ascii (t & CHAR, use_h), of);
}
else fprintf (of, FMTASC (t & 0177)); else fprintf (of, FMTASC (t & 0177));
return SCPE_OK; return SCPE_OK;
} }
@ -232,17 +240,18 @@ if ((uptr != NULL) && (uptr != &cpu_unit)) /* CPU? */
return SCPE_ARG; return SCPE_ARG;
if (sw & SWMASK ('D')) { /* dump? */ if (sw & SWMASK ('D')) { /* dump? */
for (i = 0; i < 50; i++) for (i = 0; i < 50; i++)
fprintf (of, "%c", bcd_to_ascii[val[i]&CHAR]) ; fprintf (of, "%c", bcd2ascii (val[i] & CHAR, use_h)) ;
fprintf (of, "\n\t"); fprintf (of, "\n\t");
for (i = 0; i < 50; i++) for (i = 0; i < 50; i++)
fprintf (of, (val[i]&WM)? "1": " ") ; fprintf (of, (val[i] & WM)? "1": " ") ;
return -(i - 1); return -(i - 1);
} }
if (sw & SWMASK ('S')) { /* string? */ if (sw & SWMASK ('S')) { /* string? */
i = 0; i = 0;
do { do {
t = val[i++]; t = val[i++];
fprintf (of, (t & WM)? "~%c": "%c", bcd_to_ascii[t & CHAR]); if (t & WM) fputc (wmch, of);
fputc (bcd2ascii (t & CHAR, use_h), of);
} while ((i < LINE_LNT) && ((val[i] & WM) == 0)); } while ((i < LINE_LNT) && ((val[i] & WM) == 0));
return -(i - 1); return -(i - 1);
} }
@ -250,7 +259,7 @@ if ((sw & SWMASK ('M')) == 0) return SCPE_ARG;
if ((val[0] & WM) == 0) return STOP_NOWM; /* WM under op? */ if ((val[0] & WM) == 0) return STOP_NOWM; /* WM under op? */
op = val[0]& CHAR; /* isolate op */ op = val[0]& CHAR; /* isolate op */
if (opcode[op] == NULL) return dcw (of, op, val); /* invalid op */ if (opcode[op] == NULL) return dcw (of, op, val, sw); /* invalid op */
flags = op_table[op]; /* get flags */ flags = op_table[op]; /* get flags */
for (ilnt = 1; ilnt < sim_emax; ilnt++) { /* find inst lnt */ for (ilnt = 1; ilnt < sim_emax; ilnt++) { /* find inst lnt */
if (val[ilnt] & WM) break; if (val[ilnt] & WM) break;
@ -266,16 +275,17 @@ if (ilnt == 3) { /* lnt = 3? */
if ((((flags & len_table[ilnt]) == 0) && /* invalid lnt, */ if ((((flags & len_table[ilnt]) == 0) && /* invalid lnt, */
(op != OP_NOP)) || /* not nop? */ (op != OP_NOP)) || /* not nop? */
(opcode[op] == NULL)) /* or undef? */ (opcode[op] == NULL)) /* or undef? */
return dcw (of, op, val); return dcw (of, op, val, sw);
fprintf (of, "%s",opcode[op]); /* print opcode */ fprintf (of, "%s",opcode[op]); /* print opcode */
if (ilnt > 2) { /* A address? */ if (ilnt > 2) { /* A address? */
if (((flags & IO) || (op == OP_NOP)) && (val[1] == BCD_PERCNT)) if (((flags & IO) || (op == OP_NOP)) && (val[1] == BCD_PERCNT))
fprintf (of, " %%%c%c", bcd_to_ascii[val[2]], bcd_to_ascii[val[3]]); fprintf (of, " %%%c%c", bcd2ascii (val[2], use_h),
bcd2ascii (val[3], sw));
else fprint_addr (of, &val[1]); else fprint_addr (of, &val[1]);
} }
if (ilnt > 5) fprint_addr (of, &val[4]); /* B address? */ if (ilnt > 5) fprint_addr (of, &val[4]); /* B address? */
if ((ilnt == 2) || (ilnt == 5) || (ilnt == 8)) /* d character? */ if ((ilnt == 2) || (ilnt == 5) || (ilnt == 8)) /* d character? */
fprintf (of, " '%c", bcd_to_ascii[val[ilnt - 1]]); fprintf (of, " '%c", bcd2ascii (val[ilnt - 1], use_h));
return -(ilnt - 1); /* return # chars */ return -(ilnt - 1); /* return # chars */
} }
@ -310,8 +320,8 @@ t_stat get_io (char *cptr, t_value *val)
if ((cptr[0] != '%') || (cptr[3] != 0) || !isalnum (cptr[1]) || if ((cptr[0] != '%') || (cptr[3] != 0) || !isalnum (cptr[1]) ||
!isalnum (cptr[2])) return SCPE_ARG; !isalnum (cptr[2])) return SCPE_ARG;
val[0] = BCD_PERCNT; val[0] = BCD_PERCNT;
val[1] = ascii_to_bcd[cptr[1]]; val[1] = ascii2bcd (cptr[1]);
val[2] = ascii_to_bcd[cptr[2]]; val[2] = ascii2bcd (cptr[2]);
return SCPE_OK; return SCPE_OK;
} }
@ -331,20 +341,21 @@ return SCPE_OK;
t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw) t_stat parse_sym (char *cptr, t_addr addr, UNIT *uptr, t_value *val, int32 sw)
{ {
int32 i, op, ilnt, t, cflag, wm_seen; int32 i, op, ilnt, t, cflag, wm_seen;
int32 wmch = conv_old? '~': '`';
extern int32 op_table[64], len_table[9]; extern int32 op_table[64], len_table[9];
char gbuf[CBUFSIZE]; char gbuf[CBUFSIZE];
cflag = (uptr == NULL) || (uptr == &cpu_unit); cflag = (uptr == NULL) || (uptr == &cpu_unit);
while (isspace (*cptr)) cptr++; /* absorb spaces */ while (isspace (*cptr)) cptr++; /* absorb spaces */
if ((sw & SWMASK ('C')) || (sw & SWMASK ('S')) || (*cptr == '~') || if ((sw & SWMASK ('C')) || (sw & SWMASK ('S')) || (*cptr == wmch) ||
((*cptr == '\'') && cptr++) || ((*cptr == '"') && cptr++)) { ((*cptr == '\'') && cptr++) || ((*cptr == '"') && cptr++)) {
wm_seen = 0; wm_seen = 0;
for (i = 0; (i < sim_emax) && (*cptr != 0); ) { for (i = 0; (i < sim_emax) && (*cptr != 0); ) {
t = *cptr++; /* get character */ t = *cptr++; /* get character */
if (cflag && (wm_seen == 0) && (t == '~')) wm_seen = WM; if (cflag && (wm_seen == 0) && (t == wmch)) wm_seen = WM;
else if (uptr->flags & UNIT_BCD) { else if (uptr->flags & UNIT_BCD) {
if (t < 040) return SCPE_ARG; if (t < 040) return SCPE_ARG;
val[i++] = ascii_to_bcd[t] | wm_seen; val[i++] = ascii2bcd (t) | wm_seen;
wm_seen = 0; wm_seen = 0;
} }
else val[i++] = t; else val[i++] = t;
@ -375,10 +386,27 @@ if ((gbuf[0] == '\'') || (gbuf[0] == '"')) { /* d character? */
t = gbuf[1]; t = gbuf[1];
if ((gbuf[2] != 0) || (*cptr != 0) || (t < 040)) if ((gbuf[2] != 0) || (*cptr != 0) || (t < 040))
return SCPE_ARG; /* end and legal? */ return SCPE_ARG; /* end and legal? */
val[ilnt] = ascii_to_bcd[t]; /* save D char */ val[ilnt] = ascii2bcd (t); /* save D char */
ilnt = ilnt + 1; ilnt = ilnt + 1;
} }
else if (gbuf[0] != 0) return SCPE_ARG; /* not done? */ else if (gbuf[0] != 0) return SCPE_ARG; /* not done? */
if ((op_table[op] & len_table[ilnt]) == 0) return STOP_INVL; if ((op_table[op] & len_table[ilnt]) == 0) return STOP_INVL;
return -(ilnt - 1); return -(ilnt - 1);
} }
/* Convert BCD to ASCII */
int32 bcd2ascii (int32 c, t_bool use_h)
{
if (conv_old) return bcd_to_ascii_old[c];
else if (use_h) return bcd_to_ascii_h[c];
else return bcd_to_ascii_a[c];
}
/* Convert ASCII to BCD */
int32 ascii2bcd (int32 c)
{
if (conv_old) return ascii_to_bcd_old[c];
else return ascii_to_bcd[c];
}

60
I1620/i1620_cd.c
View file

@ -26,6 +26,7 @@
cdr 1622 card reader cdr 1622 card reader
cdp 1622 card punch cdp 1622 card punch
21-Sep-05 RMS Revised translation tables for 7094/1401 compatibility
25-Apr-03 RMS Revised for extended file support 25-Apr-03 RMS Revised for extended file support
Cards are represented as ASCII text streams terminated by newlines. Cards are represented as ASCII text streams terminated by newlines.
@ -112,25 +113,25 @@ const char cdr_to_num[128] = {
-1, 0x00, 0x00, -1, -1, 0x00, -1, -1, -1, 0x00, 0x00, -1, -1, 0x00, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, /* 10 */ -1, -1, -1, -1, -1, -1, -1, -1, /* 10 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
0x00, 0x1A, 0x1F, 0x00, 0x1B, 0x0A, 0x0F, 0x0A, /* !"#$%&' */ 0x00, 0x1A, 0x0F, 0x0B, 0x1B, 0x0C, 0x00, 0x0C, /* !"#$%&' */
0x0C, 0x0C, 0x1C, 0x00, 0x0B, 0x10, 0x1B, 0x01, /* ()*+,-./ */ 0x0C, 0x0C, 0x1C, 0x00, 0x0B, 0x10, 0x1B, 0x01, /* ()*+,-./ */
0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* 01234567 */ 0x00, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* 01234567 */
0x08, 0x09, 0x00, 0x1E, 0x1E, 0x0B, 0x0E, 0x1A, /* 89:;<=>? */ 0x08, 0x09, 0x00, 0x1E, 0x1E, 0x0B, 0x0E, 0x1A, /* 89:;<=>? */
0x0C, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* @ABCDEFG */ 0x0C, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* @ABCDEFG */
0x08, 0x09, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, /* HIJKLMNO */ 0x08, 0x09, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, /* HIJKLMNO */
0x17, 0x18, 0x19, 0x02, 0x03, 0x04, 0x05, 0x06, /* PQRSTUVW */ 0x17, 0x18, 0x19, 0x02, 0x03, 0x04, 0x05, 0x06, /* PQRSTUVW */
0x07, 0x08, 0x09, 0x00, 0x0E, 0x10, 0x0F, 0x1F, /* XYZ[\]^_ */ 0x07, 0x08, 0x09, 0x00, 0x0E, 0x10, 0x0A, 0x1F, /* XYZ[\]^_ */
-1, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* abcdefg */ -1, 0x01, 0x02, 0x03, 0x04, 0x05, 0x06, 0x07, /* `abcdefg */
0x08, 0x09, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, /* hijklmno */ 0x08, 0x09, 0x11, 0x12, 0x13, 0x14, 0x15, 0x16, /* hijklmno */
0x17, 0x18, 0x19, 0x02, 0x03, 0x04, 0x05, 0x06, /* pqrstuvw */ 0x17, 0x18, 0x19, 0x02, 0x03, 0x04, 0x05, 0x06, /* pqrstuvw */
0x07, 0x08, 0x09, -1, -1, -1, -1, -1 /* xyz */ 0x07, 0x08, 0x09, 0x0F, 0x0A, 0x1F, 0x00, -1 /* xyz{|}~ */
}; };
/* Numeric (flag + digit) to card punch (ASCII) */ /* Numeric (flag + digit) to card punch (ASCII) */
const char num_to_cdp[32] = { const char num_to_cdp[32] = {
'0', '1', '2', '3', '4', '5', '6', '7', /* 0 */ '0', '1', '2', '3', '4', '5', '6', '7', /* 0 */
'8', '9', '\'', ',', ' ', '&', ' ', '&', '8', '9', '|', ',', ' ', '"', ' ', '"',
']', 'J', 'K', 'L', 'M', 'N', 'O', 'P', /* F + 0 */ ']', 'J', 'K', 'L', 'M', 'N', 'O', 'P', /* F + 0 */
'Q', 'R', '!', '$', -1, -1, -1, '"' 'Q', 'R', '!', '$', -1, -1, -1, '"'
}; };
@ -141,7 +142,7 @@ const char num_to_cdp[32] = {
11-7-8 (_) reads as 5F 11-7-8 (_) reads as 5F
12-2-8 (?) reads inconsistently (here 02) 12-2-8 (?) reads inconsistently (here 02)
12-6-8 (<) reads inconsistently (here 5E) 12-6-8 (<) reads inconsistently (here 5E)
12-7-8 (") reads as 5F 12-7-8 (}) reads as 5F
*/ */
const char cdr_to_alp[128] = { const char cdr_to_alp[128] = {
@ -149,53 +150,53 @@ const char cdr_to_alp[128] = {
-1, 0x00, 0x00, -1, -1, 0x00, -1, -1, -1, 0x00, 0x00, -1, -1, 0x00, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, /* 10 */ -1, -1, -1, -1, -1, -1, -1, -1, /* 10 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
0x00, 0x5A, 0x5F, 0x60, 0x13, 0x0A, 0x0F, 0x0A, /* !"#$%&' */ 0x00, 0x5A, 0x0F, 0x33, 0x13, 0x24, 0x10, 0x34, /* !"#$%&' */
0x24, 0x04, 0x14, 0x10, 0x23, 0x20, 0x03, 0x21, /* ()*+,-./ */ 0x24, 0x04, 0x14, 0x10, 0x23, 0x20, 0x03, 0x21, /* ()*+,-./ */
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, /* 01234567 */ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, /* 01234567 */
0x78, 0x79, 0x70, 0x5E, 0x5E, 0x33, 0x0E, 0x02, /* 89:;<=>? */ 0x78, 0x79, 0x70, 0x5E, 0x5E, 0x33, 0x0E, 0x02, /* 89:;<=>? */
0x34, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, /* @ABCDEFG */ 0x34, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, /* @ABCDEFG */
0x48, 0x49, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, /* HIJKLMNO */ 0x48, 0x49, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, /* HIJKLMNO */
0x57, 0x58, 0x59, 0x62, 0x63, 0x64, 0x65, 0x66, /* PQRSTUVW */ 0x57, 0x58, 0x59, 0x62, 0x63, 0x64, 0x65, 0x66, /* PQRSTUVW */
0x67, 0x68, 0x69, 0x40, 0x0E, 0x50, 0x0F, 0x5F, /* XYZ[\]^_ */ 0x67, 0x68, 0x69, 0x40, 0x0E, 0x50, 0x0A, 0x5F, /* XYZ[\]^_ */
-1, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, /* abcdefg */ 0x50, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, /* `abcdefg */
0x48, 0x49, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, /* hijklmno */ 0x48, 0x49, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, /* hijklmno */
0x57, 0x58, 0x59, 0x62, 0x63, 0x64, 0x65, 0x66, /* pqrstuvw */ 0x57, 0x58, 0x59, 0x62, 0x63, 0x64, 0x65, 0x66, /* pqrstuvw */
0x67, 0x68, 0x69, -1, -1, -1, -1, -1 /* xyz */ 0x67, 0x68, 0x69, 0x0F, 0x0A, 0x5F, 0x60, -1 /* xyz{|}~ */
}; };
/* Alphameric (two digits) to card punch (ASCII). Oddities: /* Alphameric (two digits) to card punch (ASCII). Oddities:
02 -> 12-2-8 (?), symmetric 02 -> 12-2-8 (?), symmetric
07 -> 12-7-8 ("), reads as 5F 07 -> 12-7-8 (}), reads as 5F
12 -> 11-2-8 (!), reads as 5A 12 -> 11-2-8 (!), reads as 5A
15 -> 11,0 (]), reads as 50 15 -> 11,0 (`), reads as 50
22 -> 0-2-8 ('), reads as 0A 22 -> 0-2-8 (|), reads as 0A
32 -> 2-8 (%), reads as 0A 32 -> 2-8 (^), reads as 0A
5B -> 11-3-8 (=), reads as 13 5B -> 11-3-8 (=), reads as 13
6A -> 0-2-8 ('), reads as 0A 6A -> 0-2-8 (|), reads as 0A
6B -> 0-3-8 (,), reads as 23 6B -> 0-3-8 (,), reads as 23
AA -> 0-2-8 ('), reads as 0A AA -> 0-2-8 (|), reads as 0A
There is no way to punch 0-5-8 (#), 0-6-8 (\), There is no way to punch 0-5-8 (~), 0-6-8 (\),
11-5-8 (]), 11-6-8 (;), 11-7-8 (_), 11-5-8 (]), 11-6-8 (;), 11-7-8 (_),
12-5-8 ([), or 12-6-8 (<) 12-5-8 ([), or 12-6-8 (<)
*/ */
const char alp_to_cdp[256] = { const char alp_to_cdp[256] = {
' ', -1, '?', '.', ')', -1, -1, '"', /* 00 */ ' ', -1, '?', '.', ')', -1, -1, '}', /* 00 */
-1, -1, '\'', -1, -1, -1, -1, '&', -1, -1, '\'', -1, -1, -1, -1, '"',
'+', -1, '!', '$', '*', ']', -1, -1, /* 10 */ '+', -1, '!', '$', '*', ']', -1, -1, /* 10 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
'-', '/', '\'', ',', '(', -1, -1, -1, /* 20 */ '-', '/', '|', ',', '(', -1, -1, -1, /* 20 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, '%', '=', '@', ':', ' ', -1, /* 30 */ -1, -1, '^', '=', '@', ':', ' ', -1, /* 30 */
-1, -1, '\'', -1, -1, -1, -1, '&', -1, -1, '|', -1, -1, -1, -1, '"',
-1, 'A', 'B', 'C', 'D', 'E', 'F', 'G', /* 40 */ -1, 'A', 'B', 'C', 'D', 'E', 'F', 'G', /* 40 */
'H', 'I', -1, -1, -1, -1, -1, -1, 'H', 'I', -1, -1, -1, -1, -1, -1,
'_', 'J', 'K', 'L', 'M', 'N', 'O', 'P', /* 50 */ '_', 'J', 'K', 'L', 'M', 'N', 'O', 'P', /* 50 */
'Q', 'R', '?', '=', -1, -1, -1, '"', 'Q', 'R', '?', '=', -1, -1, -1, '}',
-1, '/', 'S', 'T', 'U', 'V', 'W', 'X', /* 60 */ -1, '/', 'S', 'T', 'U', 'V', 'W', 'X', /* 60 */
'Y', 'Z', '\'', ',', -1, -1, -1, -1, 'Y', 'Z', '|', ',', -1, -1, -1, -1,
'0', '1', '2', '3', '4', '5', '6', '7', /* 70 */ '0', '1', '2', '3', '4', '5', '6', '7', /* 70 */
'8', '9', -1, -1, -1, -1, -1, -1, '8', '9', -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, /* 80 */ -1, -1, -1, -1, -1, -1, -1, -1, /* 80 */
@ -203,7 +204,7 @@ const char alp_to_cdp[256] = {
-1, -1, -1, -1, -1, -1, -1, -1, /* 90 */ -1, -1, -1, -1, -1, -1, -1, -1, /* 90 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, /* A0 */ -1, -1, -1, -1, -1, -1, -1, -1, /* A0 */
-1, -1, '\'', -1, -1, -1, -1, -1, -1, -1, '|', -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, /* B0 */ -1, -1, -1, -1, -1, -1, -1, -1, /* B0 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, /* C0 */ -1, -1, -1, -1, -1, -1, -1, -1, /* C0 */
@ -227,8 +228,9 @@ t_stat cdr (uint32 op, uint32 pa, uint32 f0, uint32 f1)
{ {
int32 i; int32 i;
int8 cdc; int8 cdc;
t_stat r, inv = SCPE_OK; t_stat r, sta;
sta = SCPE_OK; /* assume ok */
switch (op) { /* case on op */ switch (op) { /* case on op */
case OP_RN: /* read numeric */ case OP_RN: /* read numeric */
@ -238,7 +240,7 @@ switch (op) { /* case on op */
cdc = cdr_to_num[cdr_buf[i]]; /* translate */ cdc = cdr_to_num[cdr_buf[i]]; /* translate */
if (cdc < 0) { /* invalid? */ if (cdc < 0) { /* invalid? */
ind[IN_RDCHK] = 1; /* set read check */ ind[IN_RDCHK] = 1; /* set read check */
inv = STOP_INVCHR; /* set return status */ if (io_stop) sta = STOP_INVCHR; /* set return status */
cdc = 0; cdc = 0;
} }
M[pa] = cdc; /* store digit */ M[pa] = cdc; /* store digit */
@ -253,7 +255,7 @@ switch (op) { /* case on op */
cdc = cdr_to_alp[cdr_buf[i]]; /* translate */ cdc = cdr_to_alp[cdr_buf[i]]; /* translate */
if (cdc < 0) { /* invalid? */ if (cdc < 0) { /* invalid? */
ind[IN_RDCHK] = 1; /* set read check */ ind[IN_RDCHK] = 1; /* set read check */
inv = STOP_INVCHR; /* set return status */ if (io_stop) sta = STOP_INVCHR; /* set return status */
cdc = 0; cdc = 0;
}; };
M[pa] = (M[pa] & FLAG) | (cdc & DIGIT); /* store 2 digits */ M[pa] = (M[pa] & FLAG) | (cdc & DIGIT); /* store 2 digits */
@ -266,7 +268,7 @@ switch (op) { /* case on op */
return STOP_INVFNC; return STOP_INVFNC;
} }
CRETIOE (io_stop, inv); return sta;
} }
/* Fill card reader buffer - all errors are hard errors */ /* Fill card reader buffer - all errors are hard errors */

3
I1620/i1620_cpu.c
View file

@ -26,6 +26,7 @@
This CPU module incorporates code and comments from the 1620 simulator by This CPU module incorporates code and comments from the 1620 simulator by
Geoff Kuenning, with his permission. Geoff Kuenning, with his permission.
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
07-Nov-04 RMS Added instruction history 07-Nov-04 RMS Added instruction history
26-Mar-04 RMS Fixed warnings with -std=c99 26-Mar-04 RMS Fixed warnings with -std=c99
@ -131,7 +132,7 @@ uint8 ind[NUM_IND] = { 0 }; /* indicators */
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_interval; extern int32 sim_interval;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern FILE *sim_log; extern FILE *sim_log;
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);

66
I1620/i1620_doc.txt
View file

@ -1,7 +1,7 @@
To: Users To: Users
From: Bob Supnik From: Bob Supnik
Subj: IBM 1620 Simulator Usage Subj: IBM 1620 Simulator Usage
Date: 15-Nov-2004 Date: 15-Sep-2005
COPYRIGHT NOTICE COPYRIGHT NOTICE
@ -209,8 +209,8 @@ registers are:
COL 7 current column COL 7 current column
TIME 24 polling interval TIME 24 polling interval
When the 1620 CPU requests input from the keyboard, a reverse apostrophe When the 1620 CPU requests input from the keyboard, a greater than sign
(`) is printed. The CPU hangs waiting for input until the return/enter (>) is printed. The CPU hangs waiting for input until the return/enter
key is pressed. The typewriter has no errors. key is pressed. The typewriter has no errors.
2.3 1621 Paper Tape Reader (PTR) 2.3 1621 Paper Tape Reader (PTR)
@ -407,21 +407,19 @@ controlled by command line switches:
-c display as single character (alphameric -c display as single character (alphameric
for CPU and DP, ASCII for others) for CPU and DP, ASCII for others)
-s display as flag terminated numeric string -s display as flag terminated alphameric string
(CPU and DP only) (CPU and DP only)
-m display instruction mnemonics -m display instruction mnemonics
(CPU and DP only) (CPU and DP only)
-d display 50 characters per line, with word -d display 50 characters per line, with word
marks denoted by "_" on the line above marks denoted by "_" on the line above
In a CPU string display, word marks are denoted by ~.
Input parsing is controlled by the first character typed in or by command Input parsing is controlled by the first character typed in or by command
line switches: line switches:
' or -c character (alphameric for CPU and DP, ASCII ' or -c character (alphameric for CPU and DP, ASCII
for others) for others)
" or -s numeric string (CPU and DP only) " or -s alphameric string (CPU and DP only)
alphabetic instruction mnemonic (CPU and DP only) alphabetic instruction mnemonic (CPU and DP only)
numeric octal number numeric octal number
@ -462,9 +460,6 @@ are accepted on input as equivalent to upper case.
Card code PT code RA RN LPT WA ASCII representation Card code PT code RA RN LPT WA ASCII representation
<blank> C 0 0 blank blank <blank> C 0 0 blank blank
12 XOC 10 0 + +
11 X 20 F+0 - -
0 O 70 0 0 0
1 1 71 1 1 1 1 1 71 1 1 1
2 2 72 2 2 2 2 2 72 2 2 2
3 C21 73 3 3 3 3 C21 73 3 3 3
@ -474,6 +469,13 @@ Card code PT code RA RN LPT WA ASCII representation
7 421 77 7 7 7 7 421 77 7 7 7
8 8 78 8 8 8 8 8 78 8 8 8
9 C81 79 9 9 9 9 C81 79 9 9 9
2 + 8 C82 ? 0A A na ^
3 + 8 821 33 B = = (or #)
4 + 8 C84 34 C @ @ (or ')
5 + 8 841 70 0 0 :
6 + 8 842 ? 0E E na >
7 + 8 C8421 ? 0F F na {
12 XOC 10 0 + + (or &)
12 + 1 XO1 41 1 A A 12 + 1 XO1 41 1 A A
12 + 2 XO2 42 2 B B 12 + 2 XO2 42 2 B B
12 + 3 XOC21 43 3 C C 12 + 3 XOC21 43 3 C C
@ -483,6 +485,13 @@ Card code PT code RA RN LPT WA ASCII representation
12 + 7 XO421 47 7 G G 12 + 7 XO421 47 7 G G
12 + 8 XO8 48 8 H H 12 + 8 XO8 48 8 H H
12 + 9 XOC81 49 9 I I 12 + 9 XOC81 49 9 I I
12 + 2 + 8 XOC82 ? 5A ? F+A na ?
12 + 3 + 8 XO821 3 ? F+B . .
12 + 4 + 8 XOC84 4 C ) )
12 + 5 + 8 XO841 40 0 na [
12 + 6 + 8 XO842 ? 5E ? F+E na <
12 + 7 + 8 XOC8421 5F F+F na }
11 X 20 F+0 - -
11 + 1 XC1 51 F+1 J J 11 + 1 XC1 51 F+1 J J
11 + 2 XC2 52 F+2 K K 11 + 2 XC2 52 F+2 K K
11 + 3 X21 53 F+3 L L 11 + 3 X21 53 F+3 L L
@ -492,6 +501,13 @@ Card code PT code RA RN LPT WA ASCII representation
11 + 7 XC421 57 F+7 P P 11 + 7 XC421 57 F+7 P P
11 + 8 XC8 58 F+8 Q Q 11 + 8 XC8 58 F+8 Q Q
11 + 9 X81 59 F+9 R R 11 + 9 X81 59 F+9 R R
11 + 2 + 8 X82 5A F+A na !
11 + 3 + 8 XC821 13 F+B $ $
11 + 4 + 8 X84 14 F+C * *
11 + 5 + 8 XC841 50 F+0 - ]
11 + 6 + 8 XC842 ? 5E ? F+E na ;
11 + 7 + 8 X8421 5F F+F na _
0 O 70 0 0 0
0 + 1 OC1 21 1 / / 0 + 1 OC1 21 1 / /
0 + 2 OC2 62 2 S S 0 + 2 OC2 62 2 S S
0 + 3 O21 63 3 T T 0 + 3 O21 63 3 T T
@ -501,35 +517,17 @@ Card code PT code RA RN LPT WA ASCII representation
0 + 7 OC421 67 7 X X 0 + 7 OC421 67 7 X X
0 + 8 OC8 68 8 Y Y 0 + 8 OC8 68 8 Y Y
0 + 9 O81 69 9 Z Z 0 + 9 O81 69 9 Z Z
2 + 8 C82 ? 0A A na % 0 + 2 + 8 O82 0A A na |
3 + 8 821 33 B = =
4 + 8 C84 34 C @ @
5 + 8 841 70 0 0 :
6 + 8 842 ? 0E E na >
7 + 8 C8421 ? 0F F na ^
12 + 2 + 8 XOC82 ? 5A ? F+A na ?
12 + 3 + 8 XO821 3 ? F+B . .
12 + 4 + 8 XOC84 4 C ) )
12 + 5 + 8 XO841 40 0 na [
12 + 6 + 8 XO842 ? 5E ? F+E na <
12 + 7 + 8 XOC8421 5F F+F na "
11 + 2 + 8 X82 5A F+A na !
11 + 3 + 8 XC821 13 F+B $ $
11 + 4 + 8 X84 14 F+C * *
11 + 5 + 8 XC841 50 F+0 - ]
11 + 6 + 8 XC842 ? 5E ? F+E na ;
11 + 7 + 8 X8421 5F F+F na _
0 + 2 + 8 O82 0A A na '
0 + 3 + 8 OC821 23 B , , 0 + 3 + 8 OC821 23 B , ,
0 + 4 + 8 O84 24 C ( ( 0 + 4 + 8 O84 24 C ( ( (or %)
0 + 5 + 8 OC841 60 0 na # 0 + 5 + 8 OC841 60 0 na ~
0 + 6 + 8 OC842 0E E na \ 0 + 6 + 8 OC842 0E E na \
0 + 7 + 8 O8421 0F F na & 0 + 7 + 8 O8421 0F F na "
2 ? 2 ?
12 ! 12 !
22 ' 22 |
32 0 32 0
35 : 35 :
36 blank 36 blank
11 + 0 50 - ] 11 + 0 50 - `

19
I1620/i1620_lp.c
View file

@ -25,6 +25,7 @@
lpt 1443 line printer lpt 1443 line printer
21-Sep-05 RMS Revised translation tables for 7094/1401 compatibility
29-Dec-03 RMS Fixed bug in scheduling 29-Dec-03 RMS Fixed bug in scheduling
25-Apr-03 RMS Revised for extended file support 25-Apr-03 RMS Revised for extended file support
*/ */
@ -99,7 +100,7 @@ DEVICE lpt_dev = {
const char num_to_lpt[32] = { const char num_to_lpt[32] = {
'0', '1', '2', '3', '4', '5', '6', '7', '0', '1', '2', '3', '4', '5', '6', '7',
'8', '9', '\'', ' ', '@', ':', ' ', 'G', '8', '9', '|', ' ', '@', ':', ' ', 'G',
'-', 'J', 'K', 'L', 'M', 'N', 'O', 'P', '-', 'J', 'K', 'L', 'M', 'N', 'O', 'P',
'Q', 'R', 'W', ' ', '*', ' ', -1, 'X' 'Q', 'R', 'W', ' ', '*', ' ', -1, 'X'
}; };
@ -111,7 +112,7 @@ const char alp_to_lpt[256] = {
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
'+', -1, '!', '$', '*', ' ', -1, -1, /* 10 */ '+', -1, '!', '$', '*', ' ', -1, -1, /* 10 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
'-', '/', '\'', ',', '(', -1, -1, -1, /* 20 */ '-', '/', '|', ',', '(', -1, -1, -1, /* 20 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, '0', '=', '@', ':', -1, -1, /* 30 */ -1, -1, '0', '=', '@', ':', -1, -1, /* 30 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
@ -152,8 +153,9 @@ t_stat lpt (uint32 op, uint32 pa, uint32 f0, uint32 f1)
{ {
int8 lpc; int8 lpc;
uint8 z, d; uint8 z, d;
t_stat r, inv = SCPE_OK; t_stat r, sta;
sta = SCPE_OK;
sim_cancel (&lpt_unit); /* "stall" until */ sim_cancel (&lpt_unit); /* "stall" until */
ind[IN_PRBSY] = 0; /* printer free */ ind[IN_PRBSY] = 0; /* printer free */
@ -178,7 +180,7 @@ switch (op) { /* decode op */
lpc = alp_to_lpt[(z << 4) | d]; /* translate pair */ lpc = alp_to_lpt[(z << 4) | d]; /* translate pair */
if (lpc < 0) { /* bad char? */ if (lpc < 0) { /* bad char? */
ind[IN_WRCHK] = ind[IN_PRCHK] = 1; /* wr chk */ ind[IN_WRCHK] = ind[IN_PRCHK] = 1; /* wr chk */
inv = STOP_INVCHR; /* set return status */ if (io_stop) sta = STOP_INVCHR; /* set return status */
} }
lpt_buf[lpt_bptr] = lpc & 0x7F; /* fill buffer */ lpt_buf[lpt_bptr] = lpc & 0x7F; /* fill buffer */
pa = ADDR_A (pa, 2); /* incr mem addr */ pa = ADDR_A (pa, 2); /* incr mem addr */
@ -187,7 +189,7 @@ switch (op) { /* decode op */
r = lpt_print (); /* print line */ r = lpt_print (); /* print line */
if (r != SCPE_OK) return r; if (r != SCPE_OK) return r;
} }
CRETIOE (io_stop, inv); return sta;
default: /* invalid function */ default: /* invalid function */
return STOP_INVFNC; return STOP_INVFNC;
@ -203,8 +205,9 @@ t_stat lpt_num (uint32 pa, uint32 len, uint32 f1)
uint32 end; uint32 end;
uint8 d; uint8 d;
int8 lpc; int8 lpc;
t_stat r, inv = SCPE_OK; t_stat r, sta;
sta = SCPE_OK;
end = pa + len; end = pa + len;
for ( ; lpt_bptr < LPT_BSIZE; lpt_bptr++) { /* only fill buf */ for ( ; lpt_bptr < LPT_BSIZE; lpt_bptr++) { /* only fill buf */
d = M[pa]; /* get digit */ d = M[pa]; /* get digit */
@ -213,7 +216,7 @@ for ( ; lpt_bptr < LPT_BSIZE; lpt_bptr++) { /* only fill buf */
lpc = num_to_lpt[d]; /* translate */ lpc = num_to_lpt[d]; /* translate */
if (lpc < 0) { /* bad char? */ if (lpc < 0) { /* bad char? */
ind[IN_WRCHK] = ind[IN_PRCHK] = 1; /* wr chk */ ind[IN_WRCHK] = ind[IN_PRCHK] = 1; /* wr chk */
inv = STOP_INVCHR; /* set return status */ if (io_stop) sta = STOP_INVCHR; /* set return status */
} }
lpt_buf[lpt_bptr++] = lpc & 0x7F; /* fill buffer */ lpt_buf[lpt_bptr++] = lpc & 0x7F; /* fill buffer */
PP (pa); /* incr mem addr */ PP (pa); /* incr mem addr */
@ -222,7 +225,7 @@ if ((f1 & 1) == 0) { /* print now? */
r = lpt_print (); /* print line */ r = lpt_print (); /* print line */
if (r != SCPE_OK) return r; if (r != SCPE_OK) return r;
} }
CRETIOE (io_stop, inv); return sta;
} }
/* Print and space */ /* Print and space */

19
I1620/i1620_pt.c
View file

@ -26,6 +26,7 @@
ptr 1621 paper tape reader ptr 1621 paper tape reader
ptp 1624 paper tape punch ptp 1624 paper tape punch
21-Sep-05 RMS Revised translation tables for 7094/1401 compatibility
25-Apr-03 RMS Revised for extended file support 25-Apr-03 RMS Revised for extended file support
*/ */
@ -213,8 +214,9 @@ t_stat ptr (uint32 op, uint32 pa, uint32 f0, uint32 f1)
uint32 i; uint32 i;
int8 mc; int8 mc;
uint8 ptc; uint8 ptc;
t_stat r, inv = SCPE_OK; t_stat r, sta;
sta = SCPE_OK;
switch (op) { /* case on op */ switch (op) { /* case on op */
case OP_RN: /* read numeric */ case OP_RN: /* read numeric */
@ -223,11 +225,11 @@ switch (op) { /* case on op */
if (r != SCPE_OK) return r; /* error? */ if (r != SCPE_OK) return r; /* error? */
if (ptc & PT_EL) { /* end record? */ if (ptc & PT_EL) { /* end record? */
M[pa] = REC_MARK; /* store rec mark */ M[pa] = REC_MARK; /* store rec mark */
CRETIOE (io_stop, inv); /* done */ return sta; /* done */
} }
if (bad_par[ptc]) { /* bad parity? */ if (bad_par[ptc]) { /* bad parity? */
ind[IN_RDCHK] = 1; /* set read check */ ind[IN_RDCHK] = 1; /* set read check */
inv = STOP_INVCHR; /* set return status */ if (io_stop) sta = STOP_INVCHR; /* set return status */
M[pa] = 0; /* store zero */ M[pa] = 0; /* store zero */
} }
else M[pa] = ptr_to_num[ptc]; /* translate, store */ else M[pa] = ptr_to_num[ptc]; /* translate, store */
@ -242,12 +244,12 @@ switch (op) { /* case on op */
if (ptc & PT_EL) { /* end record? */ if (ptc & PT_EL) { /* end record? */
M[pa] = REC_MARK; /* store rec mark */ M[pa] = REC_MARK; /* store rec mark */
M[pa - 1] = 0; M[pa - 1] = 0;
CRETIOE (io_stop, inv); /* done */ return sta; /* done */
} }
mc = ptr_to_alp[ptc]; /* translate */ mc = ptr_to_alp[ptc]; /* translate */
if (bad_par[ptc] || (mc < 0)) { /* bad par or char? */ if (bad_par[ptc] || (mc < 0)) { /* bad par or char? */
ind[IN_RDCHK] = 1; /* set read check */ ind[IN_RDCHK] = 1; /* set read check */
inv = STOP_INVCHR; /* set return status */ if (io_stop) sta = STOP_INVCHR; /* set return status */
mc = 0; /* store blank */ mc = 0; /* store blank */
} }
M[pa] = (M[pa] & FLAG) | (mc & DIGIT); /* store 2 digits */ M[pa] = (M[pa] & FLAG) | (mc & DIGIT); /* store 2 digits */
@ -269,10 +271,11 @@ t_stat btr (uint32 op, uint32 pa, uint32 f0, uint32 f1)
{ {
uint32 i; uint32 i;
uint8 ptc; uint8 ptc;
t_stat r, inv = SCPE_OK; t_stat r, sta;
if ((cpu_unit.flags & IF_BIN) == 0) return STOP_INVIO; if ((cpu_unit.flags & IF_BIN) == 0) return STOP_INVIO;
sta = SCPE_OK;
switch (op) { /* case on op */ switch (op) { /* case on op */
case OP_RA: /* read alphameric */ case OP_RA: /* read alphameric */
@ -282,11 +285,11 @@ switch (op) { /* case on op */
if (ptc & PT_EL) { /* end record? */ if (ptc & PT_EL) { /* end record? */
M[pa] = REC_MARK; /* store rec mark */ M[pa] = REC_MARK; /* store rec mark */
M[pa - 1] = 0; M[pa - 1] = 0;
CRETIOE (io_stop, inv); /* done */ return sta; /* done */
} }
if (bad_par[ptc]) { /* bad parity? */ if (bad_par[ptc]) { /* bad parity? */
ind[IN_RDCHK] = 1; /* set read check */ ind[IN_RDCHK] = 1; /* set read check */
inv = STOP_INVCHR; /* set return status */ if (io_stop) sta = STOP_INVCHR; /* set return status */
} }
M[pa] = (M[pa] & FLAG) | (ptc & 07); /* store 2 digits */ M[pa] = (M[pa] & FLAG) | (ptc & 07); /* store 2 digits */
M[pa - 1] = (M[pa - 1] & FLAG) | M[pa - 1] = (M[pa - 1] & FLAG) |

27
I1620/i1620_tty.c
View file

@ -25,6 +25,7 @@
tty console typewriter tty console typewriter
21-Sep-05 RMS Revised translation tables for 7094/1401 compatibility
22-Dec-02 RMS Added break test 22-Dec-02 RMS Added break test
*/ */
@ -74,7 +75,7 @@ DEVICE tty_dev = {
/* Keyboard to numeric */ /* Keyboard to numeric */
const char *tti_to_num = "0123456789'=@:;\""; const char *tti_to_num = "0123456789|=@:;}";
/* Keyboard to alphameric (digit pair) - translates LC to UC */ /* Keyboard to alphameric (digit pair) - translates LC to UC */
@ -83,7 +84,7 @@ const int8 tti_to_alp[128] = {
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, -1, -1, -1, -1, -1, -1, /* 10 */ -1, -1, -1, -1, -1, -1, -1, -1, /* 10 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
0x00, 0x02, 0x0F, -1, 0x13, -1, -1, -1, /* !"#$%&' */ 0x00, 0x02, -1, 0x33, 0x13, 0x24, 0x10, 0x34, /* !"#$%&' */
0x24, 0x04, 0x14, 0x10, 0x23, 0x20, 0x03, 0x21, /* ()*+,-./ */ 0x24, 0x04, 0x14, 0x10, 0x23, 0x20, 0x03, 0x21, /* ()*+,-./ */
0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, /* 01234567 */ 0x70, 0x71, 0x72, 0x73, 0x74, 0x75, 0x76, 0x77, /* 01234567 */
0x78, 0x79, -1, -1, -1, 0x33, -1, -1, /* 89:;<=>? */ 0x78, 0x79, -1, -1, -1, 0x33, -1, -1, /* 89:;<=>? */
@ -91,17 +92,17 @@ const int8 tti_to_alp[128] = {
0x48, 0x49, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, /* HIJKLMNO */ 0x48, 0x49, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, /* HIJKLMNO */
0x57, 0x58, 0x59, 0x62, 0x63, 0x64, 0x65, 0x66, /* PQRSTUVW */ 0x57, 0x58, 0x59, 0x62, 0x63, 0x64, 0x65, 0x66, /* PQRSTUVW */
0x67, 0x68, 0x69, -1, -1, -1, -1, -1, /* XYZ[\]^_ */ 0x67, 0x68, 0x69, -1, -1, -1, -1, -1, /* XYZ[\]^_ */
-1, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, /* abcdefg */ -1, 0x41, 0x42, 0x43, 0x44, 0x45, 0x46, 0x47, /* `abcdefg */
0x48, 0x49, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, /* hijklmno */ 0x48, 0x49, 0x51, 0x52, 0x53, 0x54, 0x55, 0x56, /* hijklmno */
0x57, 0x58, 0x59, 0x62, 0x63, 0x64, 0x65, 0x66, /* pqrstuvw */ 0x57, 0x58, 0x59, 0x62, 0x63, 0x64, 0x65, 0x66, /* pqrstuvw */
0x67, 0x68, 0x69, -1, -1, -1, -1, -1 /* xyz */ 0x67, 0x68, 0x69, -1, -1, 0x0F, -1, -1 /* xyz{|}~ */
}; };
/* Numeric (digit) to typewriter */ /* Numeric (digit) to typewriter */
const char num_to_tto[16] = { const char num_to_tto[16] = {
'0', '1', '2', '3', '4', '5', '6', '7', '0', '1', '2', '3', '4', '5', '6', '7',
'8', '9', '\'', '=', '@', ':', ';', '"' '8', '9', '|', '=', '@', ':', ';', '}'
}; };
/* Alphameric (digit pair) to typewriter */ /* Alphameric (digit pair) to typewriter */
@ -111,7 +112,7 @@ const char alp_to_tto[256] = {
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
'+', -1, '!', '$', '*', ' ', -1, -1, /* 10 */ '+', -1, '!', '$', '*', ' ', -1, -1, /* 10 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
'-', '/', '\'', ',', '(', -1, -1, -1, /* 20 */ '-', '/', '|', ',', '(', -1, -1, -1, /* 20 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
-1, -1, '0', '=', '@', ':', -1, -1, /* 30 */ -1, -1, '0', '=', '@', ':', -1, -1, /* 30 */
-1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1, -1,
@ -154,8 +155,9 @@ t_stat tty (uint32 op, uint32 pa, uint32 f0, uint32 f1)
t_addr i; t_addr i;
uint8 d; uint8 d;
int8 ttc; int8 ttc;
t_stat r, inv = SCPE_OK; t_stat r, sta;
sta = SCPE_OK;
switch (op) { /* case on op */ switch (op) { /* case on op */
case OP_K: /* control */ case OP_K: /* control */
@ -214,13 +216,12 @@ switch (op) { /* case on op */
case OP_WA: case OP_WA:
for (i = 0; i < MEMSIZE; i = i + 2) { /* stop runaway */ for (i = 0; i < MEMSIZE; i = i + 2) { /* stop runaway */
d = M[pa] & DIGIT; /* get digit */ d = M[pa] & DIGIT; /* get digit */
if ((d & 0xA) == REC_MARK) /* 8-2 char? */ if ((d & 0xA) == REC_MARK) return sta; /* 8-2 char? done */
CRETIOE (io_stop, inv); /* end record */
d = ((M[pa - 1] & DIGIT) << 4) | d; /* get digit pair */ d = ((M[pa - 1] & DIGIT) << 4) | d; /* get digit pair */
ttc = alp_to_tto[d]; /* translate */ ttc = alp_to_tto[d]; /* translate */
if (ttc < 0) { /* bad char? */ if (ttc < 0) { /* bad char? */
ind[IN_WRCHK] = 1; /* set write check */ ind[IN_WRCHK] = 1; /* set write check */
inv = STOP_INVCHR; /* set return status */ if (io_stop) sta = STOP_INVCHR; /* set return status */
} }
tto_write (ttc & 0x7F); /* write */ tto_write (ttc & 0x7F); /* write */
pa = ADDR_A (pa, 2); /* incr mem addr */ pa = ADDR_A (pa, 2); /* incr mem addr */
@ -247,7 +248,7 @@ do {
r = tti_read (&raw); /* get char */ r = tti_read (&raw); /* get char */
if (r != SCPE_OK) return r; /* error? */ if (r != SCPE_OK) return r; /* error? */
if (raw == '\r') *c = 0x7F; /* return? mark */ if (raw == '\r') *c = 0x7F; /* return? mark */
else if (raw == '~') flg = FLAG; /* flag? mark */ else if ((raw == '~') || (raw == '`')) flg = FLAG; /* flag? mark */
else if (cp = strchr (tti_to_num, raw)) /* legal? */ else if (cp = strchr (tti_to_num, raw)) /* legal? */
*c = ((int8) (cp - tti_to_num)) | flg; /* assemble char */ *c = ((int8) (cp - tti_to_num)) | flg; /* assemble char */
else raw = 007; /* beep! */ else raw = 007; /* beep! */
@ -304,7 +305,7 @@ for (i = 0; i < MEMSIZE; i++) { /* (stop runaway) */
if (len? (pa >= end): /* dump: end reached? */ if (len? (pa >= end): /* dump: end reached? */
((d & REC_MARK) == REC_MARK)) /* write: rec mark? */ ((d & REC_MARK) == REC_MARK)) /* write: rec mark? */
return SCPE_OK; /* end operation */ return SCPE_OK; /* end operation */
if (d & FLAG) tto_write ('~'); /* flag? */ if (d & FLAG) tto_write ('`'); /* flag? */
r = tto_write (num_to_tto[d & DIGIT]); /* write */ r = tto_write (num_to_tto[d & DIGIT]); /* write */
if (r != SCPE_OK) return r; /* error? */ if (r != SCPE_OK) return r; /* error? */
PP (pa); /* incr mem addr */ PP (pa); /* incr mem addr */
@ -369,6 +370,6 @@ return SCPE_OK;
void tti_unlock (void) void tti_unlock (void)
{ {
tto_write ('`'); tto_write ('>');
return; return;
} }

3
Interdata/id16_cpu.c
View file

@ -25,6 +25,7 @@
cpu Interdata 16b CPU cpu Interdata 16b CPU
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
25-Aug-05 RMS Fixed DH integer overflow cases 25-Aug-05 RMS Fixed DH integer overflow cases
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
10-Mar-05 RMS Fixed bug in show history routine (from Mark Hittinger) 10-Mar-05 RMS Fixed bug in show history routine (from Mark Hittinger)
@ -215,7 +216,7 @@ uint32 (*dev_tab[DEVNO])(uint32 dev, uint32 op, uint32 datout) = { NULL };
extern int32 sim_interval; extern int32 sim_interval;
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern UNIT pic_unit, lfc_unit, pas_unit; /* timers */ extern UNIT pic_unit, lfc_unit, pas_unit; /* timers */
uint32 ReadB (uint32 loc); uint32 ReadB (uint32 loc);

3
Interdata/id32_cpu.c
View file

@ -25,6 +25,7 @@
cpu Interdata 32b CPU cpu Interdata 32b CPU
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
10-Mar-05 RMS Fixed bug in initial memory allocation 10-Mar-05 RMS Fixed bug in initial memory allocation
RMS Fixed bug in show history routine (from Mark Hittinger) RMS Fixed bug in show history routine (from Mark Hittinger)
@ -241,7 +242,7 @@ uint32 (*dev_tab[DEVNO])(uint32 dev, uint32 op, uint32 datout) = { NULL };
extern int32 sim_interval; extern int32 sim_interval;
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern UNIT pic_unit, lfc_unit, pas_unit; /* timers */ extern UNIT pic_unit, lfc_unit, pas_unit; /* timers */
extern FILE *sim_deb; extern FILE *sim_deb;

3
LGP/lgp_cpu.c
View file

@ -25,6 +25,7 @@
cpu LGP-30 [LGP-21] CPU cpu LGP-30 [LGP-21] CPU
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
04-Sep-05 RMS Fixed missing returns (found by Peter Schorn) 04-Sep-05 RMS Fixed missing returns (found by Peter Schorn)
04-Jan-05 RMS Modified VM pointer setup 04-Jan-05 RMS Modified VM pointer setup
@ -148,7 +149,7 @@ REG *pcq_r = NULL; /* PC queue reg ptr */
extern int32 sim_interval; extern int32 sim_interval;
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern int32 sim_step; extern int32 sim_step;
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);

3
NOVA/eclipse_cpu.c
View file

@ -28,6 +28,7 @@
cpu Eclipse central processor cpu Eclipse central processor
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
25-Aug-05 RMS Fixed DIVS overflow cases 25-Aug-05 RMS Fixed DIVS overflow cases
29-Nov-03 CEO Corrected POPJ and Bit operations bugs 29-Nov-03 CEO Corrected POPJ and Bit operations bugs
26-Nov-03 CEO Added FPU and PIT devices 26-Nov-03 CEO Added FPU and PIT devices
@ -492,7 +493,7 @@ FILE *Trace;
t_stat reason; t_stat reason;
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern DEVICE *sim_devices[]; extern DEVICE *sim_devices[];
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);

3
NOVA/nova_cpu.c
View file

@ -25,6 +25,7 @@
cpu Nova central processor cpu Nova central processor
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
25-Aug-05 RMS Fixed DIVS case 2^31 / - 1 25-Aug-05 RMS Fixed DIVS case 2^31 / - 1
14-Jan-04 RMS Fixed device enable/disable support (found by Bruce Ray) 14-Jan-04 RMS Fixed device enable/disable support (found by Bruce Ray)
19-Jan-03 RMS Changed CMASK to CDMASK for Apple Dev Kit conflict 19-Jan-03 RMS Changed CMASK to CDMASK for Apple Dev Kit conflict
@ -252,7 +253,7 @@ REG *pcq_r = NULL; /* PC queue reg ptr */
struct ndev dev_table[64]; /* dispatch table */ struct ndev dev_table[64]; /* dispatch table */
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern DEVICE *sim_devices[]; extern DEVICE *sim_devices[];
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);

3
PDP1/pdp1_cpu.c
View file

@ -25,6 +25,7 @@
cpu PDP-1 central processor cpu PDP-1 central processor
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
09-Nov-04 RMS Added instruction history 09-Nov-04 RMS Added instruction history
07-Sep-03 RMS Added additional explanation on I/O simulation 07-Sep-03 RMS Added additional explanation on I/O simulation
@ -270,7 +271,7 @@ InstHistory *hst = NULL; /* instruction history *
extern UNIT *sim_clock_queue; extern UNIT *sim_clock_queue;
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_ex (t_value *vptr, t_addr addr, UNIT *uptr, int32 sw);
t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw); t_stat cpu_dep (t_value val, t_addr addr, UNIT *uptr, int32 sw);

7
PDP10/pdp10_cpu.c
View file

@ -25,6 +25,8 @@
cpu KS10 central processor cpu KS10 central processor
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
Fixed warning in MOVNI
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
10-Nov-04 RMS Added instruction history 10-Nov-04 RMS Added instruction history
08-Oct-02 RMS Revised to build dib_tab dynamically 08-Oct-02 RMS Revised to build dib_tab dynamically
@ -196,7 +198,7 @@ InstHistory *hst = NULL; /* instruction history *
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_interval; extern int32 sim_interval;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern UNIT tim_unit; extern UNIT tim_unit;
/* Forward and external declarations */ /* Forward and external declarations */
@ -943,7 +945,8 @@ case 0205: AC(ac) = IMS; break; /* MOVSI */
case 0206: mb = SWP (AC(ac)); WR; break; /* MOVSM */ case 0206: mb = SWP (AC(ac)); WR; break; /* MOVSM */
case 0207: RM; mb = SWP (mb); WR; LAC; break; /* MOVSS */ case 0207: RM; mb = SWP (mb); WR; LAC; break; /* MOVSS */
case 0210: RD; AC(ac) = MOVN (mb); break; /* MOVN */ case 0210: RD; AC(ac) = MOVN (mb); break; /* MOVN */
case 0211: AC(ac) = MOVN (IM); break; /* MOVNI */ case 0211: AC(ac) = NEG (IM); /* MOVNI */
if (AC(ac) == 0) SETF (F_C0 | F_C1); break;
case 0212: RM; mb = MOVN (AC(ac)); WR; break; /* MOVNM */ case 0212: RM; mb = MOVN (AC(ac)); WR; break; /* MOVNM */
case 0213: RM; mb = MOVN (mb); WR; LAC; break; /* MOVNS */ case 0213: RM; mb = MOVN (mb); WR; LAC; break; /* MOVNS */
case 0214: RD; AC(ac) = MOVM (mb); break; /* MOVM */ case 0214: RD; AC(ac) = MOVM (mb); break; /* MOVM */

7
PDP10/pdp10_ksio.c
View file

@ -25,6 +25,7 @@
uba Unibus adapters uba Unibus adapters
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
25-Jan-04 RMS Added stub floating address routine 25-Jan-04 RMS Added stub floating address routine
12-Mar-03 RMS Added logical name support 12-Mar-03 RMS Added logical name support
10-Oct-02 RMS Revised for dynamic table generation 10-Oct-02 RMS Revised for dynamic table generation
@ -105,14 +106,14 @@ static const int32 ubashf[4] = { 18, 26, 0, 8 };
extern d10 *M; /* main memory */ extern d10 *M; /* main memory */
extern d10 *ac_cur; extern d10 *ac_cur;
extern d10 pager_word; extern d10 pager_word;
extern int32 flags, pi_l2bit[8]; extern int32 flags;
extern const int32 pi_l2bit[8];
extern UNIT cpu_unit; extern UNIT cpu_unit;
extern FILE *sim_log; extern FILE *sim_log;
extern jmp_buf save_env; extern jmp_buf save_env;
extern DEVICE *sim_devices[]; extern DEVICE *sim_devices[];
extern d10 Read (a10 ea); extern int32 pi_eval (void);
extern void pi_eval ();
extern int32 rp_inta (void); extern int32 rp_inta (void);
extern int32 tu_inta (void); extern int32 tu_inta (void);
extern int32 lp20_inta (void); extern int32 lp20_inta (void);

1
PDP10/pdp10_pag.c
View file

@ -25,6 +25,7 @@
pag KS10 pager pag KS10 pager
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
02-Dec-01 RMS Fixed bug in ITS LPMR (found by Dave Conroy) 02-Dec-01 RMS Fixed bug in ITS LPMR (found by Dave Conroy)
21-Aug-01 RMS Fixed bug in ITS paging (found by Miriam Lennox) 21-Aug-01 RMS Fixed bug in ITS paging (found by Miriam Lennox)
Removed register from declarations Removed register from declarations

2
PDP10/pdp10_xtnd.c
View file

@ -139,7 +139,7 @@
#define ED_SKPA 0700 /* skip always */ #define ED_SKPA 0700 /* skip always */
extern d10 *ac_cur; /* current AC block */ extern d10 *ac_cur; /* current AC block */
extern d10 bytemask[64]; extern const d10 bytemask[64];
extern int32 flags; extern int32 flags;
extern int32 rlog; extern int32 rlog;
extern jmp_buf save_env; extern jmp_buf save_env;

5
PDP11/pdp11_cpu.c
View file

@ -25,6 +25,7 @@
cpu PDP-11 CPU cpu PDP-11 CPU
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
19-May-05 RMS Replaced WAIT clock queue check with API call 19-May-05 RMS Replaced WAIT clock queue check with API call
19-Jan-05 RMS Fixed bug(s) in RESET for 11/70 (reported by Tim Chapman) 19-Jan-05 RMS Fixed bug(s) in RESET for 11/70 (reported by Tim Chapman)
@ -279,7 +280,7 @@ extern int32 CPUERR, MAINT;
extern int32 sim_interval; extern int32 sim_interval;
extern UNIT clk_unit, pclk_unit; extern UNIT clk_unit, pclk_unit;
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern DEVICE *sim_devices[]; extern DEVICE *sim_devices[];
extern CPUTAB cpu_tab[]; extern CPUTAB cpu_tab[];
@ -314,7 +315,7 @@ void put_PIRQ (int32 val);
extern void fp11 (int32 IR); extern void fp11 (int32 IR);
extern void cis11 (int32 IR); extern void cis11 (int32 IR);
extern void fis11 (int32 IR); extern t_stat fis11 (int32 IR);
extern t_stat build_dib_tab (void); extern t_stat build_dib_tab (void);
extern t_stat show_iospace (FILE *st, UNIT *uptr, int32 val, void *desc); extern t_stat show_iospace (FILE *st, UNIT *uptr, int32 val, void *desc);
extern t_stat set_autocon (UNIT *uptr, int32 val, char *cptr, void *desc); extern t_stat set_autocon (UNIT *uptr, int32 val, char *cptr, void *desc);

2
PDP11/pdp11_cpumod.c
View file

@ -81,7 +81,7 @@ extern DEVICE cpu_dev, *sim_devices[];
extern UNIT cpu_unit; extern UNIT cpu_unit;
extern FILE *sim_log; extern FILE *sim_log;
extern int32 STKLIM, PIRQ; extern int32 STKLIM, PIRQ;
extern int32 cpu_model, cpu_type, cpu_opt; extern uint32 cpu_model, cpu_type, cpu_opt;
extern int32 clk_fie, clk_fnxm, clk_tps, clk_default; extern int32 clk_fie, clk_fnxm, clk_tps, clk_default;
t_stat CPU24_rd (int32 *data, int32 addr, int32 access); t_stat CPU24_rd (int32 *data, int32 addr, int32 access);

3
PDP11/pdp11_fp.c
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
04-Oct-04 RMS Added FIS instructions 04-Oct-04 RMS Added FIS instructions
19-Jan-03 RMS Changed mode definitions for Apple Dev Kit conflict 19-Jan-03 RMS Changed mode definitions for Apple Dev Kit conflict
08-Oct-02 RMS Fixed macro definitions 08-Oct-02 RMS Fixed macro definitions
@ -195,7 +196,7 @@
#define GET_SIGN_W(ir) GET_BIT((ir), 15) #define GET_SIGN_W(ir) GET_BIT((ir), 15)
extern jmp_buf save_env; extern jmp_buf save_env;
extern int32 cpu_type; extern uint32 cpu_type;
extern int32 FEC, FEA, FPS; extern int32 FEC, FEA, FPS;
extern int32 CPUERR, trap_req; extern int32 CPUERR, trap_req;
extern int32 N, Z, V, C; extern int32 N, Z, V, C;

3
PDP11/pdp11_io.c
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
15-Oct-05 RMS Fixed bug in autoconfiguration (missing XU)
25-Jul-05 RMS Revised autoconfiguration algorithm and interface 25-Jul-05 RMS Revised autoconfiguration algorithm and interface
30-Sep-04 RMS Revised Unibus interface 30-Sep-04 RMS Revised Unibus interface
28-May-04 RMS Revised I/O dispatching (from John Dundas) 28-May-04 RMS Revised I/O dispatching (from John Dundas)
@ -626,7 +627,7 @@ AUTO_CON auto_tab[] = {
{ { NULL }, 1, 2, 8, 8 }, /* DPV11 */ { { NULL }, 1, 2, 8, 8 }, /* DPV11 */
{ { NULL }, 1, 2, 8, 8 }, /* ISB11 */ { { NULL }, 1, 2, 8, 8 }, /* ISB11 */
{ { NULL }, 1, 2, 16, 8 }, /* DMV11 */ { { NULL }, 1, 2, 16, 8 }, /* DMV11 */
// { { "XU", "XUB" }, 1, 1, 8, 4, {IOBA_XU}, {VEC_XU} }, /* DEUNA */ { { "XU", "XUB" }, 1, 1, 8, 4, {IOBA_XU}, {VEC_XU} }, /* DEUNA */
{ { "XQ", "XQB" }, 1, 1, 0, 4, /* DEQNA */ { { "XQ", "XQB" }, 1, 1, 0, 4, /* DEQNA */
{IOBA_XQ,IOBA_XQB}, {VEC_XQ} }, {IOBA_XQ,IOBA_XQB}, {VEC_XQ} },
{ { "RQ", "RQB", "RQC", "RQD" }, 1, -1, 4, 4, /* RQDX3 */ { { "RQ", "RQB", "RQC", "RQD" }, 1, -1, 4, 4, /* RQDX3 */

3
PDP11/pdp11_rl.c
View file

@ -25,6 +25,7 @@
rl RL11(RLV12)/RL01/RL02 cartridge disk rl RL11(RLV12)/RL01/RL02 cartridge disk
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
07-Jul-05 RMS Removed extraneous externs 07-Jul-05 RMS Removed extraneous externs
30-Sep-04 RMS Revised Unibus interface 30-Sep-04 RMS Revised Unibus interface
@ -79,7 +80,7 @@
#else /* PDP-11 version */ #else /* PDP-11 version */
#include "pdp11_defs.h" #include "pdp11_defs.h"
extern int32 cpu_opt; extern uint32 cpu_opt;
#endif #endif
/* Constants */ /* Constants */

3
PDP11/pdp11_stddev.c
View file

@ -26,6 +26,7 @@
tti,tto DL11 terminal input/output tti,tto DL11 terminal input/output
clk KW11L (and other) line frequency clock clk KW11L (and other) line frequency clock
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
07-Jul-05 RMS Removed extraneous externs 07-Jul-05 RMS Removed extraneous externs
11-Oct-04 RMS Added clock model dependencies 11-Oct-04 RMS Added clock model dependencies
28-May-04 RMS Removed SET TTI CTRL-C 28-May-04 RMS Removed SET TTI CTRL-C
@ -66,7 +67,7 @@
#define UNIT_8B (1 << UNIT_V_8B) #define UNIT_8B (1 << UNIT_V_8B)
extern int32 int_req[IPL_HLVL]; extern int32 int_req[IPL_HLVL];
extern int32 cpu_type; extern uint32 cpu_type;
int32 tti_csr = 0; /* control/status */ int32 tti_csr = 0; /* control/status */
int32 tto_csr = 0; /* control/status */ int32 tto_csr = 0; /* control/status */

3
PDP18B/pdp18b_cpu.c
View file

@ -25,6 +25,7 @@
cpu PDP-4/7/9/15 central processor cpu PDP-4/7/9/15 central processor
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
22-Jul-05 RMS Removed AAS, error in V1 reference manual 22-Jul-05 RMS Removed AAS, error in V1 reference manual
06-Nov-04 RMS Added =n to SHOW HISTORY 06-Nov-04 RMS Added =n to SHOW HISTORY
@ -370,7 +371,7 @@ InstHistory *hst = NULL; /* instruction history *
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_interval; extern int32 sim_interval;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern DEVICE *sim_devices[]; extern DEVICE *sim_devices[];
extern FILE *sim_log; extern FILE *sim_log;

3
PDP8/pdp8_cpu.c
View file

@ -25,6 +25,7 @@
cpu central processor cpu central processor
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
06-Nov-04 RMS Added =n to SHOW HISTORY 06-Nov-04 RMS Added =n to SHOW HISTORY
31-Dec-03 RMS Fixed bug in set_cpu_hist 31-Dec-03 RMS Fixed bug in set_cpu_hist
@ -237,7 +238,7 @@ InstHistory *hst = NULL; /* instruction history *
extern int32 sim_interval; extern int32 sim_interval;
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern DEVICE *sim_devices[]; extern DEVICE *sim_devices[];
extern FILE *sim_log; extern FILE *sim_log;
extern UNIT clk_unit, ttix_unit; extern UNIT clk_unit, ttix_unit;

7
VAX/vax_cpu.c
View file

@ -25,6 +25,7 @@
cpu VAX central processor cpu VAX central processor
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
16-Aug-05 RMS Fixed C++ declaration and cast problems 16-Aug-05 RMS Fixed C++ declaration and cast problems
13-Jan-05 RMS Fixed initial state of cpu_extmem 13-Jan-05 RMS Fixed initial state of cpu_extmem
06-Nov-04 RMS Added =n to SHOW HISTORY 06-Nov-04 RMS Added =n to SHOW HISTORY
@ -264,7 +265,7 @@ const uint32 align[4] = {
extern int32 sim_interval; extern int32 sim_interval;
extern int32 sim_int_char; extern int32 sim_int_char;
extern int32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */ extern uint32 sim_brk_types, sim_brk_dflt, sim_brk_summ; /* breakpoint info */
extern UNIT clk_unit; extern UNIT clk_unit;
extern t_stat build_dib_tab (void); extern t_stat build_dib_tab (void);
@ -341,7 +342,7 @@ extern int32 get_vector (int32 lvl);
extern void set_map_reg (void); extern void set_map_reg (void);
extern void rom_wr_B (int32 pa, int32 val); extern void rom_wr_B (int32 pa, int32 val);
extern int32 machine_check (int32 p1, int32 opc, int32 cc, int32 delta); extern int32 machine_check (int32 p1, int32 opc, int32 cc, int32 delta);
extern uint16 drom[NUM_INST][MAX_SPEC + 1]; extern const uint16 drom[NUM_INST][MAX_SPEC + 1];
extern t_stat cpu_boot (int32 unitno, DEVICE *dptr); extern t_stat cpu_boot (int32 unitno, DEVICE *dptr);
extern int32 con_halt (int32 code, int32 cc); extern int32 con_halt (int32 code, int32 cc);
@ -2801,7 +2802,7 @@ int32 i, j, k, di, disp, numspec, lnt;
char *cptr = (char *) desc; char *cptr = (char *) desc;
t_stat r; t_stat r;
InstHistory *h; InstHistory *h;
extern char *opcode[]; extern const char *opcode[];
if (hst_lnt == 0) return SCPE_NOFNC; /* enabled? */ if (hst_lnt == 0) return SCPE_NOFNC; /* enabled? */
if (cptr) { if (cptr) {

3
VAX/vax_cpu1.c
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
30-Sep-04 RMS Added conditionals for full VAX 30-Sep-04 RMS Added conditionals for full VAX
Moved emulation to vax_cis.c Moved emulation to vax_cis.c
Moved model-specific IPRs to system module Moved model-specific IPRs to system module
@ -77,7 +78,7 @@ static const uint8 rcnt[128] = {
int32 last_chm = 0; int32 last_chm = 0;
extern uint32 *M; extern uint32 *M;
extern uint32 byte_mask[33]; extern const uint32 byte_mask[33];
extern int32 R[16]; extern int32 R[16];
extern int32 STK[5]; extern int32 STK[5];
extern int32 PSL; extern int32 PSL;

3
VAX/vax_fpa.c
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
27-Sep-05 RMS Fixed bug in 32b structure definitions (from Jason Stevens)
30-Sep-04 RMS Comment and formating changes based on vax_octa.c 30-Sep-04 RMS Comment and formating changes based on vax_octa.c
18-Apr-04 RMS Moved format definitions to vax_defs.h 18-Apr-04 RMS Moved format definitions to vax_defs.h
19-Jun-03 RMS Simplified add algorithm 19-Jun-03 RMS Simplified add algorithm
@ -566,7 +567,7 @@ typedef struct {
typedef struct { typedef struct {
int32 sign; int32 sign;
int32 exp; int32 exp;
struct udp frac; UDP frac;
} UFP; } UFP;
#define UF_NM_H 0x80000000 /* normalized */ #define UF_NM_H 0x80000000 /* normalized */

3
VAX/vax_io.c
View file

@ -25,6 +25,7 @@
qba Qbus adapter qba Qbus adapter
05-Oct-05 RMS Fixed bug in autoconfiguration (missing XU)
25-Jul-05 RMS Revised autoconfiguration algorithm and interface 25-Jul-05 RMS Revised autoconfiguration algorithm and interface
30-Sep-04 RMS Revised Qbus interface 30-Sep-04 RMS Revised Qbus interface
Moved mem_err, crd_err interrupts here from vax_cpu.c Moved mem_err, crd_err interrupts here from vax_cpu.c
@ -1003,7 +1004,7 @@ AUTO_CON auto_tab[] = {
{ { NULL }, 1, 2, 8, 8 }, /* DPV11 */ { { NULL }, 1, 2, 8, 8 }, /* DPV11 */
{ { NULL }, 1, 2, 8, 8 }, /* ISB11 */ { { NULL }, 1, 2, 8, 8 }, /* ISB11 */
{ { NULL }, 1, 2, 16, 8 }, /* DMV11 */ { { NULL }, 1, 2, 16, 8 }, /* DMV11 */
/* { { "XU", "XUB" }, 1, 1, 8, 4, {IOBA_XU}, {VEC_XU} }, /* DEUNA */ { { "XU", "XUB" }, 1, 1, 8, 4, {IOBA_XU}, {VEC_XU} }, /* DEUNA */
{ { "XQ", "XQB" }, 1, 1, 0, 4, /* DEQNA */ { { "XQ", "XQB" }, 1, 1, 0, 4, /* DEQNA */
{IOBA_XQ,IOBA_XQB}, {VEC_XQ} }, {IOBA_XQ,IOBA_XQB}, {VEC_XQ} },
{ { "RQ", "RQB", "RQC", "RQD" }, 1, -1, 4, 4, /* RQDX3 */ { { "RQ", "RQB", "RQC", "RQD" }, 1, -1, 4, 4, /* RQDX3 */

9
VAX/vax_mmu.c
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
30-Sep-04 RMS Comment and formating changes 30-Sep-04 RMS Comment and formating changes
19-Sep-03 RMS Fixed upper/lower case linkage problems on VMS 19-Sep-03 RMS Fixed upper/lower case linkage problems on VMS
01-Jun-03 RMS Fixed compilation problem with USE_ADDR64 01-Jun-03 RMS Fixed compilation problem with USE_ADDR64
@ -52,7 +53,7 @@ typedef struct {
} TLBENT; } TLBENT;
extern uint32 *M; extern uint32 *M;
extern uint32 align[4]; extern const uint32 align[4];
extern int32 PSL; extern int32 PSL;
extern int32 mapen; extern int32 mapen;
extern int32 p1, p2; extern int32 p1, p2;
@ -281,7 +282,7 @@ return;
/* Test access to a byte (VAX PROBEx) */ /* Test access to a byte (VAX PROBEx) */
int32 Test (int32 va, int32 acc, int32 *status) int32 Test (uint32 va, int32 acc, int32 *status)
{ {
int32 vpn, off, tbi; int32 vpn, off, tbi;
TLBENT xpte; TLBENT xpte;
@ -515,7 +516,7 @@ return;
/* Zap single tb entry corresponding to va */ /* Zap single tb entry corresponding to va */
void zap_tb_ent (int32 va) void zap_tb_ent (uint32 va)
{ {
int32 tbi = VA_GETTBI (VA_GETVPN (va)); int32 tbi = VA_GETTBI (VA_GETVPN (va));
@ -526,7 +527,7 @@ return;
/* Check for tlb entry corresponding to va */ /* Check for tlb entry corresponding to va */
t_bool chk_tb_ent (int32 va) t_bool chk_tb_ent (uint32 va)
{ {
int32 vpn = VA_GETVPN (va); int32 vpn = VA_GETVPN (va);
int32 tbi = VA_GETTBI (vpn); int32 tbi = VA_GETTBI (vpn);

16
VAX/vax_syscm.c
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
27-Sep-05 RMS Fixed warnings compiling with 64b addresses
15-Sep-04 RMS Cloned from pdp11_sys.c 15-Sep-04 RMS Cloned from pdp11_sys.c
*/ */
@ -439,7 +440,7 @@ return tptr;
= +1 error = +1 error
*/ */
t_stat get_spec (char *cptr, t_addr addr, int32 n1, int32 *sptr, int32 *dptr) t_stat get_spec (char *cptr, int32 addr, int32 n1, int32 *sptr, int32 *dptr)
{ {
int32 reg, indir, pflag, disp; int32 reg, indir, pflag, disp;
@ -541,11 +542,12 @@ t_stat parse_sym_cm (char *cptr, t_addr addr, t_value *bytes, int32 sw)
{ {
int32 d, i, j, reg, spec, n1, n2, disp, pflag; int32 d, i, j, reg, spec, n1, n2, disp, pflag;
int32 val[3]; int32 val[3];
int32 ad32 = (int32) addr;
t_stat r; t_stat r;
char *tptr, gbuf[CBUFSIZE]; char *tptr, gbuf[CBUFSIZE];
if (sw & SWMASK ('R')) return SCPE_ARG; /* radix 50 */ if (sw & SWMASK ('R')) return SCPE_ARG; /* radix 50 */
if (!(sw & SWMASK ('P')) || (addr & 1) || (addr > WMASK)) if (!(sw & SWMASK ('P')) || (ad32 & 1) || (ad32 > WMASK))
return SCPE_ARG; return SCPE_ARG;
cptr = get_glyph (cptr, gbuf, 0); /* get opcode */ cptr = get_glyph (cptr, gbuf, 0); /* get opcode */
@ -578,7 +580,7 @@ switch (j) { /* case on class */
tptr = get_addr (gbuf, &disp, &pflag); /* parse */ tptr = get_addr (gbuf, &disp, &pflag); /* parse */
if ((tptr == NULL) || (*tptr != 0)) return SCPE_ARG; if ((tptr == NULL) || (*tptr != 0)) return SCPE_ARG;
if ((pflag & A_REL) == 0) if ((pflag & A_REL) == 0)
disp = (disp - addr) & 0177777; disp = (disp - ad32) & 0177777;
if ((disp & 1) || (disp > 0400) && (disp < 0177402)) return SCPE_ARG; if ((disp & 1) || (disp > 0400) && (disp < 0177402)) return SCPE_ARG;
val[0] = val[0] | (((disp - 2) >> 1) & 0377); val[0] = val[0] | (((disp - 2) >> 1) & 0377);
break; break;
@ -591,7 +593,7 @@ switch (j) { /* case on class */
tptr = get_addr (gbuf, &disp, &pflag); /* parse */ tptr = get_addr (gbuf, &disp, &pflag); /* parse */
if ((tptr == NULL) || (*tptr != 0)) return SCPE_ARG; if ((tptr == NULL) || (*tptr != 0)) return SCPE_ARG;
if ((pflag & A_REL) == 0) if ((pflag & A_REL) == 0)
disp = (disp - addr) & 0177777; disp = (disp - ad32) & 0177777;
if ((disp & 1) || ((disp > 2) && (disp < 0177604))) return SCPE_ARG; if ((disp & 1) || ((disp > 2) && (disp < 0177604))) return SCPE_ARG;
val[0] = val[0] | (((2 - disp) >> 1) & 077); val[0] = val[0] | (((2 - disp) >> 1) & 077);
break; break;
@ -602,18 +604,18 @@ switch (j) { /* case on class */
val[0] = val[0] | (reg << 6); /* fall through */ val[0] = val[0] | (reg << 6); /* fall through */
case I_V_SOP: /* sop */ case I_V_SOP: /* sop */
cptr = get_glyph (cptr, gbuf, 0); /* get glyph */ cptr = get_glyph (cptr, gbuf, 0); /* get glyph */
if ((n1 = get_spec (gbuf, addr, 0, &spec, &val[1])) > 0) if ((n1 = get_spec (gbuf, ad32, 0, &spec, &val[1])) > 0)
return SCPE_ARG; return SCPE_ARG;
val[0] = val[0] | spec; val[0] = val[0] | spec;
break; break;
case I_V_DOP: /* double op */ case I_V_DOP: /* double op */
cptr = get_glyph (cptr, gbuf, ','); /* get glyph */ cptr = get_glyph (cptr, gbuf, ','); /* get glyph */
if ((n1 = get_spec (gbuf, addr, 0, &spec, &val[1])) > 0) if ((n1 = get_spec (gbuf, ad32, 0, &spec, &val[1])) > 0)
return SCPE_ARG; return SCPE_ARG;
val[0] = val[0] | (spec << 6); val[0] = val[0] | (spec << 6);
cptr = get_glyph (cptr, gbuf, 0); /* get glyph */ cptr = get_glyph (cptr, gbuf, 0); /* get glyph */
if ((n2 = get_spec (gbuf, addr, n1, &spec, &val[1 - n1])) > 0) if ((n2 = get_spec (gbuf, ad32, n1, &spec, &val[1 - n1])) > 0)
return SCPE_ARG; return SCPE_ARG;
val[0] = val[0] | spec; val[0] = val[0] | spec;
break; break;

8
VAX/vax_sysdev.c
View file

@ -898,8 +898,8 @@ return;
*/ */
struct reglink { /* register linkage */ struct reglink { /* register linkage */
int32 low; /* low addr */ uint32 low; /* low addr */
int32 high; /* high addr */ uint32 high; /* high addr */
t_stat (*read)(int32 pa); /* read routine */ t_stat (*read)(int32 pa); /* read routine */
void (*write)(int32 pa, int32 val, int32 lnt); /* write routine */ void (*write)(int32 pa, int32 val, int32 lnt); /* write routine */
}; };
@ -927,7 +927,7 @@ struct reglink regtable[] = {
longword of data longword of data
*/ */
int32 ReadReg (int32 pa, int32 lnt) int32 ReadReg (uint32 pa, int32 lnt)
{ {
struct reglink *p; struct reglink *p;
@ -950,7 +950,7 @@ return 0;
none none
*/ */
void WriteReg (int32 pa, int32 val, int32 lnt) void WriteReg (uint32 pa, int32 val, int32 lnt)
{ {
struct reglink *p; struct reglink *p;

2
VAX/vax_syslist.c
View file

@ -50,7 +50,7 @@ extern DEVICE xq_dev, xqb_dev;
extern DEVICE vh_dev; extern DEVICE vh_dev;
extern int32 sim_switches; extern int32 sim_switches;
extern void WriteB (int32 pa, int32 val); extern void WriteB (uint32 pa, int32 val);
extern void rom_wr_B (int32 pa, int32 val); extern void rom_wr_B (int32 pa, int32 val);
extern UNIT cpu_unit; extern UNIT cpu_unit;

4
VAX/vaxmod_defs.h
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
05-Oct-05 RMS Added XU definitions for autoconfigure
15-Jun-05 RMS Added QDSS support 15-Jun-05 RMS Added QDSS support
12-Sep-04 RMS Removed map_address prototype 12-Sep-04 RMS Removed map_address prototype
16-Jun-04 RMS Added DHQ11 support 16-Jun-04 RMS Added DHQ11 support
@ -280,6 +281,8 @@ typedef struct {
#define IOLN_XQB 020 #define IOLN_XQB 020
#define IOBA_TQ (IOPAGEBASE + 014500) /* TMSCP */ #define IOBA_TQ (IOPAGEBASE + 014500) /* TMSCP */
#define IOLN_TQ 004 #define IOLN_TQ 004
#define IOBA_XU (IOPAGEBASE + 014510) /* DEUNA/DELUA */
#define IOLN_XU 010
#define IOBA_RP (IOPAGEBASE + 016700) /* RP/RM */ #define IOBA_RP (IOPAGEBASE + 016700) /* RP/RM */
#define IOLN_RP 054 #define IOLN_RP 054
#define IOBA_RX (IOPAGEBASE + 017170) /* RXV11 */ #define IOBA_RX (IOPAGEBASE + 017170) /* RXV11 */
@ -391,6 +394,7 @@ typedef struct {
#define VEC_PTR (VEC_Q + 0070) #define VEC_PTR (VEC_Q + 0070)
#define VEC_PTP (VEC_Q + 0074) #define VEC_PTP (VEC_Q + 0074)
#define VEC_XQ (VEC_Q + 0120) #define VEC_XQ (VEC_Q + 0120)
#define VEC_XU (VEC_Q + 0120)
#define VEC_RQ (VEC_Q + 0154) #define VEC_RQ (VEC_Q + 0154)
#define VEC_RL (VEC_Q + 0160) #define VEC_RL (VEC_Q + 0160)
#define VEC_LPT (VEC_Q + 0200) #define VEC_LPT (VEC_Q + 0200)

3
scp.c
View file

@ -23,6 +23,7 @@
used in advertising or otherwise to promote the sale, use or other dealings used in advertising or otherwise to promote the sale, use or other dealings
in this Software without prior written authorization from Robert M Supnik. in this Software without prior written authorization from Robert M Supnik.
22-Sep-05 RMS Fixed declarations (from Sterling Garwood)
30-Aug-05 RMS Revised to trim trailing spaces on file names 30-Aug-05 RMS Revised to trim trailing spaces on file names
25-Aug-05 RMS Added variable default device support 25-Aug-05 RMS Added variable default device support
23-Aug-05 RMS Added Linux line history support 23-Aug-05 RMS Added Linux line history support
@ -225,7 +226,7 @@
extern char sim_name[]; extern char sim_name[];
extern DEVICE *sim_devices[]; extern DEVICE *sim_devices[];
extern REG *sim_PC; extern REG *sim_PC;
extern char *sim_stop_messages[]; extern const char *sim_stop_messages[];
extern t_stat sim_instr (void); extern t_stat sim_instr (void);
extern t_stat sim_load (FILE *ptr, char *cptr, char *fnam, int32 flag); extern t_stat sim_load (FILE *ptr, char *cptr, char *fnam, int32 flag);
extern int32 sim_emax; extern int32 sim_emax;

25
sim_rev.h
View file

@ -29,12 +29,35 @@
#define SIM_MAJOR 3 #define SIM_MAJOR 3
#define SIM_MINOR 5 #define SIM_MINOR 5
#define SIM_PATCH 0 #define SIM_PATCH 1
/* V3.5 revision history /* V3.5 revision history
patch date module(s) and fix(es) patch date module(s) and fix(es)
1 15-Oct-05 All CPU's, other sources: fixed declaration inconsistencies
(from Sterling Garwood)
i1401_cpu.c: added control for old/new character encodings
i1401_cd.c, i1401_lpt.c, i1401_tty.c:
- changed character encodings to be consistent with 7094
- changed column binary format to be consistent with 7094
- added choice of business or Fortran set for output encoding
i1401_sys.c: changed WM character to ` under new encodings
i1620_cd.c, i1620_lpt.c, i1620_tty.c:
- changed character encodings to be consistent with 7094
pdp10_cpu.c: changed MOVNI to eliminate gcc warning
pdp11_io.c: fixed bug in autoconfiguration (missing XU)
vax_io.c: fixed bug in autoconfiguration (missing XU)
vax_fpa.c: fixed bug in 32b structure definitions (from Jason Stevens)
0 1-Sep-05 Note: most source modules have been edited to improve 0 1-Sep-05 Note: most source modules have been edited to improve
readability and to fix declaration and cast problems in C++ readability and to fix declaration and cast problems in C++