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ISYS8020: Fix spaces in i8259.c

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This commit is contained in:
Bill Beech 2015-05-08 14:43:20 -07:00
parent a1002569a1
commit 218dac51fe
1 changed files with 139 additions and 139 deletions
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278
Intel-Systems/common/i8259.c
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@ -27,8 +27,8 @@
24 Jan 13 - Original file. 24 Jan 13 - Original file.
*/ */
#include "system_defs.h" /* system header in system dir */ #include "system_defs.h" /* system header in system dir */
#define i8259_DEV 2 /* number of devices */ #define i8259_DEV 2 /* number of devices */
/* function prototypes */ /* function prototypes */
@ -98,7 +98,7 @@ DEVICE i8259_dev = {
NULL, //examine NULL, //examine
NULL, //deposit NULL, //deposit
// &i8259_reset, //reset // &i8259_reset, //reset
NULL, //reset NULL, //reset
NULL, //boot NULL, //boot
NULL, //attach NULL, //attach
NULL, //detach NULL, //detach
@ -119,67 +119,67 @@ int32 i8259a0(int32 io, int32 data)
int32 bit; int32 bit;
if (io == 0) { /* read data port */ if (io == 0) { /* read data port */
if ((i8259_ocw3[0] & 0x03) == 0x02) if ((i8259_ocw3[0] & 0x03) == 0x02)
return (i8259_unit[0].u3); /* IRR */ return (i8259_unit[0].u3); /* IRR */
if ((i8259_ocw3[0] & 0x03) == 0x03) if ((i8259_ocw3[0] & 0x03) == 0x03)
return (i8259_unit[0].u4); /* ISR */ return (i8259_unit[0].u4); /* ISR */
} else { /* write data port */ } else { /* write data port */
if (data & 0x10) { if (data & 0x10) {
icw_num0 = 1; icw_num0 = 1;
} }
if (icw_num0 == 1) { if (icw_num0 == 1) {
i8259_icw1[0] = data; /* ICW1 */ i8259_icw1[0] = data; /* ICW1 */
i8259_unit[0].u5 = 0x00; /* clear IMR */ i8259_unit[0].u5 = 0x00; /* clear IMR */
i8259_ocw3[0] = 0x02; /* clear OCW3, Sel IRR */ i8259_ocw3[0] = 0x02; /* clear OCW3, Sel IRR */
} else { } else {
switch (data & 0x18) { switch (data & 0x18) {
case 0: /* OCW2 */ case 0: /* OCW2 */
i8259_ocw2[0] = data; i8259_ocw2[0] = data;
break; break;
case 8: /* OCW3 */ case 8: /* OCW3 */
i8259_ocw3[0] = data; i8259_ocw3[0] = data;
break; break;
default: default:
sim_printf("8259b-0: OCW Error %02X\n", data); sim_printf("8259b-0: OCW Error %02X\n", data);
break; break;
} }
} }
sim_printf("8259a-0: data = %02X\n", data); sim_printf("8259a-0: data = %02X\n", data);
icw_num0++; /* step ICW number */ icw_num0++; /* step ICW number */
} }
i8259_dump(0); i8259_dump(0);
return 0; return 0;
} }
int32 i8259b0(int32 io, int32 data) int32 i8259b0(int32 io, int32 data)
{ {
if (io == 0) { /* read data port */ if (io == 0) { /* read data port */
return (i8259_unit[0].u5); /* IMR */ return (i8259_unit[0].u5); /* IMR */
} else { /* write data port */ } else { /* write data port */
if (icw_num0 >= 2 && icw_num0 < 5) { /* ICW mode */ if (icw_num0 >= 2 && icw_num0 < 5) { /* ICW mode */
switch (icw_num0) { switch (icw_num0) {
case 2: /* ICW2 */ case 2: /* ICW2 */
i8259_icw2[0] = data; i8259_icw2[0] = data;
break; break;
case 3: /* ICW3 */ case 3: /* ICW3 */
i8259_icw3[0] = data; i8259_icw3[0] = data;
break; break;
case 4: /* ICW4 */ case 4: /* ICW4 */
if (i8259_icw1[0] & 0x01) if (i8259_icw1[0] & 0x01)
i8259_icw4[0] = data; i8259_icw4[0] = data;
else else
sim_printf("8259b-0: ICW4 not enabled - data=%02X\n", data); sim_printf("8259b-0: ICW4 not enabled - data=%02X\n", data);
break; break;
default: default:
sim_printf("8259b-0: ICW Error %02X\n", data); sim_printf("8259b-0: ICW Error %02X\n", data);
break; break;
} }
icw_num0++; icw_num0++;
} else { } else {
i8259_ocw1[0] = data; /* OCW0 */ i8259_ocw1[0] = data; /* OCW0 */
} }
} }
i8259_dump(0); i8259_dump(0);
return 0; return 0;
} }
@ -188,35 +188,35 @@ int32 i8259a1(int32 io, int32 data)
int32 bit; int32 bit;
if (io == 0) { /* read data port */ if (io == 0) { /* read data port */
if ((i8259_ocw3[1] & 0x03) == 0x02) if ((i8259_ocw3[1] & 0x03) == 0x02)
return (i8259_unit[1].u3); /* IRR */ return (i8259_unit[1].u3); /* IRR */
if ((i8259_ocw3[1] & 0x03) == 0x03) if ((i8259_ocw3[1] & 0x03) == 0x03)
return (i8259_unit[1].u4); /* ISR */ return (i8259_unit[1].u4); /* ISR */
} else { /* write data port */ } else { /* write data port */
if (data & 0x10) { if (data & 0x10) {
icw_num1 = 1; icw_num1 = 1;
} }
if (icw_num1 == 1) { if (icw_num1 == 1) {
i8259_icw1[1] = data; /* ICW1 */ i8259_icw1[1] = data; /* ICW1 */
i8259_unit[1].u5 = 0x00; /* clear IMR */ i8259_unit[1].u5 = 0x00; /* clear IMR */
i8259_ocw3[1] = 0x02; /* clear OCW3, Sel IRR */ i8259_ocw3[1] = 0x02; /* clear OCW3, Sel IRR */
} else { } else {
switch (data & 0x18) { switch (data & 0x18) {
case 0: /* OCW2 */ case 0: /* OCW2 */
i8259_ocw2[1] = data; i8259_ocw2[1] = data;
break; break;
case 8: /* OCW3 */ case 8: /* OCW3 */
i8259_ocw3[1] = data; i8259_ocw3[1] = data;
break; break;
default: default:
sim_printf("8259b-1: OCW Error %02X\n", data); sim_printf("8259b-1: OCW Error %02X\n", data);
break; break;
} }
} }
sim_printf("8259a-1: data = %02X\n", data); sim_printf("8259a-1: data = %02X\n", data);
icw_num1++; /* step ICW number */ icw_num1++; /* step ICW number */
} }
i8259_dump(1); i8259_dump(1);
return 0; return 0;
} }
@ -225,79 +225,79 @@ int32 i8259b1(int32 io, int32 data)
if (io == 0) { /* read data port */ if (io == 0) { /* read data port */
return (i8259_unit[1].u5); /* IMR */ return (i8259_unit[1].u5); /* IMR */
} else { /* write data port */ } else { /* write data port */
if (icw_num1 >= 2 && icw_num1 < 5) { /* ICW mode */ if (icw_num1 >= 2 && icw_num1 < 5) { /* ICW mode */
switch (icw_num1) { switch (icw_num1) {
case 2: /* ICW2 */ case 2: /* ICW2 */
i8259_icw2[1] = data; i8259_icw2[1] = data;
break; break;
case 3: /* ICW3 */ case 3: /* ICW3 */
i8259_icw3[1] = data; i8259_icw3[1] = data;
break; break;
case 4: /* ICW4 */ case 4: /* ICW4 */
if (i8259_icw1[1] & 0x01) if (i8259_icw1[1] & 0x01)
i8259_icw4[1] = data; i8259_icw4[1] = data;
else else
sim_printf("8259b-1: ICW4 not enabled - data=%02X\n", data); sim_printf("8259b-1: ICW4 not enabled - data=%02X\n", data);
break; break;
default: default:
sim_printf("8259b-1: ICW Error %02X\n", data); sim_printf("8259b-1: ICW Error %02X\n", data);
break; break;
} }
icw_num1++; icw_num1++;
} else { } else {
i8259_ocw1[1] = data; /* OCW0 */ i8259_ocw1[1] = data; /* OCW0 */
} }
} }
i8259_dump(1); i8259_dump(1);
return 0; return 0;
} }
void i8259_dump(int32 dev) void i8259_dump(int32 dev)
{ {
sim_printf("Device %d\n", dev); sim_printf("Device %d\n", dev);
sim_printf(" IRR = %02X\n", i8259_unit[dev].u3); sim_printf(" IRR = %02X\n", i8259_unit[dev].u3);
sim_printf(" ISR = %02X\n", i8259_unit[dev].u4); sim_printf(" ISR = %02X\n", i8259_unit[dev].u4);
sim_printf(" IMR = %02X\n", i8259_unit[dev].u5); sim_printf(" IMR = %02X\n", i8259_unit[dev].u5);
sim_printf(" ICW1 = %02X\n", i8259_icw1[dev]); sim_printf(" ICW1 = %02X\n", i8259_icw1[dev]);
sim_printf(" ICW2 = %02X\n", i8259_icw2[dev]); sim_printf(" ICW2 = %02X\n", i8259_icw2[dev]);
sim_printf(" ICW3 = %02X\n", i8259_icw3[dev]); sim_printf(" ICW3 = %02X\n", i8259_icw3[dev]);
sim_printf(" ICW4 = %02X\n", i8259_icw4[dev]); sim_printf(" ICW4 = %02X\n", i8259_icw4[dev]);
sim_printf(" OCW1 = %02X\n", i8259_ocw1[dev]); sim_printf(" OCW1 = %02X\n", i8259_ocw1[dev]);
sim_printf(" OCW2 = %02X\n", i8259_ocw2[dev]); sim_printf(" OCW2 = %02X\n", i8259_ocw2[dev]);
sim_printf(" OCW3 = %02X\n", i8259_ocw3[dev]); sim_printf(" OCW3 = %02X\n", i8259_ocw3[dev]);
} }
/* Reset routine */ /* Reset routine */
t_stat i8259_reset (DEVICE *dptr, int32 base) t_stat i8259_reset (DEVICE *dptr, int32 base)
{ {
switch (i8259_cnt) { switch (i8259_cnt) {
case 0: case 0:
reg_dev(i8259a0, base); reg_dev(i8259a0, base);
reg_dev(i8259b0, base + 1); reg_dev(i8259b0, base + 1);
reg_dev(i8259a0, base + 2); reg_dev(i8259a0, base + 2);
reg_dev(i8259b0, base + 3); reg_dev(i8259b0, base + 3);
i8259_unit[0].u3 = 0x00; /* IRR */ i8259_unit[0].u3 = 0x00; /* IRR */
i8259_unit[0].u4 = 0x00; /* ISR */ i8259_unit[0].u4 = 0x00; /* ISR */
i8259_unit[0].u5 = 0x00; /* IMR */ i8259_unit[0].u5 = 0x00; /* IMR */
sim_printf(" 8259-0: Reset\n"); sim_printf(" 8259-0: Reset\n");
break; break;
case 1: case 1:
reg_dev(i8259a1, base); reg_dev(i8259a1, base);
reg_dev(i8259b1, base + 1); reg_dev(i8259b1, base + 1);
reg_dev(i8259a1, base + 2); reg_dev(i8259a1, base + 2);
reg_dev(i8259b1, base + 3); reg_dev(i8259b1, base + 3);
i8259_unit[1].u3 = 0x00; /* IRR */ i8259_unit[1].u3 = 0x00; /* IRR */
i8259_unit[1].u4 = 0x00; /* ISR */ i8259_unit[1].u4 = 0x00; /* ISR */
i8259_unit[1].u5 = 0x00; /* IMR */ i8259_unit[1].u5 = 0x00; /* IMR */
sim_printf(" 8259-1: Reset\n"); sim_printf(" 8259-1: Reset\n");
break; break;
default: default:
sim_printf(" 8259: Bad device\n"); sim_printf(" 8259: Bad device\n");
break; break;
} }
sim_printf(" 8259-%d: Registered at %02X\n", i8259_cnt, base); sim_printf(" 8259-%d: Registered at %02X\n", i8259_cnt, base);
i8259_cnt++; i8259_cnt++;
return SCPE_OK; return SCPE_OK;
} }